Texas Instruments SN74CBT3125CPWR
- Part No.:
- SN74CBT3125CPWR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74CBT3125CPWR.pdf
- Description:
- IC BUS SWITCH 1 X 1:1 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,039
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74CBT3125CPWR from Texas Instruments is a quad 1-bit FET bus switch IC with bidirectional signal routing, 3 Ω typical ON-state resistance, <0.24 ns propagation delay at 4 V, and −2 V undershoot protection on A/B ports. It operates from 4 V to 5.5 V and supports mixed-voltage signaling (0.8 V to 5 V) in USB interface and bus isolation applications.
For engineers reviewing the SN74CBT3125CPWR datasheet, SN74CBT3125CPWR pinout, SN74CBT3125CPWR application, or SN74CBT3125CPWR equivalent, key selection criteria include Ioff partial-power-down capability, 5 pF OFF-state I/O capacitance, TTL/CMOS-compatible control inputs, and TSSOP-14 package compatibility with high-density PCB layouts.
Technical Context
This device implements four independent single-pole single-throw (SPST) analog switches using NMOS pass transistors with integrated undershoot-protection circuitry. Each switch is controlled by a dedicated OE input that enables bidirectional conduction between A and B ports when low.
The architecture supports true 0–5 V signal translation without level-shifting circuitry, maintains high-impedance isolation during power-up/down via Ioff, and delivers near-zero propagation delay due to low ron–Cio product (3 Ω × 5 pF = 15 ps RC time constant).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 4 V to 5.5 V - Enables direct integration into 5 V logic systems with margin for supply variation. |
| ron (Typ) | 3 Ω - Minimizes voltage drop and signal attenuation for 128 mA max current paths. |
| Cio(OFF) | 5 pF - Reduces capacitive loading on buses, preserving signal integrity in high-speed gating. |
| tpd (Max) | 0.24 ns at VCC = 4 V - Ensures sub-nanosecond timing alignment critical for USB 1.1 and legacy parallel bus isolation. |
| Undershoot Protection | −2 V on A/B ports - Prevents false turn-on and latch-up during transient negative excursions in hot-swap environments. |
| Ioff | 10 µA at VCC = 0 - Blocks back-current flow during partial power-down, protecting powered subsystems. |
| VI/O Range | 0 to 5.5 V - Supports interoperability across 0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V logic families. |
Pinout & Package
TSSOP-14 package (PW), 5.0 mm × 4.4 mm × 1.2 mm height, 0.65 mm lead pitch, exposed thermal pad optional per TI design guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 10, 13 | OE (Output Enable) | Active-low control for individual 1-bit switches; ties to VCC via pullup for power-up high-impedance safety. |
| 2, 5, 11, 14 | A port | Bidirectional data input/output terminal for channel 1–4; accepts 0–5.5 V signals regardless of VCC state. |
| 3, 6, 12, 9 | B port | Complementary bidirectional data terminal paired with each A port; identical voltage and current specs. |
| 7 | GND | Ground reference for all internal circuitry and I/O clamp diodes. |
| 8 | VCC | Positive supply rail; powers internal bias networks and enables undershoot protection circuitry. |
Key Features
| Feature | Design Value |
|---|---|
| Undershoot protection | Detects −2 V transients on A/B ports and forces switch OFF, preventing unintended conduction during hot-plug events. |
| Ioff partial-power-down | Blocks >99.9% of back-current when VCC = 0, enabling safe isolation of unpowered sections in multi-rail systems. |
| Low Cio(OFF) | 5 pF capacitance isolates buses without distorting edge rates-critical for maintaining setup/hold timing in synchronous interfaces. |
| Wide VI/O range | 0–5.5 V operation allows direct connection to legacy 5 V peripherals and modern low-voltage controllers without external level shifters. |
| TTL/CMOS-compatible OE | Accepts 0.8 V VIH threshold and drives 3 µA ICC, simplifying interface with microcontrollers and FPGA I/O banks. |
Applications
| USB Interface | Bus Isolation |
|---|---|
Use Scenario: Isolating USB D+ and D− lines between host controller and peripheral during enumeration or fault conditions. IC Role / Device Role / Timing Role: Bidirectional analog switch providing <0.24 ns propagation delay and −2 V undershoot clamping to prevent signal corruption. Use Value: Eliminates need for discrete protection diodes and series resistors while maintaining USB 1.1 full-speed timing compliance. | Use Scenario: Segregating legacy parallel address/data buses (e.g., ISA, LPC) from active system logic during sleep or reset. IC Role / Device Role / Timing Role: Quad SPST switch enabling independent enable/disable of four signal paths with simultaneous high-Z isolation. Use Value: Reduces cross-talk and leakage current between powered and unpowered domains, improving system-level ESD robustness. |
| Low-Distortion Signal Gating | Multi-Voltage Logic Translation |
Use Scenario: Enabling/disabling clock or strobe signals in test equipment where minimal added jitter and amplitude loss are mandatory. IC Role / Device Role / Timing Role: Low-ron (3 Ω), low-Cio (5 pF) analog gate preserving rise/fall times and duty cycle fidelity. Use Value: Delivers <1% signal attenuation at 10 MHz and preserves edge monotonicity for precision timing applications. | Use Scenario: Interfacing a 1.8 V FPGA I/O bank to a 3.3 V sensor interface without level-shifter ICs or resistor dividers. IC Role / Device Role / Timing Role: Voltage-agnostic bidirectional switch supporting 0–5.5 V I/O swing independent of VCC setting. Use Value: Reduces BOM count and PCB area versus discrete MOSFET-based translators while ensuring glitch-free handshaking. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FET bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBTD3384CPWR | 10-bit configuration with 3-state outputs; higher ron (5 Ω typ); includes VCC isolation but no undershoot protection. | Suitable for wider data buses requiring output enable, not for transient-sensitive USB or hot-swap isolation. | Select when expanding to 10-bit paths and absolute undershoot immunity is not required. |
| PI3CHD3257LEX | Quad 2:1 mux (not SPST); 4.5 Ω ron; 6 pF Cio(OFF); supports 1.65–5.5 V VCC; no undershoot clamping. | Used for signal routing rather than simple gating; requires additional select logic and lacks −2 V transient hardening. | Choose only if multiplexing functionality is needed and board layout accommodates extra control lines. |
Compared with SN74CBT3125CPWR, SN74CBTD3384CPWR offers greater channel count but sacrifices undershoot protection and adds complexity, while PI3CHD3257LEX provides routing flexibility at the cost of deterministic gating behavior and transient resilience.
Availability
SN74CBT3125CPWR is available at Aetrix Electronics and suitable for USB interface design, industrial bus isolation, and low-distortion signal gating requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for SN74CBT3125CPWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies with over 90 years of innovation in high-reliability components.
The SN74CBT3125CPWR belongs to TI's CBT (Crossbar Bus Transceiver) family, engineered for ultra-low-latency, low-distortion signal switching in mixed-voltage digital systems and interface isolation applications.
FAQ
What is the maximum signal frequency supported by the SN74CBT3125CPWR?
The SN74CBT3125CPWR does not specify a hard bandwidth limit, but its 3 Ω ron and 5 pF Cio(OFF) yield an RC time constant of ~15 ps, supporting clean signal transmission up to ≥100 MHz for digital waveforms. Real-world use in USB 1.1 (12 Mbps) and parallel bus gating confirms reliable operation at full-speed data rates without added jitter.
Can the SN74CBT3125CPWR operate with VCC = 3.3 V?
No - the SN74CBT3125CPWR has a minimum VCC rating of 4 V per its recommended operating conditions. Operation below 4 V risks failure to activate undershoot protection circuitry and may cause undefined OE logic thresholds. For 3.3 V systems, consider TI's SN74CB3Q3257 or compatible alternatives.
Does the SN74CBT3125CPWR require external pull-up resistors on OE pins?
Yes - to ensure high-impedance state during power-up/power-down, each OE pin must be tied to VCC through a pull-up resistor. TI recommends ≥10 kΩ for standard CMOS drivers; value selection depends on driver sink strength and required turn-off speed, per SCBA004 application report.
How does the undershoot protection function in the SN74CBT3125CPWR?
The SN74CBT3125CPWR integrates active undershoot-protection circuitry on both A and B ports that senses voltage excursions below −2 V and forces the internal FET switch into the OFF state, preventing false conduction and potential damage. This occurs independently of OE state and requires no external components.
Is the SN74CBT3125CPWR pin-compatible with other packages in the same family?
Yes - the SN74CBT3125CPWR (TSSOP-14) shares identical pinout and function with SN74CBT3125CDR (SOIC-14), SN74CBT3125CDBR (SSOP-14), and SN74CBT3125CDGVR (TVSOP-14). All variants use the same 14-pin assignment: OE/A/B per channel, VCC, and GND in identical positions.
SN74CBT3125CPWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBT
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Bus Switch
- Circuit:
- 1 x 1:1
- Independent Circuits:
- 4
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
SN74CBT3125CPWR FAQ
1.How can I place an order for SN74CBT3125CPWR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74CBT3125CPWR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74CBT3125CPWR reliable?
The price and inventory of SN74CBT3125CPWR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74CBT3125CPWR is usually 5 days.
3.What payment methods are accepted for SN74CBT3125CPWR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74CBT3125CPWR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74CBT3125CPWR?
SN74CBT3125CPWR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74CBT3125CPWR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74CBT3125CPWR?
For technical support, including SN74CBT3125CPWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74CBT3125CPWR requirements.
6.How does Aetrix verify that SN74CBT3125CPWR is sourced from the original manufacturer or authorized distributors?
All SN74CBT3125CPWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBT3125CPWR meets industry standards.
7.What is the process for return or replacement of SN74CBT3125CPWR?
All SN74CBT3125CPWR units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBT3125CPWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBT3125CPWR part is unused and in its original packaging.
Return procedure for SN74CBT3125CPWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74CBT3125CPWR Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
