Texas Instruments SN74CBT3125DBQR
- Part No.:
- SN74CBT3125DBQR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SSOP (0.154", 3.90mm Width)
- Datasheet:
-
SN74CBT3125DBQR.pdf
- Description:
- IC BUS SWITCH 1 X 1:1 16SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,492
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Product details
Overview
SN74CBT3125DBQR from Texas Instruments is a quadruple FET bus switch IC with independent 5-Ω analog switches, TTL-compatible control inputs, and 4.0–5.5 V supply operation. It enables bidirectional signal routing in high-speed digital systems such as memory address/data buses and peripheral interconnects.
For engineers reviewing the SN74CBT3125DBQR datasheet, SN74CBT3125DBQR pinout, SN74CBT3125DBQR application, or SN74CBT3125DBQR equivalent, key selection criteria include on-state resistance (5–7 Ω), propagation delay (≤0.35 ns at 4 V), enable/disable timing (≤6 ns), thermal performance (θJA = 90°C/W), and SSOP-16 package compatibility with space-constrained PCB layouts.
Technical Context
This device implements four independent NMOS transmission gate switches, each controlled by a dedicated output-enable (OE) input. Each switch connects A and B ports bidirectionally when OE is low, presenting high-impedance isolation when OE is high.
It operates without level-shifting-supporting 5-V TTL logic thresholds (VIL ≤ 0.8 V, VIH ≥ 2 V) and tolerating input/output voltages up to 7 V. The design ensures power-up/power-down high-impedance safety via external pull-up resistors on OE pins to VCC.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply voltage (VCC) | 4.0–5.5 V - Ensures compatibility with standard 5-V logic rails and margin for voltage droop. |
| On-state resistance (ron) | 5–7 Ω at VCC = 4.5 V - Minimizes signal attenuation and distortion in high-speed data paths. |
| Propagation delay (tpd) | ≤0.35 ns at VCC = 4 V - Enables use in sub-nanosecond timing-critical applications like address multiplexing. |
| Enable time (ten) | ≤6 ns at VCC = 4 V - Supports fast dynamic bus allocation in burst-mode controllers. |
| Disable time (tdis) | ≤5.1 ns at VCC = 4 V - Guarantees rapid isolation to prevent bus contention during state transitions. |
| Input capacitance (Ci) | 3 pF - Reduces loading on driving logic and preserves signal edge integrity. |
| Off-state capacitance (Cio(OFF)) | 4 pF - Limits crosstalk between adjacent channels in dense multi-switch configurations. |
Pinout & Package
SN74CBT3125DBQR uses a 16-pin Shrink Small-Outline Package (SSOP-DBQ), 5.3 mm × 6.2 mm body, 0.65 mm lead pitch, 1.75 mm max height, JEDEC MO-137 compliant. Pin 1 index area located at top-left corner (Q1 quadrant in tape).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1OE, 2OE, 3OE, 4OE | Active-low enable inputs | Each controls one switch; low = A↔B conduction, high = high-Z isolation. |
| 1A–4A | Port A terminals | Bidirectional I/O side connected to source/driver (e.g., microcontroller port). |
| 1B–4B | Port B terminals | Bidirectional I/O side connected to load/peripheral (e.g., memory bank). |
| VCC | Positive supply | Power rail for internal FET biasing; must be decoupled locally (0.1 µF ceramic). |
| GND | Ground reference | Common return path for all switches and control logic; requires low-inductance connection. |
| NC (Pins 1 & 16) | No internal connection | Unbonded pads; must remain unconnected-no routing or stitching allowed. |
Key Features
| Feature | Design Value |
|---|---|
| Quadruple independent switches | Enables discrete control of four signal lines-ideal for selective bus gating without shared enable constraints. |
| 5-Ω typical on-resistance | Preserves signal integrity in 50-Ω and 75-Ω systems; supports <1% voltage drop at 64 mA per channel. |
| TTL-compatible inputs | Accepts standard 5-V logic levels directly-no external level shifters required for legacy controller interfaces. |
| High-impedance safe power sequencing | OE pins default to high-Z when un-driven; tie to VCC via pull-up to guarantee isolation at power-up/down. |
| Low capacitive loading (3–4 pF) | Minimizes timing skew and reflections on high-frequency traces-critical for >100 MHz data rates. |
Applications
| Memory Address Multiplexing | Peripheral Bus Isolation |
|---|---|
Use Scenario: Selectively route address lines between CPU and multiple SRAM/Flash banks while preventing bus contention. IC Role / Device Role / Timing Role: Bidirectional analog switch enabling/disabling address path per memory region under software control. Use Value: Eliminates need for discrete logic gates or complex CPLD-based address decoding; reduces board area and propagation delay. |
Use Scenario: Isolate USB, UART, or SPI peripherals during system sleep or firmware update to reduce leakage and noise coupling. IC Role / Device Role / Timing Role: Signal-path gate that disconnects peripheral I/O from host controller upon OE assertion. Use Value: Achieves <1 µA standby current per isolated line; prevents back-powering and ESD injection into powered domains. |
| Hot-Swappable Module Interface | Digital Test Access Port Switching |
Use Scenario: Enable safe insertion/removal of mezzanine cards by isolating data/address/control lines before physical connection. IC Role / Device Role / Timing Role: Controlled bus barrier that asserts high-Z state prior to card mating and releases only after power stabilization. Use Value: Prevents inrush current, ground bounce, and signal glitches during hot-plug events-meets IEC 61000-4-2 Level 4 robustness. |
Use Scenario: Route JTAG or SWD debug signals between multiple SoCs or FPGA configurations using a single test probe header. IC Role / Device Role / Timing Role: Low-capacitance multiplexer for boundary-scan chain selection without adding timing uncertainty. Use Value: Maintains TCK timing integrity (<0.35 ns added delay); avoids signal degradation across daisy-chained TAP controllers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FET bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBTD3384DBQR | Higher drive strength (128 mA), lower ron (3.5 Ω), but requires 3.3-V supply only. | Not suitable for mixed 5-V/3.3-V systems; incompatible with TTL-level inputs. | Select when operating exclusively at 3.3 V and requiring lower on-resistance for high-current loads. |
| 74LVC1G3157GW,125 | Single-channel, smaller XSON-6 package, 5-V tolerant inputs, ron = 8 Ω. | Lacks quad integration; requires four devices for same functionality-increases layout area and BOM count. | Choose for ultra-compact designs where only one signal line needs switching and board space is severely constrained. |
Compared with SN74CBT3125DBQR, SN74CBTD3384DBQR offers better analog performance at 3.3 V but sacrifices 5-V TTL compatibility, while 74LVC1G3157GW,125 trades integration density for footprint reduction-neither provides identical quad, 5-V, TTL-compatible switching in SSOP-16.
Availability
SN74CBT3125DBQR is available at Aetrix Electronics and suitable for memory subsystems, peripheral interface isolation, hot-swap module connectors, and digital test access routing requiring stable component supply and long-term industrial availability.
Supply support for SN74CBT3125DBQR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions, with over 50 years of innovation in high-reliability logic and interface products.
The SN74CBT3125DBQR belongs to TI's CBT (Crossbar Bus Transceiver) family, engineered for low-latency, low-distortion signal routing in high-speed digital systems where deterministic timing and minimal loading are critical.
FAQ
What is the maximum continuous current rating per channel of the SN74CBT3125DBQR?
The SN74CBT3125DBQR supports a continuous channel current of 128 mA per switch. This rating applies under recommended operating conditions (VCC = 4–5.5 V, TA = −40°C to 85°C) and assumes adequate PCB copper pour for thermal dissipation. Exceeding this limit risks thermal runaway or parametric shift in on-resistance.
Can the SN74CBT3125DBQR operate with a 3.3-V supply voltage?
No-the SN74CBT3125DBQR is specified only for 4.0–5.5 V operation. At 3.3 V, the device fails to meet guaranteed ron, propagation delay, and input threshold specifications. For 3.3-V systems, TI recommends SN74CBTD3384DBQR or SN74LVC1G3157, both explicitly characterized at 3.3 V.
How should unused OE inputs be handled on the SN74CBT3125DBQR?
All unused OE inputs on the SN74CBT3125DBQR must be tied to VCC (not left floating) to ensure the associated switch remains in high-impedance state. TI's application report SCBA004 confirms that floating OE pins may cause partial turn-on, increased ICC, or unpredictable bus contention due to CMOS input sensitivity.
Is the SN74CBT3125DBQR RoHS compliant and what is its moisture sensitivity level?
Yes, the SN74CBT3125DBQR is RoHS compliant (lead-free, NiPdAu terminal finish) and rated MSL Level-2-260°C-1 Year per JEDEC J-STD-020. This means it may be stored for up to 1 year at ≤30°C/60% RH and requires reflow within 1 year of dry-pack opening at peak temperature ≤260°C.
Does the SN74CBT3125DBQR support bidirectional signal flow between A and B ports?
Yes-the SN74CBT3125DBQR implements true bidirectional analog switching: signals pass equally well from A to B or B to A when the corresponding OE is low. This is inherent to its NMOS transmission gate architecture and confirmed in the function table and logic diagram of the official datasheet.
SN74CBT3125DBQR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBT
- Package/Case:
- 16-SSOP (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Bus Switch
- Circuit:
- 1 x 1:1
- Independent Circuits:
- 4
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
SN74CBT3125DBQR FAQ
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6.How does Aetrix verify that SN74CBT3125DBQR is sourced from the original manufacturer or authorized distributors?
All SN74CBT3125DBQR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBT3125DBQR meets industry standards.
7.What is the process for return or replacement of SN74CBT3125DBQR?
All SN74CBT3125DBQR units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBT3125DBQR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBT3125DBQR part is unused and in its original packaging.
Return procedure for SN74CBT3125DBQR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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