Texas Instruments SN74CBT3125PW
- Part No.:
- SN74CBT3125PW
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 14-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74CBT3125PW.pdf
- Description:
- IC BUS SWITCH 1 X 1:1 14TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:123
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Product details
Overview
SN74CBT3125PW from Texas Instruments is a quadruple FET bus switch IC with independent 5-Ω on-state resistance switches, TTL-compatible control inputs, and 4.0–5.5 V supply operation. It enables bidirectional signal routing in digital logic interfaces, commonly used in address/data bus isolation and hot-swap I/O buffering.
For engineers reviewing the SN74CBT3125PW datasheet, SN74CBT3125PW pinout, SN74CBT3125PW application, or SN74CBT3125PW equivalent, key selection criteria include on-resistance (5–7 Ω), propagation delay (≤0.35 ns at 4 V), enable/disable timing (≤6 ns), thermal resistance (113°C/W), and TSSOP-14 package compatibility with high-density PCB layouts.
Technical Context
This device implements four independent NMOS transmission-gate switches, each controlled by a dedicated output-enable (OE) input. Each switch connects A and B ports bidirectionally when OE is low, and presents high-impedance isolation when OE is high.
Designed for 3.3-V and 5-V logic systems, it features TTL-compatible input thresholds (VIL ≤ 0.8 V, VIH ≥ 2 V), supports ±128 mA continuous channel current per switch, and maintains rail-to-rail signal pass-through without level shifting.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 4.0 V to 5.5 V - ensures compatibility with both 3.3-V I/O tolerant and 5-V legacy logic systems |
| ron (Typ) | 5 Ω at VCC = 4.5 V - minimizes voltage drop and signal distortion in high-speed data paths |
| tpd (Max) | 0.35 ns at VCC = 4 V - enables sub-nanosecond signal routing critical for >1 GHz bus timing margins |
| ten / tdis (Max) | 6 ns / 5.1 ns - guarantees fast, deterministic bus enable/disable for dynamic resource sharing |
| θJA | 113°C/W - defines thermal derating limit for sustained 128 mA per channel in TSSOP-14 layout |
| Input Clamping | −0.5 V to 7 V - protects against overvoltage transients beyond supply rails during hot-plug events |
| ICC (Max) | 3 μA - ultra-low quiescent current preserves power integrity in always-on control logic |
Pinout & Package
TSSOP-14 (PW) package: 4.4 mm × 5.0 mm body, 0.65 mm pitch, 1.2 mm max height, lead-free NiPdAu finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 7, 10 | OE (Output Enable) | Active-low control per switch; tie high via pullup for power-up high-Z safety |
| 2, 5, 12, 14 | A Port | Input/output terminal of first port; bidirectional signal path with B port |
| 3, 6, 11, 13 | B Port | Input/output terminal of second port; electrically identical to A port |
| 8 | GND | Reference ground for all switches and control logic; requires low-inductance connection |
| 14 | VCC | Supply rail for switch conduction and control circuitry; bypass with 0.1 μF ceramic near pin |
Key Features
| Feature | Design Value |
|---|---|
| 5-Ω typical on-resistance | Enables <10 mV voltage drop at 20 mA, preserving TTL/CMOS logic thresholds across bus segments |
| Sub-nanosecond propagation delay | Supports >1 GHz clock-domain crossing and high-speed memory/data bus switching |
| Independent per-channel OE control | Allows selective isolation of individual data lines without affecting adjacent channels |
| TTL-compatible input thresholds | Direct interface with legacy 5-V microcontrollers and FPGAs without level-shifting circuitry |
| Rail-to-rail analog signal pass-through | Preserves full logic swing (0–VCC) for both digital and low-frequency analog signals like reset or clock enables |
Applications
| Memory Bus Isolation | Hot-Swap I/O Buffering |
|---|---|
Use Scenario: Isolating DRAM address/data lines between CPU and memory controller during partial reconfiguration. IC Role / Device Role / Timing Role: Bidirectional bus switch enabling/disabling signal paths under firmware control to prevent contention during memory remapping. Use Value: Prevents bus conflicts and latch-up during runtime memory partitioning with <6 ns enable/disable latency. | Use Scenario: Safely inserting/removing peripheral cards in industrial backplanes while main system remains powered. IC Role / Device Role / Timing Role: Signal gate that isolates card-side logic from backplane until power sequencing and handshaking complete. Use Value: Eliminates glitch propagation and ESD coupling during insertion using high-impedance state triggered by card detect signal. |
| FPGA I/O Expansion | Legacy Interface Bridging |
Use Scenario: Expanding FPGA GPIO count by multiplexing shared pins across multiple peripherals (e.g., SPI flash + UART). IC Role / Device Role / Timing Role: Logic-level translator and bus selector allowing one FPGA pin set to drive multiple downstream devices sequentially. Use Value: Reduces FPGA pin count requirement by 4× with <0.35 ns added delay, maintaining timing closure in high-speed designs. | Use Scenario: Interfacing modern 3.3-V microcontrollers with legacy 5-V parallel peripherals (e.g., printers, displays). IC Role / Device Role / Timing Role: Voltage-transparent bus switch enabling bidirectional communication without level-shifter latency or DC bias errors. Use Value: Maintains full logic swing integrity and eliminates shoot-through risk inherent in active translators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FET bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBTD3384PW | Higher VCC range (3–5.5 V), lower ron (3 Ω typ), but requires external VCC decoupling for 3.3-V operation | Preferred for mixed-voltage 3.3/5-V systems needing tighter on-resistance tolerance | Select when operating below 4 V or requiring <4 Ω ron; verify decoupling per TI SLVA792 |
| 74LVC1G3157GW | Single-channel, smaller XSON-6 package, 5-V tolerant inputs, but only 1 switch vs. quad configuration | Suitable for point-of-load isolation where space is constrained and channel count is low | Choose for compact single-line isolation; not scalable to quad-bus applications without replication |
Compared with SN74CBT3125PW, SN74CBTD3384PW offers better on-resistance at lower voltages but adds design complexity for dual-supply support, while 74LVC1G3157GW trades integration density for footprint reduction-neither provides identical quad-channel, 5-Ω, TTL-compatible functionality in TSSOP-14.
Availability
SN74CBT3125PW is available at Aetrix Electronics and suitable for memory bus isolation, hot-swap I/O buffering, FPGA I/O expansion, and legacy interface bridging requiring stable component supply and long-term industrial lifecycle support.
Supply support for SN74CBT3125PW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 50 years of innovation in high-reliability interface and signal-path components.
The SN74CBT3125PW belongs to the CBT (Crosspoint Bus Transceiver) family, engineered for low-latency, low-distortion digital signal routing in high-speed computing, communications, and industrial control infrastructure.
FAQ
What is the maximum continuous current rating per channel for the SN74CBT3125PW?
The SN74CBT3125PW supports up to 128 mA continuous channel current per switch, verified per absolute maximum ratings. This allows robust signal routing in 5-V logic buses and low-power analog paths. Exceeding this value risks thermal degradation or parametric shift. Always verify PCB trace width and copper weight to sustain 128 mA per channel in production layouts.
Does the SN74CBT3125PW require external pull-up resistors on OE pins?
Yes - to ensure high-impedance state during power-up or power-down, each OE pin of the SN74CBT3125PW must be tied to VCC through a pull-up resistor. The minimum value depends on the driver's current-sinking capability; TI recommends ≥10 kΩ for standard CMOS drivers. This prevents undefined switch states that could cause bus contention or latch-up.
Can the SN74CBT3125PW operate with a 3.3-V supply?
No - the SN74CBT3125PW has a specified minimum VCC of 4.0 V per recommended operating conditions. Operation below 4 V violates datasheet limits and may result in increased on-resistance (>10 Ω), slower switching, or failure to recognize TTL-high inputs. For 3.3-V systems, consider SN74CBTD3384PW or SN74LVC1G3157 as alternatives.
What is the thermal resistance (θJA) of the SN74CBT3125PW in its TSSOP-14 package?
The SN74CBT3125PW has a junction-to-ambient thermal resistance (θJA) of 113°C/W in the TSSOP-14 (PW) package, measured per JESD 51-7. This value assumes standard JEDEC 2S2P test board conditions. Real-world PCB layout with enhanced copper pour can reduce effective θJA by 20–30%, but thermal design must account for worst-case 128 mA per channel dissipation.
Is the SN74CBT3125PW pin-compatible with other '125-type bus switches in TSSOP-14?
Yes - the SN74CBT3125PW uses the industry-standard '125-type pinout for TSSOP-14 packages, matching SN74CBT3244PW, SN74CBT3245PW, and SN74CBT3383PW. Pin functions (OE, A/B pairs, VCC, GND) align exactly, enabling direct substitution in existing layouts where electrical specs (VCC range, ron, timing) meet design requirements.
SN74CBT3125PW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBT
- Package/Case:
- 14-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Bulk
- Product Status:
- Obsolete
- Type:
- Bus Switch
- Circuit:
- 1 x 1:1
- Independent Circuits:
- 4
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-TSSOP
SN74CBT3125PW FAQ
1.How can I place an order for SN74CBT3125PW through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74CBT3125PW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74CBT3125PW reliable?
The price and inventory of SN74CBT3125PW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74CBT3125PW is usually 5 days.
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5.How can I obtain technical support or documentation for SN74CBT3125PW?
For technical support, including SN74CBT3125PW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74CBT3125PW requirements.
6.How does Aetrix verify that SN74CBT3125PW is sourced from the original manufacturer or authorized distributors?
All SN74CBT3125PW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBT3125PW meets industry standards.
7.What is the process for return or replacement of SN74CBT3125PW?
All SN74CBT3125PW units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBT3125PW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBT3125PW part is unused and in its original packaging.
Return procedure for SN74CBT3125PW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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