Texas Instruments SN74CBTD3384CDW

Overview

SN74CBTD3384CDW from Texas Instruments is a 10-bit high-speed TTL-compatible FET bus switch with dual 5-bit sections, 3 Ω typical ON-state resistance, −2 V undershoot protection on A/B ports, and integrated 5-V-to-3.3-V level shifting. It enables bidirectional signal gating in memory interleaving and bus isolation applications operating across 4.5–5.5 V supply.

For engineers reviewing the SN74CBTD3384CDW datasheet, SN74CBTD3384CDW pinout, SN74CBTD3384CDW application, or SN74CBTD3384CDW equivalent, key selection criteria include its Ioff partial-power-down support, 5 pF OFF-state I/O capacitance, 0.15 ns propagation delay, and SOIC-24 package compatibility with legacy 5-V/3.3-V mixed-signal interconnects.

Technical Context

The SN74CBTD3384CDW implements two independent 5-bit FET bus switches controlled by separate OE inputs (1OE, 2OE), supporting either dual 5-bit or unified 10-bit operation. Each switch uses low-threshold MOSFETs with integrated clamp diodes to VCC for level shifting and undershoot protection.

Its architecture provides near-zero propagation delay via minimal RC time constant (ron ≈ 3 Ω × Cio(OFF) ≈ 5 pF), supports 0–5 V data signaling across seven logic families, and ensures isolation during power-down via Ioff current ≤10 µA at VCC = 0 V.

Key Specifications

Pinout & Package

SN74CBTD3384CDW is housed in a 24-pin SOIC (DW) package, 7.5 mm wide, 15.4 mm long, 2.35 mm max height, with 1.27 mm lead pitch and RoHS-compliant NiPdAu finish. Thermal resistance θJA = 46°C/W enables operation up to 85°C ambient without forced cooling.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar bus switch applications.

Compared with SN74CBT3384CDW and SN74LVC1G3157DCKR, the SN74CBTD3384CDW uniquely combines dual 5-bit width, integrated level shifting, −2 V undershoot hardening, and Ioff-enabled power-domain isolation-making it irreplaceable in mixed-voltage memory and hot-plug bus architectures.

Availability

SN74CBTD3384CDW is available at Aetrix Electronics and suitable for memory interleaving, bus isolation, and low-distortion signal gating applications requiring stable component supply, long-term industrial lifecycle support, and RoHS-compliant SOIC packaging.

Supply support for SN74CBTD3384CDW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with over 90 years of innovation in high-reliability industrial and automotive components.

The SN74CBTD3384CDW belongs to TI's CBTD family of high-speed FET bus switches, engineered specifically for low-latency, low-distortion signal routing in mixed-voltage digital systems and memory subsystems.

FAQ

What is the maximum undershoot voltage the SN74CBTD3384CDW can withstand on its A and B ports?

The SN74CBTD3384CDW features active undershoot-protection circuitry that guarantees safe operation with transient voltages down to −2 V on both A and B ports when the switch is disabled. This prevents unintended conduction and latch-up during hot-plug events or noisy power-rail transitions, as verified per the absolute maximum ratings and undershoot characterization in the SCDS133A datasheet.

Does the SN74CBTD3384CDW support level shifting between 5-V and 3.3-V logic domains?

Yes, the SN74CBTD3384CDW integrates a diode-connected path to VCC that enables reliable 5-V input to 3.3-V output level shifting without external components. This function is explicitly confirmed in the device description, functional diagram, and level shifter parameter measurement section of the SCDS133A datasheet.

What is the ON-state resistance (ron) specification for the SN74CBTD3384CDW?

The SN74CBTD3384CDW has a typical ON-state resistance of 3 Ω at VCC = 4.5 V, with a maximum of 6 Ω under worst-case conditions. This value is measured between A and B terminals with 30 mA current and is critical for minimizing voltage drop and maintaining signal integrity in high-speed data paths.

Can the SN74CBTD3384CDW be used in partial-power-down systems?

Yes, the SN74CBTD3384CDW supports partial-power-down operation via its Ioff feature, which limits off-state current to ≤10 µA when VCC = 0 V. This ensures no damaging back-current flows from live I/O lines into the unpowered device, satisfying JESD78 Class II latch-up immunity and enabling safe use in modular or hot-swap architectures.

What package type and dimensions does the SN74CBTD3384CDW use?

The SN74CBTD3384CDW uses a 24-pin SOIC (DW) package measuring 15.4 mm × 7.5 mm × 2.35 mm with 1.27 mm lead pitch. Its mechanical outline matches JEDEC MO-150, and thermal resistance is specified at θJA = 46°C/W - confirmed in the TI package drawings MSSO002E and ordering information tables.