Texas Instruments SN74CBTD3861DWG4
- Part No.:
- SN74CBTD3861DWG4
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
SN74CBTD3861DWG4.pdf
- Description:
- IC BUS SWITCH 10 X 1:1 24SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,010
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74CBTD3861DWG4 from Texas Instruments is a 10-bit FET bus switch with integrated level-shifting capability, designed for bidirectional 5-V-to-3.3-V signal translation in high-speed digital systems. It features 5-Ω on-state resistance, TTL-compatible inputs, and a single OE control enabling/disabling all ten channels simultaneously. Used in mixed-voltage memory and data bus interfaces where minimal propagation delay (<0.35 ns) and low channel crosstalk are critical.
For engineers reviewing the SN74CBTD3861DWG4 datasheet, SN74CBTD3861DWG4 pinout, SN74CBTD3861DWG4 application, or SN74CBTD3861DWG4 equivalent, key selection criteria include verified 5-Ω ron, guaranteed 4.5–5.5 V supply operation, OE-controlled high-impedance isolation, and TSSOP-24 package compatibility with 0.65-mm pitch PCB layouts.
Technical Context
This device implements a monolithic 10-channel analog switch using NMOS FETs with integrated input diodes to VCC, enabling passive level shifting from 5-V inputs to 3.3-V outputs without external components. The OE input controls all channels synchronously in positive logic: low enables conduction, high forces high-impedance isolation between A and B ports.
It operates strictly within 4.5–5.5 V supply range and supports continuous channel current up to 128 mA per switch. Input clamp current rating (–50 mA) and absolute max VI of –0.5 V to 7 V ensure robustness against transient overvoltage during hot-swap or bus contention events.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-state resistance (ron) | 5 Ω typical at VCC = 4.5 V, ensuring <10 mV drop at 2 mA and preserving signal integrity in low-voltage buses. |
| Propagation delay (tpd) | 0.35 ns typical, enabling sub-nanosecond timing in high-speed address/data paths without added skew. |
| Supply voltage range | 4.5 V to 5.5 V - strict compliance prevents malfunction in noisy 5-V rail environments. |
| Input voltage compatibility | TTL-compatible VIH ≥ 2 V / VIL ≤ 0.8 V, allowing direct interfacing with legacy 5-V logic families. |
| Channel count & control | 10-bit unidirectional/bidirectional switch with single OE input - simplifies PCB routing and reduces GPIO overhead. |
| Level-shifting function | Diode-to-VCC architecture enables 5-V-to-3.3-V translation without external biasing or direction control logic. |
| Off-state capacitance (Cio(OFF)) | 4 pF maximum at VO = 3 V - minimizes capacitive loading and signal degradation when disabled. |
Pinout & Package
TSSOP-24 package (PW), 7.9 mm × 4.5 mm × 1.2 mm body, 0.65 mm lead pitch, exposed pad not present, RoHS-compliant NiPdAu finish, MSL Level-1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 (A1–A10) | Input/Output port A | Bidirectional signal terminal connected through low-ron FET to corresponding B pin when OE is low. |
| 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 (B1–B10) | Input/Output port B | Bidirectional signal terminal - electrically isolated from A port when OE is high; supports level-shifted output. |
| 12 | VCC | 5-V power supply input - must be decoupled locally; powers internal FETs and clamp diodes. |
| 11 | GND | Ground reference for all I/O and internal circuitry - requires low-inductance connection to system ground plane. |
| 23 | OE | Active-low output-enable control - drives entire 10-bit switch; must be held at VCC or GND to prevent floating state. |
| 24, 1 | NC | No internal connection - left unconnected; no routing or thermal relief required. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated level-shifting diodes | Enables 5-V-to-3.3-V translation without external resistors or direction pins - reduces BOM count by ≥2 components per channel. |
| Low on-state resistance | 5 Ω typical ensures <50 mV voltage drop at 10 mA, maintaining noise margin in 3.3-V LVTTL/LVCMOS interfaces. |
| TTL-compatible control inputs | VIH/VIL thresholds match standard 5-V TTL, eliminating need for level translators on OE line. |
| High-speed switching | 0.35 ns tpd and 6 ns tdis support >1 GHz data rates in burst-mode memory access applications. |
| Low off-state capacitance | 4 pF Cio(OFF) limits capacitive loading on idle buses, preserving signal rise/fall times in multi-drop configurations. |
Applications
| Memory Bus Interface | PCI/ISA Local Bus Translation |
|---|---|
Use Scenario: Interfacing a 5-V microcontroller address/data bus to a 3.3-V SRAM or Flash memory array. IC Role / Device Role / Timing Role: Bidirectional level-shifting bus switch enabling synchronous read/write cycles across voltage domains. Use Value: Eliminates discrete resistor-divider networks while maintaining sub-nanosecond timing alignment between address strobes and data valid windows. | Use Scenario: Adapting legacy 5-V PCI or ISA peripheral cards to modern 3.3-V host controllers. IC Role / Device Role / Timing Role: Voltage-domain translator for AD[31:0], C/BE#[3:0], and PAR signals under PCI clocking. Use Value: Provides deterministic 5-V-to-3.3-V conversion without adding setup/hold time penalties or requiring direction-control logic. |
| Hot-Swappable Backplane Interface | Multi-Voltage FPGA I/O Bridging |
Use Scenario: Isolating 5-V backplane signals from 3.3-V hot-plug module I/O during insertion/removal sequences. IC Role / Device Role / Timing Role: OE-controlled isolation switch preventing bus contention and voltage backfeed during live insertion. Use Value: High-impedance state (≥1012 Ω) blocks leakage currents and avoids false triggering of downstream receivers during transition states. | Use Scenario: Connecting 5-V sensor interface peripherals to a 3.3-V FPGA I/O bank with mixed-voltage bank configuration. IC Role / Device Role / Timing Role: Level-translating buffer for parallel sensor data lines (e.g., ADC output bus). Use Value: Maintains signal fidelity across 10-bit wide paths with matched propagation delays, avoiding inter-bit skew in time-critical sampling windows. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FET bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBT3861PW | Same die, identical electrical specs, but marked CC861 and shipped in tube (SPQ=60) vs. tape-and-reel (SPQ=2000). | No functional difference; suitable for prototyping or low-volume builds where reel handling is impractical. | Select SN74CBT3861PW only if tube packaging aligns with assembly line feeder requirements. |
| SN74LVC4245APWR | Octal dual-supply translator (not bus switch); requires separate VCCA/VCCB rails and direction control; higher Cio (10 pF) and slower tpd (5.4 ns). | Used where independent voltage domain control and directionality are needed - not a drop-in replacement for OE-gated bidirectional switching. | Choose SN74LVC4245APWR only when bidirectional level shifting with independent rail control is required, not for simple bus gating. |
Compared with SN74CBTD3861DWG4, SN74CBT3861PW offers identical performance in tube format, while SN74LVC4245APWR provides dual-rail flexibility at the cost of added complexity, reduced speed, and higher capacitance - making it unsuitable for high-frequency bus isolation tasks.
Availability
SN74CBTD3861DWG4 is available at Aetrix Electronics and suitable for memory subsystems, industrial backplanes, FPGA I/O bridging, and legacy bus upgrades requiring stable component supply and long-term obsolescence mitigation.
Supply support for SN74CBTD3861DWG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company specializing in analog, embedded processing, and logic solutions with broad industrial and automotive qualification coverage.
The SN74CBTD3861DWG4 belongs to TI's 74CBT family of high-speed CMOS bus switches, engineered specifically for low-latency, low-power voltage translation in mixed-signal computing and communications infrastructure.
FAQ
What is the maximum continuous current rating per channel for the SN74CBTD3861DWG4?
The SN74CBTD3861DWG4 supports a continuous channel current of 128 mA per switch. This rating is specified under recommended operating conditions (VCC = 4.5 V to 5.5 V) and ensures reliable conduction without thermal runaway or parametric shift. Exceeding this value risks permanent damage to the internal FET structure, especially under sustained load or elevated ambient temperature.
Does the SN74CBTD3861DWG4 require external pull-up or pull-down resistors on the OE pin?
No, the SN74CBTD3861DWG4 does not require external pull-up or pull-down resistors on the OE pin - but unused OE must be actively driven to VCC or GND. TI's SCBA004 application report specifies that floating OE inputs cause undefined switching behavior and increased ICC. The SN74CBTD3861DWG4's OE input has TTL-compatible thresholds (VIL ≤ 0.8 V, VIH ≥ 2 V), so direct connection to a microcontroller GPIO or fixed rail satisfies this requirement.
Can the SN74CBTD3861DWG4 translate signals from 3.3 V to 5 V?
No, the SN74CBTD3861DWG4 is designed exclusively for 5-V-to-3.3-V level shifting via its internal diode-to-VCC architecture. Driving 3.3-V signals into port A will not produce 5-V outputs at port B because the diode only conducts toward VCC. Attempting reverse translation results in degraded VOL, increased propagation delay, and potential latch-up risk. For bidirectional translation, a dedicated dual-supply translator like SN74LVC4245A is required.
What is the thermal impedance (θJA) of the SN74CBTD3861DWG4 in its TSSOP-24 package?
The SN74CBTD3861DWG4 in the PW (TSSOP-24) package has a specified junction-to-ambient thermal impedance (θJA) of 88°C/W under JEDEC JESD51-7 conditions. This value assumes a standard 2-layer board with 1-in² copper pour. Actual thermal performance improves significantly with internal layer copper planes and thermal vias - design guidelines recommend ≥4 thermal vias under the package body to reduce θJA by ~25%.
Is the SN74CBTD3861DWG4 pin-compatible with other packages in the same family?
Yes, the SN74CBTD3861DWG4 shares identical pinout and functionality with all 24-pin variants in the SN74CBTD3861 family, including DW (SOIC), DB (SSOP), DBQ (QSOP), DGV (TVSOP), and PW (TSSOP). All variants use the same top-view pin mapping: A1–A10 on left side, B1–B10 on right side, OE at pin 23, VCC at pin 12, GND at pin 11, and NC at pins 1 and 24. Mechanical dimensions differ, but PCB footprint must be adapted per package drawing.
SN74CBTD3861DWG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBTD
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Type:
- Bus Switch
- Circuit:
- 10 x 1:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SOIC
SN74CBTD3861DWG4 FAQ
1.How can I place an order for SN74CBTD3861DWG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74CBTD3861DWG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74CBTD3861DWG4 reliable?
The price and inventory of SN74CBTD3861DWG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74CBTD3861DWG4 is usually 5 days.
3.What payment methods are accepted for SN74CBTD3861DWG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74CBTD3861DWG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74CBTD3861DWG4?
SN74CBTD3861DWG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74CBTD3861DWG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74CBTD3861DWG4?
For technical support, including SN74CBTD3861DWG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74CBTD3861DWG4 requirements.
6.How does Aetrix verify that SN74CBTD3861DWG4 is sourced from the original manufacturer or authorized distributors?
All SN74CBTD3861DWG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBTD3861DWG4 meets industry standards.
7.What is the process for return or replacement of SN74CBTD3861DWG4?
All SN74CBTD3861DWG4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBTD3861DWG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBTD3861DWG4 part is unused and in its original packaging.
Return procedure for SN74CBTD3861DWG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74CBTD3861DWG4 Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
