Texas Instruments SN74CBTLV3384DGVR
- Part No.:
- SN74CBTLV3384DGVR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 24-TFSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74CBTLV3384DGVR.pdf
- Description:
- IC BUS SWITCH 5 X 1:1 24TVSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SN74CBTLV3384DGVR from Texas Instruments is a low-voltage 10-bit FET bus switch IC designed for high-speed bidirectional data routing in 2.3–3.6 V systems. It features dual 5-bit independent switches, 5 Ω typical on-state resistance, rail-to-rail signal switching, and Ioff support for partial-power-down mode. It is used in memory expansion interfaces, CPU-to-peripheral interconnects, and hot-swap-capable backplane buffers.
For engineers reviewing the SN74CBTLV3384DGVR datasheet, SN74CBTLV3384DGVR pinout, SN74CBTLV3384DGVR application, or SN74CBTLV3384DGVR equivalent, key selection criteria include its 24-pin TVSOP package, sub-0.25 ns propagation delay at 3.3 V, ±1 μA max control input leakage, and guaranteed isolation during power-off via Ioff.
Technical Context
This device implements two independent 5-bit FET-based analog switches controlled by separate OE inputs, enabling flexible 5-bit or consolidated 10-bit bus gating. Each switch path supports bidirectional signal flow with no direction pin, and operates across the full supply range (2.3 V to 3.6 V) without level translation.
The architecture leverages low-threshold CMOS transmission gates to achieve 5 Ω typical ron, <10 pF off-state capacitance (Cio(OFF)), and <5.5 ns enable/disable timing. Ioff protection ensures <10 μA backdrive current when VCC = 0 V and ports are biased up to 3.6 V - critical for mixed-voltage system interoperability.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2.3 V to 3.6 V - compatible with 2.5 V and 3.3 V logic domains without external level shifters. |
| On-State Resistance (ron) | 5 Ω typical at VCC = 3 V - minimizes voltage drop and signal distortion for ≤64 mA channel current. |
| Propagation Delay (tpd) | 0.15–0.25 ns at VCC = 3.3 V - enables GHz-range data path switching in high-speed digital interfaces. |
| Ioff Current | 10 μA max at VCC = 0 V - prevents damaging back-current during partial power-down or hot insertion. |
| Off-State Capacitance (Cio(OFF)) | 10 pF max - reduces crosstalk and loading on adjacent signal lines in dense PCB layouts. |
| ESD Rating | ±2000 V HBM, ±200 V MM - meets industrial-grade robustness requirements without external protection. |
| Operating Temperature | −40°C to +85°C - qualified for extended-temperature industrial and communications equipment. |
Pinout & Package
SN74CBTLV3384DGVR uses a 24-pin Thin Very Small Outline Package (TVSOP, DGV), 4.4 mm × 6.6 mm body, 0.4 mm pitch, 1.2 mm max height, JEDEC MO-153 compliant. Pin 1 index located at top-left corner with beveled edge marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 12, 24 | GND | Ground reference for all internal circuitry and switch return paths; requires low-inductance connection. |
| 11, 23 | VCC | Primary power supply (2.3–3.6 V); decoupling capacitor required within 1 cm of these pins. |
| 1OE (Pin 1) | Output Enable 1 | Active-low control for first 5-bit switch (1A1–1A5 ↔ 1B1–1B5); tie to VCC via pullup for power-up high-Z. |
| 2OE (Pin 24) | Output Enable 2 | Active-low control for second 5-bit switch (2A1–2A5 ↔ 2B1–2B5); independent of 1OE. |
| 1A1–1A5 (Pins 3–7) | Port A Group 1 | Input/output terminals for first 5-bit switch; bidirectional, rail-to-rail capable. |
| 1B1–1B5 (Pins 2, 8–10) | Port B Group 1 | Complementary I/O port for first switch; electrically identical to 1Ax, no direction dependency. |
| 2A1–2A5 (Pins 13–17) | Port A Group 2 | Input/output terminals for second 5-bit switch; fully isolated from Group 1 when disabled. |
| 2B1–2B5 (Pins 18–22) | Port B Group 2 | Complementary I/O port for second switch; supports independent enable/disable sequencing. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog switching | Supports signals from GND to VCC without clipping - preserves logic high/low margins in mixed-signal paths. |
| Independent dual 5-bit control | Two separate OE inputs allow staggered enable/disable of bus segments - essential for glitch-free memory bank switching. |
| Ioff partial-power-down protection | Blocks >99.9% of backdrive current when unpowered - eliminates need for external isolation diodes in hot-plug systems. |
| Ultra-low propagation delay | Sub-0.25 ns tpd at 3.3 V - maintains timing integrity in DDR, PCI Express Gen 1, and high-speed parallel bus applications. |
| Low off-state capacitance | 10 pF Cio(OFF) - minimizes capacitive loading on adjacent traces, reducing crosstalk in 10+ layer PCBs. |
Applications
| Memory Expansion Interface | CPU-to-Peripheral Interconnect |
|---|---|
|
Use Scenario: Expanding SRAM or Flash memory capacity on microcontroller-based industrial controllers using shared address/data buses. IC Role / Device Role / Timing Role: Bidirectional bus switch isolating memory banks during access arbitration; enables dynamic bank selection without bus contention. Use Value: Eliminates need for tristate buffers and glue logic; 5 Ω ron preserves signal rise/fall times across 10-bit parallel bus at 50 MHz. |
Use Scenario: Connecting an ARM Cortex-M7 MCU to multiple peripheral ICs (ADC, DAC, UART transceivers) sharing a common data bus. IC Role / Device Role / Timing Role: Selective bus gate that routes data between CPU and one peripheral at a time; OE-controlled isolation prevents signal collisions. Use Value: Enables single-bus multi-peripheral topology with <0.25 ns added delay - maintains real-time response in deterministic control loops. |
| Hot-Swap Backplane Buffer | FPGA I/O Expansion Hub |
|
Use Scenario: Providing safe, live-insertion-capable data path between a hot-swap module and main system backplane in telecom line cards. IC Role / Device Role / Timing Role: Isolation switch activated only after module power stabilization; Ioff blocks backfeed during insertion/removal sequences. Use Value: Meets Telcordia GR-1089-CORE surge immunity requirements; 10 μA Ioff prevents damage to powered-backplane logic during hot plug. |
Use Scenario: Extending limited FPGA I/O count by multiplexing external sensors, displays, and communication interfaces onto shared GPIO banks. IC Role / Device Role / Timing Role: Configurable 10-bit I/O expander controlled by FPGA GPIOs; dual OE allows independent sensor read/write channel management. Use Value: Reduces FPGA pin count requirement by 10 pins while maintaining full-speed operation - critical for cost-sensitive BGA-packaged FPGAs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar FET bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBT3384DGVR | Higher VCC range (4.5–5.5 V), 7 Ω ron, no Ioff support - not suitable for partial-power-down. | Designed for 5 V legacy systems only; incompatible with 3.3 V-only designs or hot-swap scenarios. | Select only if operating exclusively at 5 V and Ioff is unnecessary. |
| SN74LVC1G3157DCKR | Single-channel SPDT switch, 3.7 Ω ron, 3.3 V only, no dual-OE - requires 10× devices for full 10-bit function. | Used for point-to-point signal routing, not bus-wide switching; lacks group enable control and scalability. | Choose only for low-pin-count, low-channel-count applications where board space permits discrete channel replication. |
Compared with SN74CBTLV3384DGVR, SN74CBT3384DGVR trades Ioff and low-voltage operation for higher drive strength in 5 V systems, while SN74LVC1G3157DCKR offers better ron per channel but forces layout complexity and timing skew across ten independent switches.
Availability
SN74CBTLV3384DGVR is available at Aetrix Electronics and suitable for memory expansion interfaces, CPU-to-peripheral interconnects, and hot-swap backplane buffers requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for SN74CBTLV3384DGVR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with over 50 years of innovation in high-reliability interface solutions.
The SN74CBTLV3384DGVR belongs to TI's CBTLV (ColdBond™ Low-Voltage) logic family, engineered specifically for ultra-low-delay, low-power bus switching in portable, industrial, and communications infrastructure equipment.
FAQ
What is the maximum continuous current rating per channel for SN74CBTLV3384DGVR?
The SN74CBTLV3384DGVR supports a continuous channel current of 128 mA per switch path, verified under absolute maximum ratings. This allows reliable operation with standard 50 Ω terminated lines and typical 3.3 V CMOS drive strengths without thermal derating at 85°C ambient.
Does SN74CBTLV3384DGVR require external pull-up resistors on its OE pins?
Yes - to ensure high-impedance state during power-up or power-down, OE pins must be tied to VCC through a pull-up resistor. The minimum value depends on the driver's current-sinking capability; TI recommends ≥10 kΩ for standard CMOS drivers to guarantee proper initialization before VCC stabilizes.
Can SN74CBTLV3384DGVR operate with 2.5 V and 3.3 V supplies simultaneously on different ports?
No - SN74CBTLV3384DGVR has a single VCC pin powering all internal circuitry and switches. Both A and B ports must remain within the same 2.3–3.6 V supply domain; it does not provide level-shifting functionality between disparate voltage rails.
What is the thermal resistance (θJA) of the SN74CBTLV3384DGVR in its TVSOP package?
The SN74CBTLV3384DGVR in the DGV (TVSOP) package has a junction-to-ambient thermal resistance (θJA) of 86°C/W, measured per JESD 51-7. This value assumes standard JEDEC 2-layer board conditions; actual performance improves with PCB copper pour and thermal vias under the exposed pad area.
Is SN74CBTLV3384DGVR pin-compatible with other packages in the same family?
Yes - SN74CBTLV3384DGVR shares identical pinout and function mapping with SN74CBTLV3384DBQR (SSOP), SN74CBTLV3384DWR (SOIC), and SN74CBTLV3384PWR (TSSOP). All variants use the same 24-pin configuration, signal assignment, and electrical behavior - enabling direct package substitution without PCB redesign.
SN74CBTLV3384DGVR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBTLV
- Package/Case:
- 24-TFSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Bus Switch
- Circuit:
- 5 x 1:1
- Independent Circuits:
- 2
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2.3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TVSOP
SN74CBTLV3384DGVR FAQ
1.How can I place an order for SN74CBTLV3384DGVR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74CBTLV3384DGVR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74CBTLV3384DGVR reliable?
The price and inventory of SN74CBTLV3384DGVR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74CBTLV3384DGVR is usually 5 days.
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Once your SN74CBTLV3384DGVR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74CBTLV3384DGVR?
For technical support, including SN74CBTLV3384DGVR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74CBTLV3384DGVR requirements.
6.How does Aetrix verify that SN74CBTLV3384DGVR is sourced from the original manufacturer or authorized distributors?
All SN74CBTLV3384DGVR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBTLV3384DGVR meets industry standards.
7.What is the process for return or replacement of SN74CBTLV3384DGVR?
All SN74CBTLV3384DGVR units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBTLV3384DGVR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBTLV3384DGVR part is unused and in its original packaging.
Return procedure for SN74CBTLV3384DGVR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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