Texas Instruments SN74CBTLV3861DGVR
- Part No.:
- SN74CBTLV3861DGVR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 24-TFSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74CBTLV3861DGVR.pdf
- Description:
- IC BUS SWITCH 10 X 1:1 24TVSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,615
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Product details
Overview
SN74CBTLV3861DGVR from Texas Instruments is a 10-bit high-speed bus switch IC with 5-Ω on-state resistance, rail-to-rail signal switching, and Ioff partial-power-down support. It operates from 2.3 V to 3.6 V, delivers sub-nanosecond propagation delay (0.15 ns typ), and is used in hot-swap-capable backplane interconnects and memory expansion interfaces.
For engineers reviewing the SN74CBTLV3861DGVR datasheet, SN74CBTLV3861DGVR pinout, SN74CBTLV3861DGVR application, or SN74CBTLV3861DGVR equivalent, key selection criteria include guaranteed 5-Ω ron at 2.5 V/3.3 V, flow-through pinout for PCB layout optimization, Ioff leakage <10 µA during power-down, and TVSOP-24 package compatibility with high-density routing.
Technical Context
This device implements ten independent bilateral FET switches controlled by a single active-low OE input. Each switch supports bidirectional signal flow with no level translation, enabling direct connection between A- and B-side buses without directionality constraints.
Its Ioff protection ensures isolation when VCC = 0 V, preventing backflow current up to ±3.6 V at terminals. The flow-through architecture places A1–A10 on one side and B1–B10 on the opposite side, minimizing trace crossovers in high-speed layouts.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-state resistance (ron) | 5 Ω typical at VCC = 2.5 V, ensuring minimal voltage drop and signal attenuation across switched paths |
| Propagation delay (tpd) | 0.15 ns typical at VCC = 2.5 V, enabling GHz-range data path switching without timing penalty |
| Ioff leakage current | <10 µA at VCC = 0 V, guaranteeing safe partial-power-down operation in mixed-voltage systems |
| Supply voltage range | 2.3 V to 3.6 V, compatible with 2.5 V and 3.3 V logic domains without level shifters |
| Input capacitance (Ci) | 3 pF per control input, reducing loading on upstream drivers and preserving signal integrity |
| Off-state capacitance (Cio(OFF)) | 5 pF at OE = VCC, minimizing crosstalk and capacitive coupling between isolated ports |
| Operating temperature | −40°C to +85°C, qualified for industrial-grade embedded and communications equipment |
Pinout & Package
SN74CBTLV3861DGVR uses a 24-pin Thin Very Small Outline Package (TVSOP) with 0.4 mm pitch, 6.6 mm × 4.4 mm body size, and 1.2 mm max height - optimized for high-density PCBs and automated assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 24 | No internal connection (NC) | Unused pins; must remain unconnected to avoid parasitic coupling or mechanical stress |
| 2–11 (A1–A10) | Port A data terminal | Input/output node for first 10-bit bus; bidirectional, rail-to-rail capable |
| 12 | GND | Power ground reference for all internal circuitry and signal return path |
| 13 | VCC | Positive supply (2.3–3.6 V); powers switch FETs and control logic |
| 14 | OE | Active-low output enable; drives switch ON (A↔B connected) when low, OFF (high-Z) when high |
| 15–23 (B1–B10) | Port B data terminal | Input/output node for second 10-bit bus; electrically identical to Port A, fully bidirectional |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail analog switching | Supports full-swing signals from GND to VCC without distortion or clipping, enabling use with mixed-voltage buses |
| Flow-through pinout | A1–A10 and B1–B10 arranged on opposite sides of package, eliminating layer jumps and vias in PCB routing |
| Ioff partial-power-down protection | Blocks current flow when VCC = 0 V, allowing safe insertion/removal in live backplanes and hot-swap systems |
| Latch-up immunity | Exceeds 100 mA per JESD 78 Class II, ensuring robustness against transient overvoltage and ESD-induced latch-up |
| Low dynamic power consumption | ICC = 10 µA typical at VCC = 3.6 V, reducing quiescent load in always-on subsystems |
Applications
| Server Memory Expansion | Industrial Backplane Interconnect |
|---|---|
|
Use Scenario: Adding DDR memory modules to a server motherboard while maintaining signal integrity across multiple DIMM slots. IC Role / Device Role / Timing Role: Bidirectional bus switch isolating memory address/control lines between CPU and added DIMMs during configuration. Use Value: 5-Ω ron minimizes stub-induced reflections; flow-through pinout enables straight trace routing across dense memory banks. |
Use Scenario: Enabling hot-plug capability for I/O cards in programmable logic controller (PLC) backplanes. IC Role / Device Role / Timing Role: Signal path gate controlling data bus access between main controller and field I/O modules during insertion/removal. Use Value: Ioff leakage <10 µA prevents backfeeding into powered-down card slots, meeting IEC 61000-4-2 system-level ESD requirements. |
| Test Equipment Signal Routing | High-Speed FPGA Configuration Interface |
|
Use Scenario: Multiplexing probe signals between multiple DUTs in automated test equipment (ATE) without signal degradation. IC Role / Device Role / Timing Role: Low-capacitance (5 pF off-state) analog switch selecting between parallel test channels. Use Value: Sub-0.25 ns tpd preserves edge fidelity for >1 GHz test waveforms; 3 pF input capacitance avoids driver loading. |
Use Scenario: Isolating configuration bitstreams between dual-FPGA systems during reconfiguration sequences. IC Role / Device Role / Timing Role: Controlled bus gate synchronizing JTAG or SelectMAP interface access between master and slave FPGAs. Use Value: OE-controlled high-impedance state eliminates contention during bitstream handoff; rail-to-rail support handles 2.5 V configuration voltages. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBT3245APW | 8-bit, non-inverting, 3.3 V only (2.7–3.6 V), higher ron (7 Ω typ), TSSOP-20 | Limited to 8-bit paths; lacks Ioff specification for true partial-power-down | Choose for cost-sensitive 8-bit applications where full Ioff compliance is not required |
| SN74LVC1G3157DBVR | Single-pole double-throw (SPDT), 1-channel, 1.65–5.5 V, 6 Ω ron, SOT-23-6 | Not scalable to 10-bit parallel operation; requires 10x devices for equivalent function | Use only for discrete signal routing where density and board space outweigh channel count needs |
Compared with SN74CBTLV3861DGVR, SN74CBT3245APW offers lower unit cost but sacrifices Ioff safety and channel count, while SN74LVC1G3157DBVR provides wider voltage range but introduces layout complexity and timing skew across ten independent switches.
Availability
SN74CBTLV3861DGVR is available at Aetrix Electronics and suitable for industrial backplane interconnects, server memory expansion systems, and high-speed FPGA configuration interfaces requiring stable component supply and long-term lifecycle assurance.
Supply support for SN74CBTLV3861DGVR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of expertise in high-speed interface and power management ICs.
SN74CBTLV3861DGVR belongs to TI's CBTLV family of low-voltage bus switches, designed specifically for high-bandwidth, low-latency signal routing in computing, communications, and industrial infrastructure equipment.
FAQ
What is the maximum operating frequency supported by the SN74CBTLV3861DGVR?
The SN74CBTLV3861DGVR does not specify a maximum clock frequency, as it is an analog bus switch-not a clocked digital device. Its 0.15 ns typical propagation delay and 5 pF off-state capacitance enable reliable operation with data signals up to 1+ GHz, provided PCB layout and drive strength meet transmission-line requirements. System-level bandwidth depends on external trace impedance and source/sink capability, not internal clocking.
Can SN74CBTLV3861DGVR be used with 1.8 V logic levels?
No-SN74CBTLV3861DGVR is not rated for 1.8 V operation. Its recommended supply range is 2.3 V to 3.6 V, and its control inputs require VIH ≥ 1.7 V (at VCC = 2.3–2.7 V) or ≥2.0 V (at VCC = 2.7–3.6 V). Applying 1.8 V to VCC may result in undefined switching behavior, increased ron, or failure to meet Ioff specifications. For 1.8 V systems, consider TI's SN74AVC series.
Is the SN74CBTLV3861DGVR pin-compatible with other packages in the same family?
Yes-SN74CBTLV3861DGVR shares identical pinout and functionality with SN74CBTLV3861DBQR (SSOP-24), SN74CBTLV3861DWR (SOIC-24), and SN74CBTLV3861PWR (TSSOP-24). All variants use the same DBQ/DGV/DW/PW/NS package footprint logic diagram and function table. Mechanical dimensions differ, but electrical behavior and signal routing are interchangeable across packages.
How should the OE pin be handled during power-up to ensure predictable state?
To guarantee high-impedance state at power-up, OE must be held high until VCC stabilizes. TI recommends tying OE to VCC through a pullup resistor; minimum value is determined by the driving source's current-sinking capability. A 10-kΩ resistor is typical. Leaving OE floating risks metastability, unintended switching, or excessive ICC during startup transients.
Does SN74CBTLV3861DGVR support hot-swap applications?
Yes-SN74CBTLV3861DGVR is explicitly designed for hot-swap use via its Ioff feature. When VCC = 0 V, leakage current remains below 10 µA even with −0.5 V to 3.6 V applied to A/B terminals, preventing damaging backfeed currents. This meets JEDEC JESD78 Class II latch-up immunity and enables safe insertion into live backplanes without auxiliary sequencing circuitry.
SN74CBTLV3861DGVR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBTLV
- Package/Case:
- 24-TFSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Bus Switch
- Circuit:
- 10 x 1:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2.3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TVSOP
SN74CBTLV3861DGVR FAQ
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6.How does Aetrix verify that SN74CBTLV3861DGVR is sourced from the original manufacturer or authorized distributors?
All SN74CBTLV3861DGVR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBTLV3861DGVR meets industry standards.
7.What is the process for return or replacement of SN74CBTLV3861DGVR?
All SN74CBTLV3861DGVR units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBTLV3861DGVR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBTLV3861DGVR part is unused and in its original packaging.
Return procedure for SN74CBTLV3861DGVR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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