Texas Instruments SN74CBTS3384DGVR
- Part No.:
- SN74CBTS3384DGVR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 24-TFSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74CBTS3384DGVR.pdf
- Description:
- IC BUS SWITCH 5 X 1:1 24TVSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,671
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Product details
Overview
SN74CBTS3384DGVR from Texas Instruments is a 10-bit FET bus switch with Schottky diode clamping, designed for high-speed TTL-compatible signal routing in memory and data bus applications. It features dual 5-bit switches, 5-Ω on-state resistance, 0.25 ns typical propagation delay at 5 V, and operates from –40°C to 85°C with 4–5.5 V supply. Used in DDR memory interface isolation and hot-swap I/O buffering.
For engineers reviewing the SN74CBTS3384DGVR datasheet, SN74CBTS3384DGVR pinout, SN74CBTS3384DGVR application, or SN74CBTS3384DGVR equivalent, key selection criteria include on-resistance matching, undershoot clamping capability, OE-controlled bidirectional switching, and TVSOP-24 thermal performance (θJA = 86°C/W).
Technical Context
The SN74CBTS3384DGVR implements two independent 5-bit FET-based transmission gates, each controlled by a dedicated active-low output-enable (OE) input. Its channel structure uses low-threshold NMOS pass transistors with integrated Schottky clamps on all A/B I/Os to suppress negative undershoot below –0.6 V.
Switching is bidirectional and transparent: when OE is low, the A–B path conducts with minimal RC delay; when OE is high, both ports enter high-impedance state. Control inputs accept TTL-level thresholds (VIL ≤ 0.8 V, VIH ≥ 2 V), and supply current remains under 3 µA in static operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| On-state resistance (ron) | 5 Ω typical at VCC = 4.5 V, enabling <10 mV drop at 64 mA per channel |
| Propagation delay (tpd) | 0.25 ns typical at VCC = 5 V, CL = 50 pF - supports >1 GHz signal integrity |
| Supply voltage range | 4 V to 5.5 V - compatible with 5-V TTL and mixed-voltage system rails |
| Input clamp voltage (VIK) | –0.6 V at A/B pins - prevents negative transients from damaging downstream logic |
| Control input leakage (IIL/IIH) | ±1 µA max - ensures stable OE logic states without external pull resistors |
| Thermal resistance (θJA) | 86°C/W - defines power derating limit of ~140 mW at 85°C ambient in standard PCB layout |
| Operating temperature | –40°C to +85°C - qualified for industrial-grade embedded control and instrumentation |
Pinout & Package
SN74CBTS3384DGVR is housed in a 24-pin TVSOP (Thin Very Small Outline Package) with 0.65 mm lead pitch and 1.2 mm maximum height. The package is RoHS-compliant, moisture sensitivity level 1, and optimized for automated SMT assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13 | 1OE / 2OE | Active-low enable inputs controlling respective 5-bit switch banks - tie high to disable, low to connect A↔B |
| 2–6, 14–18 | 1B1–1B5 / 2B1–2B5 | Bus port B terminals - bidirectionally connected to corresponding A pins when OE asserted |
| 3–7, 15–19 | 1A1–1A5 / 2A1–2A5 | Bus port A terminals - electrically identical to B pins; no master/slave assignment |
| 12, 24 | GND / VCC | Power reference and supply - decoupling capacitor required within 5 mm of pin 12 and pin 24 |
| Other pins | No-connect (NC) | Not internally bonded - must remain unconnected and unstubbed on PCB |
Key Features
| Feature | Design Value |
|---|---|
| Schottky diode clamping on all I/Os | Clamps negative undershoot to –0.6 V, protecting 5-V CMOS inputs from ESD-induced latch-up |
| Dual independent 5-bit switch banks | Enables selective isolation of memory address/data lanes without cross-talk or shared enable timing constraints |
| TTL-compatible control inputs | Accepts standard 0.8 V/2.0 V logic thresholds - eliminates level-shifter requirement in legacy 5-V systems |
| Low 5-Ω on-resistance | Maintains signal edge fidelity across 50-pF loads with <0.5% amplitude loss at 100 MHz |
| High-impedance off-state | Isolates ports to >1012 Ω - prevents back-driving during hot-plug or power sequencing events |
Applications
| Memory Bus Isolation | Hot-Swap I/O Buffering |
|---|---|
Use Scenario: Isolating DDR SDRAM address/control lines between controller and memory module during initialization or error recovery. IC Role / Device Role / Timing Role: Bidirectional signal gate enabling/disabling memory access without clock domain crossing or timing skew. Use Value: Prevents bus contention during reset sequences while maintaining sub-nanosecond signal integrity via 5-Ω ron. | Use Scenario: Safely inserting/removing peripheral cards in live 5-V backplane systems without disrupting main system operation. IC Role / Device Role / Timing Role: Hot-swap enable switch that isolates card-side signals until power and reference stabilization complete. Use Value: Schottky clamps absorb insertion transients; high-Z off-state blocks fault propagation to host bus. |
| Legacy System Bus Expansion | Test Access Port Multiplexing |
Use Scenario: Adding secondary ISA or PCI-X expansion slots to industrial controllers using shared 5-V data/address buses. IC Role / Device Role / Timing Role: Logic-level bus repeater with zero-latency pass-through and configurable channel enable. Use Value: 0.25 ns tpd avoids timing budget violations; dual OE pins allow staggered slot activation. | Use Scenario: Sharing JTAG TDI/TDO/TMS signals among multiple ASICs on a single test board using boundary-scan chain selection. IC Role / Device Role / Timing Role: Low-capacitance multiplexer for debug interface signals requiring minimal added skew. Use Value: 6.5 pF Cio(OFF) minimizes signal reflection; bidirectional operation preserves JTAG protocol directionality. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bus switch applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74CBT3384DBR | SSOP-24 package (θJA = 63°C/W); identical electrical specs and pinout | Better thermal performance in dense layouts; larger footprint requires more PCB area | Select when thermal margin is critical and board space allows SSOP |
| SN74LVC1G3157DCKR | Single-channel SPDT analog switch; 3.3-V only; no Schottky clamps; 6-Ω ron | Limited to point-to-point signal routing; not suitable for multi-bit bus isolation | Use only for low-pin-count, 3.3-V signal gating where clamping is handled externally |
Compared with SN74CBTS3384DBR and SN74LVC1G3157DCKR, the SN74CBTS3384DGVR uniquely combines 10-bit parallel switching, 5-V tolerance, integrated undershoot protection, and TVSOP space efficiency - making it optimal for compact industrial memory interfaces requiring robust signal integrity.
Availability
SN74CBTS3384DGVR is available at Aetrix Electronics and suitable for memory bus isolation, hot-swap I/O buffering, and legacy system bus expansion requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for SN74CBTS3384DGVR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 90 years of innovation in industrial, automotive, and communications markets.
The SN74CBTS3384DGVR belongs to TI's CBTS (CMOS Bus Transceiver Switch) family, engineered for high-speed, low-distortion signal routing in 5-V memory and control bus architectures.
FAQ
What is the maximum continuous current rating per channel for the SN74CBTS3384DGVR?
The SN74CBTS3384DGVR supports up to 128 mA continuous channel current per switch path, verified under absolute maximum ratings. This allows reliable operation driving standard 50-Ω transmission lines or TTL fan-out loads without thermal shutdown. Derating is required above 85°C ambient due to its 86°C/W θJA; at 70°C, full 128 mA remains within safe junction limits. Always verify PCB copper area and airflow in high-density deployments.
Does the SN74CBTS3384DGVR require external pull-up or pull-down resistors on its OE inputs?
No, the SN74CBTS3384DGVR does not require external pull resistors on its OE inputs. Its control inputs exhibit ±1 µA max leakage (IIL/IIH) and meet TTL-compatible thresholds (VIL ≤ 0.8 V, VIH ≥ 2 V), allowing direct connection to 5-V logic outputs or microcontroller GPIOs. TI recommends tying unused OE pins to VCC or GND per SCBA004 guidelines to prevent floating states.
Can the SN74CBTS3384DGVR be used in 3.3-V systems?
The SN74CBTS3384DGVR is specified for 4–5.5 V operation and is not recommended for sustained 3.3-V use. While it may function at 3.3 V in some cases, its on-resistance rises significantly (>15 Ω), propagation delay increases (>1 ns), and Schottky clamping effectiveness degrades. For 3.3-V bus switching, TI recommends the SN74CB3Q3245 or SN74LVC2G53 families instead - both fully characterized at 3.3 V with guaranteed ron and timing.
How does the Schottky clamping in the SN74CBTS3384DGVR protect downstream circuitry?
The SN74CBTS3384DGVR integrates Schottky diodes from each A/B I/O pin to GND, clamping negative undershoot to –0.6 V (typical) at 18 mA. This prevents sub-0-V excursions that could forward-bias input protection diodes in downstream 5-V CMOS devices, avoiding latch-up or cumulative ESD damage. Clamping operates independently per pin and requires no external components - critical for hot-swap and cable-disconnect scenarios.
Is the SN74CBTS3384DGVR pin-compatible with other packages in the same family?
Yes, the SN74CBTS3384DGVR shares identical pinout and functionality with SN74CBTS3384DBR (SSOP-24), SN74CBTS3384DWR (SOIC-24), and SN74CBTS3384PWR (TSSOP-24). All variants use the same DB/DGV/DW/PW/DBQ top-side marking convention and support interchangeable PCB footprints for the same package type. However, thermal and mechanical properties differ - e.g., DGV has higher θJA than DW - so layout rules must match the selected package.
SN74CBTS3384DGVR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74CBTS
- Package/Case:
- 24-TFSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Bus Switch
- Circuit:
- 5 x 1:1
- Independent Circuits:
- 2
- Current - Output High, Low:
- -
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-TVSOP
SN74CBTS3384DGVR FAQ
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5.How can I obtain technical support or documentation for SN74CBTS3384DGVR?
For technical support, including SN74CBTS3384DGVR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74CBTS3384DGVR requirements.
6.How does Aetrix verify that SN74CBTS3384DGVR is sourced from the original manufacturer or authorized distributors?
All SN74CBTS3384DGVR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74CBTS3384DGVR meets industry standards.
7.What is the process for return or replacement of SN74CBTS3384DGVR?
All SN74CBTS3384DGVR units undergo pre-shipment inspection (PSI). If there is an issue with SN74CBTS3384DGVR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74CBTS3384DGVR part is unused and in its original packaging.
Return procedure for SN74CBTS3384DGVR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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