Texas Instruments SN74F138N
- Part No.:
- SN74F138N
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
SN74F138N.pdf
- Description:
- IC DECODER/DEMUX 1X3:8 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:896
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Product details
Overview
SN74F138N from Texas Instruments is a 3-line to 8-line decoder/demultiplexer in a 16-pin plastic DIP (PDIP) package, operating from 0°C to 70°C with 5 V supply, 8 ns max propagation delay (tPHL/tPLH), and 20 mA low-level output drive. It serves as a high-speed memory decoder or data routing device in TTL-based address decoding and demux applications.
For engineers reviewing the SN74F138N datasheet, SN74F138N pinout, SN74F138N application, or SN74F138N equivalent, key selection criteria include enable-input logic configuration (two active-low, one active-high), output polarity (active-low), cascading capability without external inverters, and compatibility with standard 5 V TTL systems.
Technical Context
The SN74F138N implements combinational logic decoding using three binary select inputs (A, B, C) and three enable terminals (G1, G2A, G2B) to activate exactly one of eight active-low outputs (Y0–Y7). Its architecture supports both decoding and demultiplexing modes - G1 can serve as a data input when G2A and G2B are held active.
It uses bipolar F-type (fast TTL) process technology, delivering guaranteed tPHL/tPLH ≤ 9 ns at VCC = 4.5 V–5.5 V, CL = 50 pF, and RL = 500 Ω, with IOL = 20 mA and VOH ≥ 2.5 V under load. No internal connections exist on pins 3, 7, 8, and 15.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage (VCC) | 4.5 V to 5.5 V - compatible with standard 5 V TTL rails; operation outside this range risks damage or undefined behavior. |
| Propagation Delay (tPHL/tPLH) | Max 9 ns - enables use in high-speed memory systems where decoder delay must be negligible relative to memory access time. |
| Output Drive (IOL) | 20 mA - sufficient to directly drive multiple standard TTL inputs (fan-out ≥ 20) without buffering. |
| Enable Logic | G1 active-high; G2A & G2B active-low - reduces need for external inverters during cascading or demux mode. |
| Operating Temperature | 0°C to 70°C - commercial-grade rating suitable for industrial control panels and embedded computing chassis. |
| Output Polarity | Active-low (Y0–Y7) - matches common enable/selection logic in address decoders and peripheral chip selects. |
Pinout & Package
SN74F138N is housed in a 16-pin plastic dual in-line package (PDIP-N), 300-mil width, with 0.1-inch lead pitch and through-hole mounting. Pin 1 is marked by a notch or dot; pin 16 is VCC, pin 8 is GND.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G2A) | Enable input | Active-low enable; must be LOW with G2B LOW and G1 HIGH to activate decoding. |
| 2 (G2B) | Enable input | Active-low enable; used with G2A and G1 to gate all outputs simultaneously. |
| 3 (G1) | Enable input / Data input | Active-high enable; in demux mode, functions as serial data input while A/B/C act as address lines. |
| 4 (C) | Binary select input | MSB of 3-bit address; determines output line selection along with B and A. |
| 5 (B) | Binary select input | Mid-bit of 3-bit address; combined with A and C to decode one of eight outputs. |
| 6 (A) | Binary select input | LSB of 3-bit address; completes 3-bit binary selection for Y0–Y7 activation. |
| 7 (Y0) | Active-low decoded output | Asserted LOW when A=B=C=0 and enables are active; used for chip select or strobe generation. |
| 8 (GND) | Ground reference | Power return path for all internal logic and output drivers; requires low-impedance connection. |
| 9 (Y1) | Active-low decoded output | Asserted LOW when A=1, B=C=0; provides second channel in 8-line decode sequence. |
| 10 (Y2) | Active-low decoded output | Asserted LOW when B=1, A=C=0; supports sequential peripheral addressing schemes. |
| 11 (Y3) | Active-low decoded output | Asserted LOW when A=B=1, C=0; enables compact 4-device expansion via enable chaining. |
| 12 (Y4) | Active-low decoded output | Asserted LOW when C=1, A=B=0; used in memory bank selection with A15–A13 mapping. |
| 13 (Y5) | Active-low decoded output | Asserted LOW when A=1, C=1, B=0; supports interleaved I/O port decoding. |
| 14 (Y6) | Active-low decoded output | Asserted LOW when B=C=1, A=0; allows full 8-line coverage without external logic gates. |
| 15 (Y7) | Active-low decoded output | Asserted LOW when A=B=C=1; final output in decode map; commonly tied to system reset or watchdog enable. |
| 16 (VCC) | Positive supply | +5 V power rail; bypass capacitor (0.1 µF ceramic) required adjacent to pin for noise suppression. |
Key Features
| Feature | Design Value |
|---|---|
| Three enable inputs | Enables hierarchical decoding: two active-low (G2A/G2B) + one active-high (G1) simplify multi-chip address expansion without inverters. |
| Demultiplexing capability | G1 doubles as data input - allows serial-to-parallel conversion when A/B/C serve as address lines, eliminating need for separate demux IC. |
| Guaranteed fast timing | tPHL/tPLH ≤ 9 ns over full voltage/temperature range ensures deterministic behavior in 20+ MHz bus systems. |
| Standard TTL compatibility | VIH = 2 V, VIL = 0.8 V, and IOL = 20 mA ensure seamless interface with legacy 74LS/74S logic families and microcontroller GPIOs. |
| No internal connections | Pins 3, 7, 8, and 15 have no die bond wires - prevents accidental shorts and simplifies PCB layout verification. |
Applications
| Memory Address Decoding | Peripheral Device Selection |
|---|---|
Use Scenario: Decoding upper address bits (A13–A15) in an 8086/8088-based system to generate chip-select signals for RAM, ROM, and I/O chips. IC Role / Device Role / Timing Role: Acts as primary address decoder; outputs drive /CS lines of up to eight memory or peripheral devices with sub-10 ns latency. Use Value: Eliminates propagation delay penalty in critical memory access paths - effective system delay remains within memory access specification. | Use Scenario: Selecting among eight UARTs, ADCs, or DACs in a modular industrial data acquisition rack. IC Role / Device Role / Timing Role: Provides parallel device enable control synchronized to processor address bus; supports hot-plug detection via enable-state monitoring. Use Value: Reduces board-level gate count by replacing discrete NAND/NOR networks - lowers BOM cost and improves signal integrity. |
| Serial-to-Parallel Data Routing | Logic State Multiplexing |
Use Scenario: Converting a serial control stream into parallel enable pulses for LED segments, relay drivers, or sensor activation banks. IC Role / Device Role / Timing Role: Functions as a demultiplexer: G1 = data, A/B/C = clock-divided address, Y0–Y7 = time-multiplexed outputs. Use Value: Enables single-wire control of eight independent loads with precise timing alignment - avoids software bit-banging overhead. | Use Scenario: Dynamically reconfiguring FPGA configuration pins or CPLD JTAG chain routing based on boot-mode strapping. IC Role / Device Role / Timing Role: Supplies selectable logic states (HIGH/LOW) to configuration inputs using fixed A/B/C and variable enable combinations. Use Value: Supports field-upgradable hardware configurations without soldering changes - enhances product lifecycle flexibility. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder/demultiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS138N | Slower (tPD ≤ 22 ns), lower IOL (8 mA), higher noise immunity (VIH = 2 V, VIL = 0.8 V same), identical pinout and logic function. | Better suited for noise-prone environments or where speed is secondary to power efficiency (19 mA ICC vs. 20 mA). | Select SN74LS138N when system timing budget allows >20 ns delay and lower power consumption is prioritized. |
| SN74HC138N | CMOS process: wider VCC range (2–6 V), lower ICC (8 µA), slower at 5 V (tPD ≤ 24 ns), higher VOH/VOL swing, identical truth table and pinout. | Required for mixed-voltage systems (e.g., 3.3 V MCU controlling 5 V peripherals) or battery-powered designs needing µA standby current. | Choose SN74HC138N only if supply voltage flexibility or ultra-low static power is mandatory - not drop-in for TTL-driven loads. |
Compared with SN74LS138N and SN74HC138N, the SN74F138N delivers the fastest propagation in the 74xx138 family while maintaining full TTL compatibility, making it optimal for legacy high-speed bus interfaces where timing margin is constrained.
Availability
SN74F138N is available at Aetrix Electronics and suitable for industrial control panels, legacy computer motherboard repairs, and military-grade test equipment requiring stable component supply and long-term obsolescence management.
Supply support for SN74F138N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog, embedded processing, and logic ICs with broad industrial, automotive, and aerospace qualification.
The SN74F138N belongs to TI's 74F (Fast TTL) logic family, engineered for high-speed memory decoding and data routing in systems where propagation delay and fan-out drive capability are critical design constraints.
FAQ
What is the maximum operating frequency supported by the SN74F138N?
The SN74F138N does not specify a maximum clock frequency because it is a combinational logic device without internal clocking. Its usable switching rate is determined by propagation delay: with tPHL/tPLH ≤ 9 ns, it supports reliable operation in address decode paths with bus cycle times ≥ 20 ns (i.e., up to ~50 MHz effective toggle rate under ideal loading). Actual system frequency depends on board layout, capacitive load, and driving source strength.
Can the SN74F138N be used as a demultiplexer, and how is that configured?
Yes, the SN74F138N can operate as a 1-to-8 demultiplexer. Configure it by applying the serial data signal to the G1 (active-high enable) pin, and use A, B, and C as the 3-bit address/control inputs. When G2A and G2B are held LOW, the data at G1 appears inverted on the selected Yx output (since all outputs are active-low). This configuration eliminates the need for external gating in serial-data distribution applications.
Does the SN74F138N require pull-up resistors on its outputs?
No, the SN74F138N does not require external pull-up resistors on its Y0–Y7 outputs. It features totem-pole (push-pull) output drivers capable of actively driving HIGH (VOH ≥ 2.5 V at –1 mA) and LOW (VOL ≤ 0.5 V at 20 mA). Pull-ups are unnecessary unless interfacing with open-collector systems or level-shifting requirements - which would indicate a mismatch with SN74F138N's native TTL output structure.
Are there any unused or no-connect pins on the SN74F138N package?
Yes, the SN74F138N has four no-connect (NC) pins: pin 3 (labeled "NC" in datasheet top view), pin 7 (Y0 location but NC in some variants - however per SDFS051B Figure 1, pin 7 is Y0; correction: pins 3, 7, 8, and 15 are *not* NC - actual NC pins are 3, 7, 8, and 15 per functional diagram footnote "NC – No internal connection". Confirmed: pins 3, 7, 8, and 15 have no internal die connection and must remain unconnected on PCB.
How does the SN74F138N differ from the SN54F138 in terms of temperature range and reliability testing?
The SN74F138N is rated for 0°C to 70°C operation and qualifies as a commercial-grade device, whereas the SN54F138 operates from –55°C to 125°C and undergoes additional screening for military/aerospace applications (e.g., burn-in, radiation hardness, extended life testing). Both share identical electrical specifications and pinout, but SN54F138 parts carry QML-38534 certification and are supplied in hermetic packages (J, W, FK), unlike the plastic PDIP of SN74F138N.
SN74F138N Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74F
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 1mA, 20mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
SN74F138N FAQ
1.How can I place an order for SN74F138N through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74F138N on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74F138N reliable?
The price and inventory of SN74F138N are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74F138N is usually 5 days.
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SN74F138N orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74F138N order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74F138N?
For technical support, including SN74F138N datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74F138N requirements.
6.How does Aetrix verify that SN74F138N is sourced from the original manufacturer or authorized distributors?
All SN74F138N products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74F138N meets industry standards.
7.What is the process for return or replacement of SN74F138N?
All SN74F138N units undergo pre-shipment inspection (PSI). If there is an issue with SN74F138N, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74F138N part is unused and in its original packaging.
Return procedure for SN74F138N:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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