Texas Instruments SN74HC125NG4
- Part No.:
- SN74HC125NG4
- Manufacturer:
- Texas Instruments
- Package:
- 14-DIP (0.300", 7.62mm)
- Datasheet:
-
SN74HC125NG4.pdf
- Description:
- IC BUFFER NON-INVERT 6V 14DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,226
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Product details
Overview
SN74HC125NG4 from Texas Instruments is a quadruple 3-state buffer IC performing Y = A logic in positive logic, operating across 2 V to 6 V supply, supporting fanout up to 10 LSTTL loads, with industrial temperature range (–40°C to +85°C), used for bus enable/control in digital systems.
For engineers reviewing the SN74HC125NG4 datasheet, SN74HC125NG4 pinout, SN74HC125NG4 application, or SN74HC125NG4 equivalent, this page delivers verified functional identity, validated PDIP-14 package mapping, confirmed 3-state output behavior, precise propagation and enable/disable timing, and real-world bus isolation use cases - all grounded in TI's SCLS104F production data sheet.
Technical Context
This device integrates four independent CMOS buffer gates, each with active-low 3-state output control (OE), enabling high-impedance state when disabled. All inputs are standard CMOS with ≤10 pF input capacitance and ±1 µA leakage at 6 V.
Each channel operates with balanced drive capability: VOH ≥ 4.4 V and VOL ≤ 0.26 V at 4.5 V/6 mA, with propagation delay tpd = 14 ns (typ) and enable delay ten = 16 ns (typ) under CL = 50 pF, 4.5 V, 25°C conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | Quadruple non-inverting buffer with active-low 3-state outputs (Y = A) |
| Supply Voltage Range | 2 V to 6 V - supports mixed-voltage system interfacing and legacy 5 V logic compatibility |
| Operating Temperature | –40°C to +85°C - qualified for industrial ambient environments |
| Output Drive | ±6 mA at 4.5 V - sufficient to drive 10 LSTTL loads without external buffering |
| Propagation Delay | 14 ns (typ) at 4.5 V, CL = 50 pF - enables reliable operation in sub-50 MHz digital control paths |
| Input Capacitance | ≤10 pF - minimizes loading on upstream drivers and preserves signal integrity |
| 3-State Leakage | ±0.5 µA max at 6 V - ensures stable high-Z state during bus arbitration or power-down |
Pinout & Package
SN74HC125NG4 is packaged in 14-pin PDIP (Plastic Dual In-line Package) with 19.30 mm × 6.40 mm body size, through-hole mounting, and industry-standard pin spacing (0.1 inch).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 10, 13 (1OE, 2OE, 3OE, 4OE) | Active-low output enable | Drives corresponding Y output to high-Z when logic HIGH; enables pass-through when LOW |
| 2, 5, 9, 12 (1A, 2A, 3A, 4A) | Buffer input | Accepts CMOS-level signals; high-impedance input with ≤10 pF capacitance |
| 3, 6, 8, 11 (1Y, 2Y, 3Y, 4Y) | Buffer output | Non-inverting output with 3-state capability; sinks/sources up to ±6 mA |
| 7 (GND) | Ground reference | Return path for all internal circuitry and output current; must be low-impedance |
| 14 (VCC) | Positive supply | Power rail for logic operation; requires local 0.1 µF bypass capacitor per TI layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Quad independent 3-state buffers | Enables simultaneous or selective control of four signal lines - ideal for 4-bit data bus gating |
| Wide 2 V–6 V supply range | Permits interoperability between 3.3 V microcontrollers and 5 V peripherals without level shifters |
| Low power consumption | ICC ≤ 80 µA max at 6 V - reduces static power in always-on control logic |
| CMOS input structure | Eliminates need for pull-up/down resistors on driven inputs; avoids shoot-through current with fast edges |
| Controlled transition times | tt ≤ 18 ns (typ) at 4.5 V - limits EMI and prevents ringing on properly terminated traces |
Applications
| Microcontroller Bus Isolation | Legacy System Signal Gating |
|---|---|
Use Scenario: Isolating a 4-bit address/data bus between an ARM Cortex-M0+ MCU and legacy peripheral during sleep mode. IC Role / Device Role / Timing Role: SN74HC125NG4 acts as bidirectional bus gate; OE lines synchronized to MCU GPIO to assert high-Z during deep-sleep entry. Use Value: Prevents back-driving of powered-down peripherals, eliminates leakage paths, and maintains bus integrity without additional power switches. | Use Scenario: Enabling/disabling communication between a Z80 CPU and parallel EEPROM in retro-computing hardware. IC Role / Device Role / Timing Role: SN74HC125NG4 provides clean 3-state control of 4-bit control/status lines, with OE tied to Z80 WAIT signal for cycle-accurate bus release. Use Value: Ensures deterministic bus turnaround timing and eliminates contention during memory-mapped I/O cycles. |
| Industrial Sensor Multiplexing | Digital Test Fixture Signaling |
Use Scenario: Selectively routing analog sensor digitized outputs (via 4-bit ADC interface) to a single microcontroller input port. IC Role / Device Role / Timing Role: SN74HC125NG4 functions as a manual or firmware-controlled signal selector; each buffer handles one sensor channel's LSB–MSB nibble. Use Value: Reduces PCB trace count by 75% versus discrete wiring; enables hot-swappable sensor modules via OE sequencing. | Use Scenario: Driving stimulus signals to DUT pins in automated test equipment where multiple boards share a common test bus. IC Role / Device Role / Timing Role: SN74HC125NG4 serves as a programmable bus driver; OE controlled by FPGA to isolate DUTs during calibration or fault injection. Use Value: Guarantees no signal contention during board swap; supports <100 ns switching between test configurations. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-state buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC244N | Octal (not quad); two independent 4-bit groups with separate OE controls; identical voltage/timing specs | Supports wider buses (8-bit) but requires more PCB area and has different pinout | Select when expanding to 8-bit data paths or requiring dual-group enable control |
| 74LVC125APW | Lower VCC range (1.65 V–3.6 V); higher speed (tpd = 3.2 ns typ @ 3.3 V); TSSOP-14 package only | Optimized for modern 3.3 V systems; not compatible with 5 V logic without level translation | Select for high-speed, low-voltage portable electronics where 5 V tolerance is unnecessary |
Compared with SN74HC244N and 74LVC125APW, the SN74HC125NG4 uniquely balances 5 V compatibility, PDIP through-hole manufacturability, and minimal pin count for cost-sensitive 4-bit bus control - making it optimal for industrial retrofit, education kits, and legacy-compatible designs.
Availability
SN74HC125NG4 is available at Aetrix Electronics and suitable for industrial control panels, educational electronics kits, and legacy system upgrades requiring stable component supply, long-lifecycle support, and through-hole assembly compatibility.
Supply support for SN74HC125NG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions, with over 90 years of innovation in logic, power, and signal chain technologies.
The SN74HC125NG4 belongs to TI's classic HC (High-Speed CMOS) logic family, designed specifically for robust, pin-compatible replacements of obsolete TTL devices in industrial, automotive, and computing applications requiring wide voltage operation and 3-state bus control.
FAQ
What is the maximum capacitive load SN74HC125NG4 can drive while maintaining specified timing?
The SN74HC125NG4 is characterized for CL ≤ 50 pF in timing specifications (tpd, ten, tdis), with typical performance maintained up to 70 pF per output. At 150 pF, propagation delay increases to 30 ns (typ) at 4.5 V - exceeding recommended limits for high-speed operation. For loads >70 pF, add a series resistor to limit peak output current within ±35 mA absolute maximum rating.
Can SN74HC125NG4 operate reliably at 3.3 V supply voltage?
Yes, SN74HC125NG4 operates reliably from 2 V to 6 V, including 3.3 V. At 3.3 V, VOH ≥ 3.15 V and VOL ≤ 0.33 V (min/max) meet standard 3.3 V CMOS thresholds, and propagation delay is 17 ns (typ) with CL = 50 pF. No level shifting is required when interfacing with 3.3 V microcontrollers.
How should unused inputs and outputs be handled on SN74HC125NG4?
Unused inputs on SN74HC125NG4 must be tied to VCC or GND - floating inputs cause undefined logic states and increased ICC. Unused outputs may be left unconnected (floating) since the 3-state architecture isolates them when OE is HIGH. TI recommends tying unused OE pins to VCC to ensure default high-Z state.
Is SN74HC125NG4 RoHS compliant?
Yes, SN74HC125NG4 is RoHS compliant. Per TI's packaging addendum, the NG4 suffix denotes lead-free (Pb-free) construction with NiPdAu lead finish, MSL Level-1 rating, and full compliance with EU Directive 2011/65/EU. The PDIP package uses matte tin plating over copper leadframe.
Does SN74HC125NG4 support hot-swap or live-insertion?
No, SN74HC125NG4 is not designed for hot-swap operation. Its absolute maximum ratings do not include undershoot/overshoot immunity during live insertion, and the lack of power-up/power-down protection circuitry means VCC ramp rates and sequencing must be controlled. Use dedicated hot-swap controllers if live insertion is required.
SN74HC125NG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HC
- Package/Case:
- 14-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 7.8mA, 7.8mA
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 14-PDIP
SN74HC125NG4 FAQ
1.How can I place an order for SN74HC125NG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74HC125NG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74HC125NG4 reliable?
The price and inventory of SN74HC125NG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74HC125NG4 is usually 5 days.
3.What payment methods are accepted for SN74HC125NG4?
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Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74HC125NG4?
SN74HC125NG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74HC125NG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74HC125NG4?
For technical support, including SN74HC125NG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74HC125NG4 requirements.
6.How does Aetrix verify that SN74HC125NG4 is sourced from the original manufacturer or authorized distributors?
All SN74HC125NG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74HC125NG4 meets industry standards.
7.What is the process for return or replacement of SN74HC125NG4?
All SN74HC125NG4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74HC125NG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74HC125NG4 part is unused and in its original packaging.
Return procedure for SN74HC125NG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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