Texas Instruments SN74HC165PW
- Part No.:
- SN74HC165PW
- Manufacturer:
- Texas Instruments
- Category:
- Shift Registers
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74HC165PW.pdf
- Description:
- IC SHIFT REGISTER 8BIT 16-TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,686
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74HC165PW from Texas Instruments is an 8-bit parallel-load shift register IC used for parallel-to-serial data conversion in microcontroller GPIO expansion and keyboard scanning circuits. It operates from 2 V to 6 V, delivers ±4-mA output drive at 5 V, features complementary serial outputs (QH and QH), and supports clock inhibit functionality. Its TSSOP-16 package enables compact board integration in space-constrained industrial control interfaces.
For engineers reviewing the SN74HC165PW datasheet, SN74HC165PW pinout, SN74HC165PW application, or SN74HC165PW equivalent, key selection criteria include its wide supply voltage range (2–6 V), low ICC (≤80 µA), 13 ns typical propagation delay, and direct parallel-load capability independent of clock state - critical for synchronous input capture in PLC I/O modules and embedded keypad interfaces.
Technical Context
The SN74HC165PW implements a positive-edge-triggered 8-bit shift register with asynchronous parallel load. Data loading occurs on SH/LD low, overriding CLK and CLK INH states; shifting occurs on rising edges of either CLK (with CLK INH low) or CLK INH (with CLK low), enabling flexible clock routing. The device includes gated clock inputs and complementary serial outputs for noise-immune signal transmission.
Its logic architecture supports cascading via SER-to-QH interconnection, allowing multi-byte input expansion without additional control lines. All eight parallel inputs (A–H) are directly enabled during load mode, and the internal register retains state during clock inhibit - essential for deterministic sampling in real-time industrial sensing applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 2 V to 6 V - enables direct interface with 3.3 V and 5 V systems without level translation |
| Propagation Delay (tpd) | 13 ns typical at VCC = 4.5 V - supports >30 MHz clock rates for high-speed input polling |
| Output Drive | ±4 mA at 5 V - sufficient to drive 10 LSTTL loads or directly interface with MCU GPIOs |
| Quiescent Current (ICC) | ≤80 µA max - minimizes standby power in battery-backed or energy-sensitive designs |
| Input Leakage Current | ≤1 µA max - ensures reliable logic levels even with high-impedance pull-ups in keyboard matrix applications |
| Operating Temperature | –40°C to +125°C - qualified for extended industrial and automotive under-hood environments |
Pinout & Package
TSSOP-16 package (6.60 mm × 5.10 mm), thermally enhanced for surface-mount assembly with 0.65 mm pitch; suitable for automated reflow and high-density PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (SH/LD) | Active-low parallel load enable | When low, loads A–H inputs directly into register regardless of CLK/CLK INH state |
| 2 (CLK) | Clock input | Rising edge shifts data toward QH when SH/LD high and CLK INH low |
| 3 (E) | Parallel data input | Bit 5 of 8-bit parallel word loaded during SH/LD low |
| 4 (F) | Parallel data input | Bit 6 of 8-bit parallel word loaded during SH/LD low |
| 5 (G) | Parallel data input | Bit 7 of 8-bit parallel word loaded during SH/LD low |
| 6 (H) | Parallel data input | Bit 8 of 8-bit parallel word loaded during SH/LD low |
| 7 (QH) | Serial output | MSB-first serial output of shifted register contents; drives next stage's SER |
| 8 (GND) | Ground reference | Return path for all internal logic and I/O; must be low-impedance for noise immunity |
| 9 (QH) | Complementary serial output | Inverted version of QH; supports differential signaling or noise rejection |
| 10 (SER) | Serial input | Accepts serial data during shift mode; connects to QH of upstream device in cascade |
| 11 (A) | Parallel data input | Bit 1 of 8-bit parallel word loaded during SH/LD low |
| 12 (B) | Parallel data input | Bit 2 of 8-bit parallel word loaded during SH/LD low |
| 13 (C) | Parallel data input | Bit 3 of 8-bit parallel word loaded during SH/LD low |
| 14 (D) | Parallel data input | Bit 4 of 8-bit parallel word loaded during SH/LD low |
| 15 (CLK INH) | Clock inhibit input | When high, blocks all clocking actions - preserves register state during interrupt service |
| 16 (VCC) | Positive supply | Power rail for CMOS logic; requires local 0.1 µF bypass capacitor per TI layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Parallel-load override | Loads all 8 bits synchronously on SH/LD low - eliminates race conditions during state capture |
| Interchangeable clock inputs | CLK and CLK INH are functionally symmetric - simplifies PCB routing and timing margin allocation |
| Complementary serial outputs | QH and QH provide inherent noise rejection for long trace or noisy environment applications |
| Gated clock architecture | Shift only occurs when SH/LD high AND one clock input transitions low→high - prevents spurious shifts |
| Wide voltage compatibility | Operates across 2–6 V - supports mixed-voltage systems and brown-out tolerant designs |
Applications
| Industrial PLC Input Expansion | Embedded Keypad Interface |
|---|---|
Use Scenario: Expanding digital input capacity on programmable logic controller mainboards to monitor 64+ discrete sensors. IC Role / Device Role / Timing Role: Parallel-load shift register converting 8-channel parallel sensor status into serial stream for SPI-connected microcontroller. Use Value: Reduces required MCU GPIO count by 7:1 per SN74HC165PW; enables hot-swap-safe input acquisition via SH/LD-controlled atomic load. | Use Scenario: Scanning 4×4 membrane keypad in medical handheld device with limited GPIO availability. IC Role / Device Role / Timing Role: Serializing row/column scan results for low-pin-count ARM Cortex-M0+ processor. Use Value: Eliminates need for dedicated keypad controller IC; leverages built-in CLK INH to pause scanning during interrupt handling. |
| Video Display Control Panel | IoT Sensor Hub Input Aggregation |
Use Scenario: Reading front-panel DIP switches and pushbuttons on broadcast video equipment with isolated control bus. IC Role / Device Role / Timing Role: Isolated parallel-to-serial converter feeding configuration data to FPGA over optocoupled UART link. Use Value: QH/QH complementary outputs improve common-mode noise rejection across isolation barrier; 2 V min operation supports low-power standby modes. | Use Scenario: Aggregating binary status signals from 32 environmental sensors in smart building gateway. IC Role / Device Role / Timing Role: Cascaded shift register chain (4× SN74HC165PW) feeding unified serial stream to ESP32 host MCU. Use Value: SER-to-QH daisy-chaining reduces interconnect wiring by 87.5%; ≤80 µA ICC extends battery life in solar-powered deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel-load shift register applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LV165A | Lower VCC range (2–5.5 V); 1.5 ns faster tpd (11.5 ns typ); higher drive (±6 mA) | Better suited for 3.3 V-only systems requiring tighter timing margins | Select when operating exclusively at 3.3 V and sub-12 ns propagation is required |
| 74HC165N | Same logic function and specs; PDIP-16 package (6.60 mm × 18.92 mm) instead of TSSOP-16 | Designed for through-hole prototyping or legacy board upgrades | Choose for hand-soldered development boards or where thermal mass of DIP aids reliability |
Compared with SN74LV165A and SN74HC165N, the SN74HC165PW offers optimal balance of 2–6 V flexibility, TSSOP-16 footprint efficiency, and proven industrial temperature performance - making it the preferred choice for new SMT designs requiring broad supply compatibility and cascading scalability.
Availability
SN74HC165PW is available at Aetrix Electronics and suitable for industrial PLC I/O modules, embedded keypad interfaces, video display control panels, and IoT sensor hub designs requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SN74HC165PW includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company delivering analog and embedded processing solutions, with leadership in logic, power management, and signal chain technologies.
The SN74HC165PW belongs to TI's 74HC logic family, designed specifically for robust, low-power, wide-voltage parallel-to-serial data conversion in industrial automation, consumer electronics, and automotive body control modules.
FAQ
What is the maximum clock frequency supported by the SN74HC165PW?
The SN74HC165PW supports up to 50 MHz typical clock frequency at VCC = 4.5 V and TA = 25°C, with minimum guaranteed fmax of 21 MHz across –40°C to +125°C at 4.5 V. This allows reliable high-speed input sampling in real-time control applications while maintaining setup/hold timing margins per TI's switching characteristics table.
Can the SN74HC165PW operate at 3.3 V supply voltage?
Yes, the SN74HC165PW is fully specified for operation at 3.3 V (within its 2 V to 6 V range). At VCC = 3.3 V, VOH is ≥3.15 V (min), VOL is ≤0.1 V (max), and tpd remains within 18 ns (max) - ensuring clean interfacing with standard 3.3 V microcontrollers and FPGAs without level-shifting circuitry.
How does the clock inhibit (CLK INH) function work on the SN74HC165PW?
When CLK INH is held high, the SN74HC165PW ignores all transitions on both CLK and CLK INH pins, freezing register contents regardless of SH/LD state. This allows deterministic pause of serial shifting during critical MCU interrupt service routines - preserving input state integrity without requiring software synchronization overhead.
Is the SN74HC165PW pin-compatible with other packages in the same family?
Yes, the SN74HC165PW shares identical pin numbering and function mapping with SN74HC165D (SOIC), SN74HC165DB (SSOP), and SN74HC165NS (SO), as confirmed in TI's Pin Configuration and Functions section. All use the same 16-pin layout with SH/LD on pin 1, CLK on pin 2, and QH on pin 9 - enabling drop-in replacement across TSSOP, SOIC, SSOP, and SO packages.
What is the purpose of the complementary QH output on the SN74HC165PW?
The QH output provides the logical inverse of the QH serial output, enabling differential signaling or noise-cancellation techniques. In electrically noisy environments like factory floors, routing both QH and QH to a differential receiver improves common-mode rejection ratio (CMRR), reducing susceptibility to EMI-induced bit errors during long-cable serial data transmission.
SN74HC165PW Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HC
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- Shift Register
- Output Type:
- Complementary
- Number of Elements:
- 1
- Number of Bits per Element:
- 8
- Function:
- Parallel or Serial to Serial
- Voltage - Supply:
- 2V ~ 6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
SN74HC165PW FAQ
1.How can I place an order for SN74HC165PW through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74HC165PW on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74HC165PW reliable?
The price and inventory of SN74HC165PW are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74HC165PW is usually 5 days.
3.What payment methods are accepted for SN74HC165PW?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74HC165PW transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74HC165PW?
SN74HC165PW orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74HC165PW order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74HC165PW?
For technical support, including SN74HC165PW datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74HC165PW requirements.
6.How does Aetrix verify that SN74HC165PW is sourced from the original manufacturer or authorized distributors?
All SN74HC165PW products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74HC165PW meets industry standards.
7.What is the process for return or replacement of SN74HC165PW?
All SN74HC165PW units undergo pre-shipment inspection (PSI). If there is an issue with SN74HC165PW, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74HC165PW part is unused and in its original packaging.
Return procedure for SN74HC165PW:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74HC165PW Tags
-
SN74HC164DR
Texas Instruments
-
SN74HC595DR
Texas Instruments

-
74HC595PW,118
Nexperia USA Inc.
-
SN74HC165PWR
Texas Instruments

-
HEF4094BT,653
Nexperia USA Inc.

-
74HC595D,118
Nexperia USA Inc.
-
SN74HC595PWR
Texas Instruments

-
74HC165D,653
Nexperia USA Inc.
-
SN74LV165APWR
Texas Instruments

-
74HC595BQ,115
Nexperia USA Inc.

-
74HC165BQ,115
Nexperia USA Inc.
-
CD4094BPWR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
