Texas Instruments SN74HCT125DG4
- Part No.:
- SN74HCT125DG4
- Manufacturer:
- Texas Instruments
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74HCT125DG4.pdf
- Description:
- IC BUF NON-INVERT 5.5V 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,784
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74HCT125DG4 from Texas Instruments is a quadruple 3-state bus buffer gate IC with TTL-compatible inputs and independent enable control per channel, operating at 4.5–5.5 V, delivering ±6-mA output drive, 12-ns typical propagation delay, and 80-µA max supply current. It functions as a bidirectional bus isolation and signal routing device in digital logic systems such as microcontroller peripheral interfaces and memory address buffering.
For engineers reviewing the SN74HCT125DG4 datasheet, SN74HCT125DG4 pinout, SN74HCT125DG4 application, or SN74HCT125DG4 equivalent, key selection criteria include 3-state output timing (ten/tdis ≤ 35 ns), input voltage compatibility (VIH = 2 V, VIL = 0.8 V), thermal resistance (RθJA = 138.7 °C/W for SOIC), and SOIC-14 package mechanical fit.
Technical Context
The SN74HCT125DG4 implements four identical non-inverting buffer gates, each with dedicated active-low 3-state output-enable (OE) control. Each gate performs Y = A in positive logic, with outputs entering high-impedance state when OE is high.
Its HCT logic family ensures TTL-level input thresholds (VIH ≥ 2 V, VIL ≤ 0.8 V) while maintaining CMOS-level power efficiency. The device supports bus-oriented applications via simultaneous 3-state control and exhibits low input current (≤1 µA) and high noise immunity (±6-mA drive into LSTTL loads).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 4.5 V to 5.5 V - Ensures compatibility with standard 5-V TTL and mixed-voltage logic systems. |
| Propagation Delay (tpd) | 12 ns typical at VCC = 5 V, CL = 50 pF - Enables reliable operation in 20-MHz+ synchronous bus environments. |
| Output Drive | ±6 mA at VCC = 5 V - Sufficient to directly drive 15 LSTTL loads without external buffers. |
| Input Thresholds | VIH = 2.0 V min, VIL = 0.8 V max - Guarantees robust interfacing with legacy TTL outputs. |
| Quiescent Current (ICC) | 80 µA max at VCC = 5.5 V - Supports low-static-power system design in always-on logic sections. |
| Off-State Leakage (IOZ) | ±5 µA max at VCC = 5.5 V - Minimizes bus contention current during 3-state disable. |
| Operating Temperature | –40 °C to +85 °C - Qualified for industrial-grade embedded control and instrumentation applications. |
Pinout & Package
SN74HCT125DG4 is housed in a 14-pin SOIC (D) package with nominal body dimensions of 8.65 mm × 3.90 mm and maximum height of 1.75 mm, compliant with JEDEC MS-012AB and RoHS requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 10, 13 | OE (Output Enable) | Active-low control per buffer; high = high-Z output, low = enabled pass-through. |
| 2, 5, 11, 14 | A (Input) | Non-inverting data input for corresponding buffer channel. |
| 3, 6, 12, 9 | Y (Output) | 3-state buffered output; follows A when OE is low, high-Z when OE is high. |
| 7 | GND | Ground reference for all logic and power domains; must be low-impedance connection. |
| 14 | VCC | Positive supply rail (4.5–5.5 V); requires local 0.1-µF bypass capacitor adjacent to pin. |
Key Features
| Feature | Design Value |
|---|---|
| TTL-compatible inputs | VIH/VIL thresholds match legacy 74LS devices, enabling drop-in replacement in existing 5-V logic designs. |
| Independent 3-state control | Four separate OE pins allow selective bus segment isolation without affecting other channels. |
| Low ICC and IOZ | 80-µA max supply current and ±5-µA off-state leakage reduce standby power and bus loading in multi-device systems. |
| High noise immunity | ±6-mA output drive ensures stable logic levels under capacitive bus loading up to 50 pF. |
| SOIC-14 thermal performance | RθJA = 138.7 °C/W enables operation at full speed without heatsinking in ambient temperatures up to +85 °C. |
Applications
| Microcontroller Peripheral Bus | Memory Address Buffering |
|---|---|
Use Scenario: Isolating GPIO expansion ports between an MCU and multiple SPI/I²C peripherals sharing a common data bus. IC Role / Device Role / Timing Role: Bidirectional 3-state buffer managing signal direction and preventing bus contention during peripheral arbitration. Use Value: Eliminates need for discrete MOSFET switches or complex bus transceivers while maintaining <12-ns signal integrity across 15-cm PCB traces. |
Use Scenario: Driving 16-bit address lines from a microprocessor to multiple SRAM or flash memory chips on a shared bus. IC Role / Device Role / Timing Role: Low-skew, high-drive buffer ensuring clean address setup/hold timing across distributed load capacitance. Use Value: Supports 20-MHz address strobe rates with guaranteed tpd ≤ 25 ns (max) and eliminates address glitches during chip-select transitions. |
| Digital Logic Level Translation | Test Equipment Signal Routing |
Use Scenario: Interfacing 5-V TTL logic outputs to 3.3-V FPGA I/O banks using resistor-based level-shifting alternatives. IC Role / Device Role / Timing Role: Active buffer providing voltage-domain isolation while preserving edge rate and logic threshold compatibility. Use Value: Delivers VIH = 2.0 V min and VOL ≤ 0.33 V at 6-mA sink, enabling direct connection to 3.3-V CMOS inputs without external bias networks. |
Use Scenario: Multiplexing stimulus signals from a pattern generator to multiple DUT inputs in automated test fixtures. IC Role / Device Role / Timing Role: Channel-selectable signal gate enabling sequential activation of test nodes without crosstalk. Use Value: Four independent OE controls allow precise temporal sequencing of signal delivery with <35 ns enable/disable latency and <1 ns skew between channels. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bus buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HCT125DR | Same silicon, identical electrical specs; differs only in tape-and-reel packaging (2500 pcs/reel vs. tube for DG4). | No functional difference; suitable for automated SMT assembly where reel feed is required. | Select SN74HCT125DR for high-volume production; SN74HCT125DG4 remains optimal for prototyping and low-volume hand-soldered builds. |
| 74ACT125SCX | Higher speed (tpd = 8 ns typ), wider VCC range (4.5–5.5 V), but higher ICC (200 µA max) and no guaranteed VIH/VIL match to TTL. | Better for high-frequency clock distribution; less suitable for legacy TTL interface due to reduced noise margin. | Choose 74ACT125SCX only when sub-10-ns timing is critical and input compatibility with older 74LS devices is not required. |
Compared with SN74HCT125DG4, SN74HCT125DR offers identical functionality in automated assembly format, while 74ACT125SCX trades TTL compatibility for raw speed-making SN74HCT125DG4 the preferred choice for industrial control and legacy system upgrades requiring guaranteed input threshold matching and low static power.
Availability
SN74HCT125DG4 is available at Aetrix Electronics and suitable for industrial control panels, test equipment signal routing, and microcontroller peripheral expansion requiring stable component supply and long-term obsolescence management.
Supply support for SN74HCT125DG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 50 years of innovation in industrial, automotive, and communications markets.
The SN74HCT125DG4 belongs to TI's 74HCT logic family, engineered for TTL-to-CMOS interfacing in industrial control, instrumentation, and legacy system upgrades where reliability, input compatibility, and low power are prioritized over ultra-high speed.
FAQ
What is the maximum operating temperature for SN74HCT125DG4?
The SN74HCT125DG4 is rated for operation from –40 °C to +85 °C ambient temperature. This industrial temperature range ensures reliable performance in programmable logic controllers, motor drives, and factory automation equipment where thermal stability is critical. The SOIC-14 package's RθJA of 138.7 °C/W allows full-speed operation within this range without forced cooling.
Does SN74HCT125DG4 support 3.3-V input logic levels?
No, SN74HCT125DG4 does not reliably recognize 3.3-V logic highs as valid inputs. Its VIH minimum is 2.0 V at VCC = 4.5–5.5 V, meaning a 3.3-V signal may fall below the guaranteed switching threshold. For 3.3-V to 5-V translation, use a dedicated level shifter or select a 74LVC-series buffer instead. SN74HCT125DG4 is designed specifically for TTL-compatible 5-V systems.
Can SN74HCT125DG4 outputs be paralleled for higher drive strength?
No, SN74HCT125DG4 outputs must not be paralleled. Its 3-state outputs are not designed for wired-OR or current-sharing configurations. Paralleling risks shoot-through current during enable/disable transitions and violates the absolute maximum rating for continuous output current (±35 mA). Use a single channel per signal line or select a higher-drive buffer like SN74AHCT125 if increased current is needed.
What is the recommended bypass capacitor for SN74HCT125DG4?
Texas Instruments recommends a 0.1-µF ceramic capacitor placed as close as possible to the VCC pin (Pin 14) and GND (Pin 7) of SN74HCT125DG4. This minimizes high-frequency supply noise and prevents logic glitches during output switching. For systems with significant broadband noise, adding a parallel 1-µF capacitor improves low-frequency decoupling without compromising layout compactness.
Is SN74HCT125DG4 pin-compatible with SN74LS125?
Yes, SN74HCT125DG4 is pin-compatible with SN74LS125 in the SOIC-14 package, sharing identical pinout, function table, and terminal assignments. However, SN74HCT125DG4 draws significantly less supply current (80 µA vs. ~15 mA), operates with CMOS-level power efficiency, and provides higher noise immunity-making it a direct, drop-in upgrade for LS-based designs seeking lower power and improved reliability.
SN74HCT125DG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HCT
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 6mA, 6mA
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
SN74HCT125DG4 FAQ
1.How can I place an order for SN74HCT125DG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74HCT125DG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74HCT125DG4 reliable?
The price and inventory of SN74HCT125DG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74HCT125DG4 is usually 5 days.
3.What payment methods are accepted for SN74HCT125DG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74HCT125DG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74HCT125DG4?
SN74HCT125DG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74HCT125DG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74HCT125DG4?
For technical support, including SN74HCT125DG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74HCT125DG4 requirements.
6.How does Aetrix verify that SN74HCT125DG4 is sourced from the original manufacturer or authorized distributors?
All SN74HCT125DG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74HCT125DG4 meets industry standards.
7.What is the process for return or replacement of SN74HCT125DG4?
All SN74HCT125DG4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74HCT125DG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74HCT125DG4 part is unused and in its original packaging.
Return procedure for SN74HCT125DG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74HCT125DG4 Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
