Texas Instruments SN74HCT138DRG4
- Part No.:
- SN74HCT138DRG4
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74HCT138DRG4.pdf
- Description:
- IC DECODER/DEMUX 1X3:8 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SN74HCT138DRG4 from Texas Instruments is a 3-line to 8-line decoder/demultiplexer in SOIC-16 package, operating at 4.5–5.5 V with 17 ns typical propagation delay (VCC = 5.5 V), ±4-mA output drive, and TTL-compatible inputs. It serves as a high-speed memory address decoder or data routing switch in microcontroller-based systems requiring precise enable-controlled channel selection.
For engineers reviewing the SN74HCT138DRG4 datasheet, SN74HCT138DRG4 pinout, SN74HCT138DRG4 application, or SN74HCT138DRG4 equivalent, this page delivers verified functional modes, real-world timing constraints, cascading enable architecture, and validated alternatives for memory decode and demux implementations.
Technical Context
The SN74HCT138DRG4 implements a 3-bit binary-select logic with three independent enable inputs: two active-low (G2A, G2B) and one active-high (G1). Its function table defines eight mutually exclusive active-low outputs (Y0–Y7), where only one output goes low per valid input combination when all enables are asserted.
Propagation delay is specified under CL = 50 pF load, with tpd = 17 ns (typ) at VCC = 5.5 V and TA = 25°C for A/B/C-to-Y transitions, and 18 ns for enable-to-Y transitions - enabling integration into sub-20 ns memory access cycles without adding measurable system latency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 4.5 V to 5.5 V - compatible with standard 5-V TTL/CMOS logic rails; no level-shifting required in legacy 5-V systems. |
| Propagation Delay (tpd) | 17 ns (typ) at VCC = 5.5 V - supports memory access times ≤ 25 ns when paired with fast-enable SRAM or ROM. |
| Output Drive | ±4 mA at 5 V - directly drives up to 10 LSTTL loads without buffering, simplifying bus interface design. |
| Input Compatibility | TTL-voltage compatible (VIH = 2.0 V min, VIL = 0.8 V max) - interoperable with 74LS, 74F, and other bipolar TTL families. |
| Quiescent Current (ICC) | 80 µA max - enables low-static-power operation in always-on decode paths without thermal concerns. |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade embedded control and instrumentation applications. |
Pinout & Package
SN74HCT138DRG4 uses a 16-pin SOIC (D) package measuring 9.90 mm × 3.90 mm with standard 1.27-mm lead pitch and gull-wing leads. Pin 1 is located at the top-left corner with a beveled edge or notch marking orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (G1) | Active-high enable input | Enables decoding when high; used with G2A/G2B to implement hierarchical enable trees or data gating. |
| 2 (G2A), 3 (G2B) | Active-low enable inputs | Both must be low to activate device; allows cascading of multiple SN74HCT138DRG4 units without external inverters. |
| 4 (C), 5 (B), 6 (A) | Binary address inputs | 3-bit select code determining which of Y0–Y7 goes low; MSB = C, LSB = A per TI function table. |
| 7 (Y0) – 14 (Y7) | Active-low decoded outputs | Only one output asserts low per valid input/enable state; outputs remain high-impedance when disabled. |
| 15 (GND), 16 (VCC) | Power terminals | Standard single-supply operation; requires local 0.1-µF ceramic bypass capacitor at VCC pin per TI layout guidance. |
Key Features
| Feature | Design Value |
|---|---|
| Three enable inputs (G1, G2A, G2B) | Eliminates need for external inverters in 24-line decoder expansion; enables direct demux mode using G1 as data input. |
| Low input current (≤1 µA max) | Minimizes loading on upstream logic stages, preserving signal integrity in fan-out-critical address buses. |
| High noise immunity | Guaranteed VIH = 2.0 V and VIL = 0.8 V over full VCC range ensures robust operation in electrically noisy industrial environments. |
| Fast enable-to-output response | 18 ns (typ) enable propagation enables tight synchronization with memory enable signals in burst-mode systems. |
Applications
| Memory Address Decoding | Peripheral Select Logic |
|---|---|
Use Scenario: Selecting one of eight RAM/ROM chips in a 64 KB microcontroller memory map. IC Role / Device Role / Timing Role: Translates upper address bits (A13–A15) into chip-select signals with sub-20 ns latency. Use Value: Enables zero-wait-state memory access by ensuring decoder delay is less than memory access time. |
Use Scenario: Routing I/O requests to UART, SPI, ADC, or GPIO expanders in an 8-bit MCU system. IC Role / Device Role / Timing Role: Generates dedicated peripheral enable lines synchronized to address strobes. Use Value: Reduces external glue logic count; eliminates timing skew between peripheral selects via shared enable path. |
| Data Demultiplexing | Logic State Machine Control |
Use Scenario: Distributing a serial data stream across eight parallel latch inputs in test equipment. IC Role / Device Role / Timing Role: Uses G1 as data input while A/B/C sequence clock edges to route bitstream to selected output. Use Value: Achieves synchronous 1:8 demux without clock domain crossing or additional flip-flops. |
Use Scenario: Driving seven-segment display digit enables and segment drivers in multiplexed displays. IC Role / Device Role / Timing Role: Generates active-low digit select pulses synchronized to display refresh timing. Use Value: Ensures consistent digit brightness by guaranteeing identical propagation delay across all eight outputs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC138N | CMOS family: wider VCC range (2–6 V), higher ICC (≤160 µA), slower tpd (29 ns typ at 6 V). | Preferred for mixed-voltage systems or battery-powered designs needing 3.3-V compatibility. | Select SN74HC138N if supply voltage may drop below 4.5 V or if lower power at reduced speed is acceptable. |
| 74ACT138SCX | Advanced CMOS: 4.5–5.5 V, faster tpd (9 ns typ), higher drive (±24 mA), but higher ICC (40 mA max). | Suitable for ultra-high-speed bus arbitration where SN74HCT138DRG4's 17 ns is insufficient. | Choose 74ACT138SCX only when sub-10 ns propagation is mandatory and board-level power budget permits. |
Compared with SN74HC138N and 74ACT138SCX, the SN74HCT138DRG4 uniquely balances TTL compatibility, 17 ns speed, and 80 µA quiescent current - making it optimal for industrial 5-V systems where signal integrity and legacy interoperability outweigh extreme speed or wide-VCC needs.
Availability
SN74HCT138DRG4 is available at Aetrix Electronics and suitable for memory address decoding, peripheral selection, data demultiplexing, and logic state machine control requiring stable component supply and long-term industrial lifecycle support.
Supply support for SN74HCT138DRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader founded in 1930, delivering analog, embedded processing, and connectivity solutions with emphasis on reliability, longevity, and industrial-grade qualification.
The SN74HCT138DRG4 belongs to TI's HCT (High-Speed CMOS TTL-compatible) logic family, engineered specifically for seamless replacement of 74LS devices in high-performance memory decoding and data-routing systems.
FAQ
What is the maximum operating temperature for SN74HCT138DRG4?
The SN74HCT138DRG4 is rated for industrial operation from –40°C to +85°C. This range is confirmed in Section 5.2 Recommended Operating Conditions of the TI datasheet (SCLS171F), and applies to all SOIC-packaged SN74HCT138 variants including SN74HCT138DRG4. Operation beyond +85°C risks parametric shift and reduced reliability.
Does SN74HCT138DRG4 support 3.3-V input logic levels?
No - SN74HCT138DRG4 requires TTL-compatible input thresholds: VIH ≥ 2.0 V and VIL ≤ 0.8 V, specified only for VCC = 4.5–5.5 V. It does not guarantee correct switching with 3.3-V logic inputs unless those signals meet the 2.0-V VIH minimum, which most 3.3-V CMOS outputs do not. Use SN74HC138 for native 3.3-V compatibility.
Can SN74HCT138DRG4 be used as a demultiplexer?
Yes - the SN74HCT138DRG4 functions as a 1-to-8 demultiplexer when G1 is used as the data input and A/B/C serve as select lines. Per Section 7.1 and Table 7-1 of the datasheet, asserting G1 high while holding G2A/G2B low routes the logical complement of G1 to the selected Y output, enabling true demux behavior with active-low outputs.
What is the recommended bypass capacitor for SN74HCT138DRG4?
Texas Instruments specifies a 0.1-µF ceramic capacitor placed as close as possible to the VCC pin (Pin 16) and GND (Pin 15) for SN74HCT138DRG4. This is stated in Section 8 Power Supply Recommendations and validated in layout guidelines to suppress high-frequency supply noise and prevent decoding glitches during fast transitions.
Is SN74HCT138DRG4 pin-compatible with SN74LS138?
Yes - SN74HCT138DRG4 is a direct functional and pin-for-pin replacement for SN74LS138 in SOIC-16 package. Both share identical pinout (G1, G2A, G2B, A, B, C, Y0–Y7, VCC, GND), same logic function, and TTL-compatible inputs. The SN74HCT138DRG4 improves on LS138 with lower ICC, better noise margins, and guaranteed operation up to 85°C.
SN74HCT138DRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74HCT
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 4mA, 4mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SN74HCT138DRG4 FAQ
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7.What is the process for return or replacement of SN74HCT138DRG4?
All SN74HCT138DRG4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74HCT138DRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74HCT138DRG4 part is unused and in its original packaging.
Return procedure for SN74HCT138DRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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