onsemi SN74LS04D
- Part No.:
- SN74LS04D
- Manufacturer:
- onsemi
- Category:
- Gates and Inverters
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74LS04D.pdf
- Description:
- IC INVERTER 6CH 1-INP 14SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:84,525
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Product details
Overview
SN74LS04D from Texas Instruments is a hex inverter IC in SOIC-14 package, delivering TTL-compatible logic inversion with 5 V supply, 8 mA output sink capability, 0.4 mA output source capability, and typical propagation delay of 15 ns per gate at VCC = 5 V and TA = 25°C. It serves as a fundamental signal-level polarity converter in digital control, interface buffering, and clock conditioning circuits.
For engineers reviewing the SN74LS04D datasheet, pinout, applications, or equivalent options, this page provides verified functional specifications, validated SOIC-14 terminal mapping, confirmed LS-family electrical behavior (VIH = 2 V, VIL = 0.8 V), and real-world substitution guidance for legacy TTL system design and repair.
Technical Context
The SN74LS04D implements six independent totem-pole output inverters using bipolar transistor–transistor logic (TTL) with Schottky-clamped transistors to suppress saturation delay. Each gate features fixed input thresholds (VIH = 2 V min, VIL = 0.8 V max) and guaranteed output drive (IOL = 8 mA min, IOH = −0.4 mA min) under 4.75–5.25 V operation.
Its internal schematic includes base-drive resistors (1.2 kΩ, 8 kΩ, 12 kΩ), collector pull-up (4 kΩ), and Schottky diode clamping-enabling faster switching than standard 7404 while maintaining backward compatibility with TTL logic families. No enable/disable control or three-state functionality is present.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Six independent inverters (Y = A̅); no shared control or enable signals |
| Supply Voltage | 4.75–5.25 V; operation outside this range risks undefined output or damage |
| Input Thresholds | VIH ≥ 2 V (guarantees HIGH recognition), VIL ≤ 0.8 V (guarantees LOW recognition) |
| Output Drive | IOL = 8 mA min (sink), IOH = −0.4 mA min (source); sufficient for driving multiple TTL inputs |
| Propagation Delay | tPLH/tPHL = 15 ns typ (RL = 2 kΩ, CL = 15 pF); defines maximum toggle frequency (~33 MHz) in clean loads |
| Power Consumption | ICCL = 6.6 mA max (active LOW output), ICCH = 2.4 mA max (active HIGH output); enables predictable board-level current budgeting |
| Operating Temperature | 0°C to 70°C ambient; validated for commercial-grade industrial control and instrumentation environments |
Pinout & Package
SN74LS04D uses a 14-pin SOIC (Small Outline Integrated Circuit) package with 3.9 mm body width, 1.75 mm max height, and 1.27 mm lead pitch. Pin 1 is marked by a beveled corner or notch on the package top edge.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | 1A (Input) | First inverter input; must be driven to defined logic level (VCC or GND) to prevent floating-state oscillation |
| 2 | 1Y (Output) | Inverted output of Gate 1; drives downstream TTL loads with full 8 mA sink capability |
| 3 | 2A (Input) | Second inverter input; electrically isolated from other gates |
| 4 | 2Y (Output) | Inverted output of Gate 2; compatible with standard TTL fan-out (10) without external buffering |
| 5 | 3A (Input) | Third inverter input; shares same VIH/VIL specs as all inputs |
| 6 | 3Y (Output) | Inverted output of Gate 3; identical DC/AC performance to Pins 2 and 4 |
| 7 | GND | Ground reference for all internal circuitry; must be low-impedance connection to system common |
| 8 | 4Y (Output) | Inverted output of Gate 4; symmetrical layout supports balanced PCB routing |
| 9 | 4A (Input) | Fourth inverter input; no internal tie to other inputs |
| 10 | 5Y (Output) | Inverted output of Gate 5; matches timing and drive specs across all six gates |
| 11 | 5A (Input) | Fifth inverter input; unused inputs must be tied to VCC or GND per TI SCBA004 |
| 12 | 6Y (Output) | Inverted output of Gate 6; final output in standard pinout sequence |
| 13 | 6A (Input) | Sixth inverter input; completes full hex inverter set |
| 14 | VCC | +5 V power supply; decoupling capacitor (0.1 µF ceramic) required within 1 cm of this pin |
Key Features
| Feature | Design Value |
|---|---|
| Schottky-clamped TTL architecture | Reduces transistor saturation delay, enabling 15 ns typical propagation vs. 22 ns in standard 7404 |
| Guaranteed output drive | 8 mA sink (IOL) supports direct interfacing to up to 10 standard TTL inputs without external buffers |
| Low power consumption | ICCL = 6.6 mA max reduces thermal load in dense logic arrays versus 74S04 (54 mA) |
| Commercial temperature grade | 0°C to 70°C operation validated for industrial control panels, test equipment, and embedded peripherals |
| SOIC-14 RoHS-compliant packaging | NiPdAu lead finish, MSL Level-1 rating, and 1.27 mm pitch support automated SMT assembly and reflow |
Applications
| Industrial Control Logic | Digital Signal Conditioning |
|---|---|
Use Scenario: Inverting sensor status signals (e.g., limit switch closure) before feeding into PLC input modules. IC Role / Device Role / Timing Role: Signal polarity correction with deterministic 15 ns delay; ensures setup/hold compliance for downstream latching. Use Value: Eliminates need for discrete transistor inverters, reducing BOM count and PCB area in panel-mounted I/O assemblies. |
Use Scenario: Converting active-HIGH reset signals to active-LOW for microcontroller reset inputs. IC Role / Device Role / Timing Role: Single-gate inversion with guaranteed VIH/VIL margins; prevents metastability during power-up sequencing. Use Value: Provides noise-immune, rail-to-rail logic translation without external biasing or level-shifting components. |
| Legacy System Repair | Bus Interface Isolation |
Use Scenario: Replacing failed SN7404 or SN74S04 devices in vintage test equipment where LS-speed and lower power are acceptable. IC Role / Device Role / Timing Role: Pin-compatible drop-in replacement for 74xx04 family; maintains identical pinout and logic function. Use Value: Restores functionality without PCB modification, leveraging LS-family reliability and reduced heat generation. |
Use Scenario: Driving LED indicators from microcontroller GPIO pins that lack sufficient sink current. IC Role / Device Role / Timing Role: Current-boosting inverter stage; converts weak MCU outputs into robust 8 mA sink drivers. Use Value: Enables bright LED illumination without loading MCU pins beyond safe limits, extending MCU lifetime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar hex inverter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS04N | Same logic, same electrical specs, but in 14-pin PDIP package (13.97 mm width, through-hole mount) | Requires wave-solder or hand-solder assembly; suited for prototyping, repair, or legacy through-hole boards | Select SN74LS04N when manual assembly, socketing, or compatibility with existing DIP footprints is required. |
| SN74HC04DR | CMOS-based; wider VCC range (2–6 V), higher noise immunity (VIH = 3.5 V min), lower Icc (4 µA typ), but slower at 5 V (21 ns typ) | Not TTL-compatible; unsuitable for direct replacement where input loading or voltage thresholds must match legacy TTL | Choose SN74HC04DR only in new designs targeting ultra-low power or mixed-voltage systems-not for drop-in LS replacement. |
Compared with SN74LS04N, SN74LS04D offers surface-mount compatibility and smaller footprint; compared with SN74HC04DR, it delivers guaranteed TTL interoperability and faster propagation at 5 V, making it the correct choice for maintaining legacy system timing and signal integrity.
Availability
SN74LS04D is available at Aetrix Electronics and suitable for industrial control logic, digital signal conditioning, legacy system repair, and bus interface isolation requiring stable component supply across long-lifecycle programs.
Supply support for SN74LS04D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog and embedded processing technologies with broad manufacturing scale and automotive/military qualification capabilities.
The SN74LS04D belongs to TI's legacy 74LS logic family, designed specifically for high-reliability commercial and industrial digital systems requiring TTL-compatible speed, drive strength, and noise margin at moderate power consumption.
FAQ
What is the maximum operating supply voltage for SN74LS04D?
The absolute maximum supply voltage for SN74LS04D is 7 V, but the recommended operating range is strictly 4.75 V to 5.25 V per the datasheet. Operating outside this window may cause incorrect logic states, increased power dissipation, or accelerated device degradation. Always use a regulated 5 V source with local 0.1 µF decoupling at Pin 14 (VCC) and Pin 7 (GND).
Can SN74LS04D directly drive an LED?
Yes, SN74LS04D can directly drive an LED in sink configuration: connect the LED anode to VCC and cathode to any output pin (e.g., Pin 2). With IOL = 8 mA min, it supports standard 2–20 mA LEDs using a series resistor calculated as R = (5 V − Vf) / ILED. Do not exceed 8 mA continuous per output to maintain VOL ≤ 0.4 V and avoid thermal stress.
Is SN74LS04D pin-compatible with SN7404N?
Yes, SN74LS04D is fully pin-compatible with SN7404N and all other 74xx04 variants in SOIC-14 or PDIP-14 packages. The pin numbering, function assignment (1A–6Y, VCC, GND), and physical layout conform to JEDEC MS-012 for SOIC and MS-001 for PDIP. No PCB changes are needed when substituting SN74LS04D for SN7404N in SOIC footprints.
What happens if an input on SN74LS04D is left unconnected?
An unconnected (floating) input on SN74LS04D may assume an indeterminate logic level due to leakage currents, causing erratic output toggling, excess power draw, or electromagnetic interference. TI explicitly requires all unused inputs to be tied to VCC or GND. For SN74LS04D, connect unused A-inputs (e.g., Pins 1, 3, 5, 9, 11, 13) directly to VCC (Pin 14) or GND (Pin 7) - never leave them open.
Does SN74LS04D support three-state or open-collector outputs?
No, SN74LS04D does not support three-state or open-collector outputs. All six outputs are standard totem-pole (push-pull) structures capable of actively driving HIGH or LOW. It cannot be wired in wired-AND configurations or share a common bus line without external isolation. For bus-driving applications, consider dedicated octal buffers like SN74LS244 or open-collector alternatives such as SN74LS05.
SN74LS04D Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74LS
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- Inverter
- Number of Circuits:
- 6
- Number of Inputs:
- 1
- Features:
- -
- Voltage - Supply:
- 4.75V ~ 5.25V
- Current - Quiescent (Max):
- -
- Current - Output High, Low:
- 400µA, 8mA
- Input Logic Level - Low:
- 0.8V
- Input Logic Level - High:
- 2V
- Max Propagation Delay @ V, Max CL:
- 15ns @ 5V, 15pF
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
SN74LS04D FAQ
1.How can I place an order for SN74LS04D through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LS04D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LS04D reliable?
The price and inventory of SN74LS04D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS04D is usually 5 days.
3.What payment methods are accepted for SN74LS04D?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LS04D transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LS04D?
SN74LS04D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LS04D order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LS04D?
For technical support, including SN74LS04D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS04D requirements.
6.How does Aetrix verify that SN74LS04D is sourced from the original manufacturer or authorized distributors?
All SN74LS04D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS04D meets industry standards.
7.What is the process for return or replacement of SN74LS04D?
All SN74LS04D units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS04D, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LS04D part is unused and in its original packaging.
Return procedure for SN74LS04D:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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