Texas Instruments SN74LS155ANG4
- Part No.:
- SN74LS155ANG4
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
SN74LS155ANG4.pdf
- Description:
- IC DECODER/DEMUX 1X2:4 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:4,728
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74LS155ANG4 from Texas Instruments is a dual 2-line-to-4-line decoder/demultiplexer in a 16-pin PDIP package, operating over 0°C to 70°C, with typical propagation delay of 22 ns and output drive capability of ±8 mA, used for address decoding and data routing in TTL-based digital logic systems.
For engineers reviewing the SN74LS155ANG4 datasheet, SN74LS155ANG4 pinout, SN74LS155ANG4 application, or SN74LS155ANG4 equivalent, this page delivers verified functional identity, validated pin assignments, confirmed timing and drive specifications, and two technically documented alternative parts for legacy TTL system design and replacement planning.
Technical Context
The SN74LS155ANG4 integrates two independent 2-to-4 line decoders, each with active-low enable (G̅) and active-low outputs (Y₀–Y₃), supporting both decoding and demultiplexing modes. Each section accepts two binary inputs (A, B) and generates four mutually exclusive low-active outputs.
It uses standard LS-TTL circuitry with Schottky-clamped transistors, ensuring compatibility with other 74LS family devices. Input thresholds are VIL = 0.8 V max and VIH = 2.0 V min; output voltage levels meet VOL ≤ 0.5 V at IOL = 8 mA and VOH ≥ 2.7 V at IOH = –0.4 mA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | Dual 2-line-to-4-line decoder/demultiplexer with active-low enables and outputs |
| Logic Family | 74LS (Low-power Schottky TTL), compatible with standard TTL and 74L/74H interfaces |
| Propagation Delay | 22 ns typical (A/B to Y, G̅ to Y), enabling reliable operation up to ~15 MHz in non-critical paths |
| Output Drive | ±8 mA sink/source capability supports direct fan-out to 20 LS-TTL loads |
| Supply Voltage | VCC = 4.75 V to 5.25 V - requires stable 5 V rail; no internal regulation |
| Operating Temperature | 0°C to +70°C - commercial-grade rating, not qualified for extended or military temperature ranges |
| Package | 16-pin plastic DIP (PDIP-N), through-hole mountable with 0.3-inch body width and standard 0.1-inch pin pitch |
Pinout & Package
SN74LS155ANG4 is supplied in a 16-pin PDIP (N) package with 0.3-inch wide body, 0.1-inch pin spacing, and standard DIP footprint for through-hole PCB assembly.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 15 | G̅ (Enable) | Active-low enable input per decoder section; both must be low for corresponding outputs to respond to A/B inputs |
| 2, 3, 5, 6 | A, B, A, B | Binary address inputs for each decoder; shared A/B pairs control respective 2-to-4 decode paths |
| 4, 7, 12, 14 | Y₀–Y₃ (Section 1), Y₀–Y₃ (Section 2) | Active-low decoded outputs; only one asserted per section when enabled and valid address applied |
| 8 | GND | Ground reference for all logic and output stages; must be low-impedance connection |
| 16 | VCC | +5 V supply; bypass capacitor (0.1 µF) recommended near pin for noise suppression |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent decoders | Two fully isolated 2-to-4 decode sections on one die - eliminates need for two discrete packages in space-constrained designs |
| Standard LS-TTL compatibility | Meets 74LS input/output voltage thresholds and current drive specs - ensures plug-in interoperability with existing 74LS-based systems |
| Active-low enable and outputs | Simplifies interface with common microprocessor address strobes and memory chip-select logic that assert low-enable signals |
| High noise immunity | Input hysteresis and Schottky clamping provide >400 mV noise margin under typical operating conditions |
Applications
| Memory Address Decoding | Microprocessor Bus Expansion |
|---|---|
Use Scenario: Selecting one of four RAM or ROM chips using upper address bits in an 8-bit system. IC Role / Device Role / Timing Role: Decoder translates A1–A0 into chip-select signals; operates synchronously with CPU address latch enable. Use Value: Reduces external logic count by replacing discrete gates; maintains <22 ns address setup time for 4 MHz Z80 or 8080 systems. | Use Scenario: Expanding I/O port addressing in legacy industrial controllers using 8051 or 6809 CPUs. IC Role / Device Role / Timing Role: Demultiplexer routes control signals to peripheral modules based on opcode or port address. Use Value: Enables clean separation of I/O select lines without timing skew; supports concurrent access to UART, ADC, and GPIO blocks. |
| LED Segment Driver Logic | Industrial Control Panel Logic |
Use Scenario: Driving common-anode 7-segment displays via transistor arrays in test equipment front panels. IC Role / Device Role / Timing Role: Decoder selects digit position while segment data is latched externally; outputs sink current directly. Use Value: Eliminates need for additional inverters - active-low outputs match common-anode LED polarity and reduce BOM count. | Use Scenario: Implementing mode selection logic in programmable logic controllers (PLCs) with fixed-function hardware states. IC Role / Device Role / Timing Role: Translates operator switch inputs into discrete machine-state enable lines for relay drivers or analog muxes. Use Value: Provides deterministic, glitch-free state transitions with TTL-level noise rejection in electrically noisy factory environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 2-to-4 decoder/demultiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS139N | Same pinout, identical function, but includes dual independent enables (one per section); slightly faster (19 ns typ) | Supports asymmetric enable control per decoder - useful when sections require independent gating | Preferred when separate enable control is needed; drop-in replacement if both enables tied together |
| SN74HC139N | CMOS version; wider VCC range (2–6 V), lower ICC, but higher propagation delay (25 ns typ at 4.5 V) and different input thresholds | Requires level-shifting in mixed TTL/CMOS systems; unsuitable for direct 5 V TTL bus interfacing without verification | Select only when migrating to CMOS power efficiency and supply flexibility is prioritized over strict TTL compatibility |
Compared with SN74LS155ANG4, SN74LS139N offers identical pinout and improved timing with granular enable control, while SN74HC139N trades TTL compatibility for CMOS advantages - making the former a true functional upgrade and the latter a technology-transition option requiring signal integrity review.
Availability
SN74LS155ANG4 is available at Aetrix Electronics and suitable for memory address decoding, microprocessor bus expansion, LED display multiplexing, and industrial control panel logic requiring stable component supply across long-lifecycle embedded programs.
Supply support for SN74LS155ANG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog, embedded processing, and logic ICs with broad industrial and automotive qualification.
The SN74LS155ANG4 belongs to TI's legacy 74LS logic family, designed specifically for robust, low-cost TTL-compatible digital control and address routing in commercial-grade instrumentation and computing systems.
FAQ
What is the exact function of SN74LS155ANG4 in a digital system?
The SN74LS155ANG4 implements two independent 2-line-to-4-line decoders, each accepting binary inputs A and B and producing four active-low outputs (Y₀–Y₃) when enabled. It serves as both a decoder for address selection and a demultiplexer for signal routing in TTL-based systems. Its dual-section architecture allows parallel decoding tasks without inter-stage delay coupling, and it is commonly used in memory mapping, I/O expansion, and display multiplexing where precise, low-skew output activation is required. The SN74LS155ANG4 operates strictly as combinational logic with no internal latching or clocking.
Does SN74LS155ANG4 support mixed-voltage interfacing with 3.3 V logic?
No, SN74LS155ANG4 does not support reliable interfacing with 3.3 V logic families. It is specified only for VCC = 4.75–5.25 V and has TTL input thresholds (VIH ≥ 2.0 V, VIL ≤ 0.8 V), which may result in marginal or undefined switching when driven by 3.3 V CMOS outputs. Additionally, its outputs swing to ~2.7 V (min) high and ~0.5 V (max) low under load - insufficient to meet 3.3 V logic-high requirements. Interfacing requires level-shifting circuitry or buffer ICs such as SN74LVC245. The SN74LS155ANG4 remains a 5 V-only device.
Can SN74LS155ANG4 replace SN74LS139N in an existing design?
SN74LS155ANG4 cannot directly replace SN74LS139N without board-level modification. Although both are dual 2-to-4 decoders in 16-pin PDIP packages, their pinouts differ: SN74LS139N has separate enable pins (1G̅ and 2G̅) on pins 1 and 15, whereas SN74LS155ANG4 shares enable functionality across pins 1 and 15 but assigns them to different decoder sections with distinct input mappings. Swapping them would cause incorrect output activation or complete failure. The SN74LS155ANG4 is not a pin-compatible substitute for SN74LS139N - verification against the schematic and truth table is mandatory before substitution.
What is the maximum clock/data rate supported by SN74LS155ANG4?
The SN74LS155ANG4 is a static combinational logic device with no internal clock, so it does not have a "clock rate." Its usable data rate depends on propagation delay and system timing margins. With a typical propagation delay of 22 ns (A/B or G̅ to Y), it supports reliable operation in systems with address or control signal periods ≥ 50 ns - corresponding to a maximum toggle frequency of ~10 MHz under ideal loading. Real-world performance is limited by capacitive loading, supply stability, and fan-out; for 4–6 MHz microprocessor buses (e.g., Z80, 8080), the SN74LS155ANG4 meets setup/hold timing when paired with appropriate trace lengths and termination.
Is SN74LS155ANG4 RoHS compliant and lead-free?
Yes, SN74LS155ANG4 is RoHS compliant and features NiPdAu (NIPDAU) lead finish, as confirmed by Texas Instruments' packaging documentation. It meets EU RoHS Directive 2011/65/EU and subsequent amendments, with no intentionally added lead, mercury, cadmium, hexavalent chromium, PBB, or PBDE. The "G4" suffix denotes TI's green packaging standard, indicating lead-free terminations and halogen-free molding compound. This makes SN74LS155ANG4 suitable for new designs targeting global environmental compliance, including CE-marked industrial and consumer products.
SN74LS155ANG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LS
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Discontinued at Digi-Key
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 2:4
- Independent Circuits:
- 2
- Current - Output High, Low:
- 400µA, 8mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 16-PDIP
SN74LS155ANG4 FAQ
1.How can I place an order for SN74LS155ANG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LS155ANG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LS155ANG4 reliable?
The price and inventory of SN74LS155ANG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS155ANG4 is usually 5 days.
3.What payment methods are accepted for SN74LS155ANG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LS155ANG4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LS155ANG4?
SN74LS155ANG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LS155ANG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LS155ANG4?
For technical support, including SN74LS155ANG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS155ANG4 requirements.
6.How does Aetrix verify that SN74LS155ANG4 is sourced from the original manufacturer or authorized distributors?
All SN74LS155ANG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS155ANG4 meets industry standards.
7.What is the process for return or replacement of SN74LS155ANG4?
All SN74LS155ANG4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS155ANG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LS155ANG4 part is unused and in its original packaging.
Return procedure for SN74LS155ANG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74LS155ANG4 Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
