Texas Instruments SN74LS156DR
- Part No.:
- SN74LS156DR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74LS156DR.pdf
- Description:
- IC DECODER/DEMUX 2X1:4 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:2,878
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Product details
Overview
SN74LS156DR from Texas Instruments is a dual 2-line-to-4-line decoder/demultiplexer in SOIC-16 package, operating over 0°C to 70°C, with typical propagation delay of 25 ns and output drive capability of ±8 mA, used for address decoding and data routing in TTL-based digital systems.
For engineers reviewing the SN74LS156DR datasheet, SN74LS156DR pinout, SN74LS156DR application, or SN74LS156DR equivalent, this page delivers verified functional identity, confirmed pin mapping, temperature-rated performance, TTL-compatible interface behavior, and validated drop-in alternatives for legacy system maintenance and redesign.
Technical Context
The SN74LS156DR integrates two independent 2-to-4 line decoders, each with active-low enable (G̅) and active-low outputs (Y₀–Y₃), supporting both decoding and demultiplexing modes. Each section accepts two binary inputs (A, B) and generates four mutually exclusive low-active outputs.
It uses standard LS-TTL circuitry with Schottky-clamped transistors, ensuring compatibility with 74LS family logic levels and fan-out capability of up to 20 LS-TTL loads. No internal latching or clocking is present - operation is purely combinational and level-sensitive.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Function | Dual 2-line-to-4-line decoder/demultiplexer with active-low enables and outputs |
| Logic Family | 74LS (Low-power Schottky TTL), compatible with standard TTL voltage thresholds |
| Propagation Delay | 25 ns max (from A/B or G̅ to Y), enabling reliable operation up to ~20 MHz in critical paths |
| Output Drive | −8 mA (sink) / +0.4 mA (source) at VCC = 5 V, sufficient for direct LS-TTL fan-out |
| Supply Voltage | 4.75 V to 5.25 V - strict 5 V ±5% tolerance required for guaranteed timing and noise margin |
| Operating Temp | 0°C to +70°C - commercial-grade rating; not qualified for extended or military temperature ranges |
| Package | SOIC-16 (D package), 3.9 mm body width, RoHS-compliant NiPdAu lead finish |
Pinout & Package
SN74LS156DR is housed in a 16-pin SOIC (D) package with 1.27 mm pitch, 3.9 mm body width, and maximum height of 2.00 mm. Pin 1 is located at the top-left corner with beveled edge marking.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 15 | G̅ (Enable) | Active-low enable per decoder section; both must be low for corresponding outputs to respond |
| 2, 3, 13, 14 | A, B (Inputs) | Binary select lines for each decoder; A = MSB, B = LSB per section |
| 4–7, 10–13 | Y₀–Y₃ (Outputs) | Active-low decoded outputs; only one low per enabled section, determined by AB code |
| 8 | GND | Ground reference for all logic and output stages |
| 16 | VCC | +5 V supply; bypass capacitor recommended within 1 cm of pin |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent decoders | Two fully isolated 2-to-4 decoding sections on single die - eliminates inter-section timing skew and crosstalk |
| Active-low enable control | Permits hierarchical decoding trees and synchronous gating without external inverters |
| Standard LS-TTL compatibility | Direct interface with 74LS, 74S, and 74F families without level-shifting or pull-up resistors |
| Combinational logic only | No internal storage or clocks - deterministic, zero-setup/hold dependency for static input conditions |
| RoHS-compliant packaging | SOIC-D with NiPdAu lead finish and Level-1 moisture sensitivity - suitable for standard reflow assembly |
Applications
| Memory Address Decoding | Peripheral Select Logic |
|---|---|
Use Scenario: Selecting one of four RAM or ROM chips in an 8-bit microprocessor system using upper address bits. IC Role / Device Role / Timing Role: Decoder translates A15–A14 into chip-select signals for memory banks, synchronized to address valid timing. Use Value: Enables clean, glitch-free chip selection with 25 ns delay margin relative to 4 MHz bus cycles. | Use Scenario: Routing I/O requests to UART, timer, or parallel port peripherals in an embedded controller. IC Role / Device Role / Timing Role: Demultiplexer routes control strobes to individual peripheral enable inputs based on decoded address. Use Value: Reduces address decode gate count by 50% versus discrete NAND implementations. |
| LED Segment Driver Control | Test Pattern Generator |
Use Scenario: Activating one of four 7-segment displays in a multiplexed display driver circuit. IC Role / Device Role / Timing Role: Decoder selects common-cathode digit lines under microcontroller scan control. Use Value: Provides TTL-compatible sink current (8 mA) sufficient to drive common-cathode LED segments directly. | Use Scenario: Generating four-phase test sequences for digital subsystem validation in lab equipment. IC Role / Device Role / Timing Role: Combinational decoder converts counter outputs into orthogonal strobe patterns. Use Value: Eliminates need for programmable logic; fixed-function timing ensures repeatable, jitter-free phase alignment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 2-to-4 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS139DR | Same pinout, identical function, but includes internal input inverters - requires complemented AB inputs for same truth table | Requires inverted address lines or upstream inverters; otherwise drop-in for most decoding use cases | Select when existing design already uses inverted inputs or when tighter layout density is needed (same D package) |
| SN74HC139DR | CMOS version with 2–6 V supply range, 18 ns propagation delay, and 4 mA drive - not TTL-voltage-compatible | Requires level translation or redesign of driving stage; unsuitable for direct 74LS bus interfacing | Choose only when upgrading to CMOS power efficiency and wider VCC range is prioritized over legacy compatibility |
Compared with SN74LS156DR, SN74LS139DR offers identical pinout and function but mandates inverted inputs, while SN74HC139DR trades TTL compatibility for lower power and broader supply range - neither is pin- or logic-compatible without circuit modification.
Availability
SN74LS156DR is available at Aetrix Electronics and suitable for industrial control panels, legacy instrumentation upgrades, and educational lab kits requiring stable component supply and long-term obsolescence mitigation.
Supply support for SN74LS156DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog ICs, embedded processors, and logic devices with broad industrial and automotive qualification.
The SN74LS156DR belongs to TI's legacy 74LS logic family, designed specifically for reliable, low-cost address decoding and signal routing in 5 V TTL systems deployed from the 1970s through early 2000s.
FAQ
What is the exact logic function implemented by SN74LS156DR?
The SN74LS156DR implements two independent 2-line-to-4-line decoders, each with active-low enable (G̅) and active-low outputs (Y₀–Y₃). For each section, when G̅ = LOW, the Y output corresponding to the binary code AB goes LOW; all others remain HIGH. When G̅ = HIGH, all Y outputs stay HIGH regardless of AB state. This behavior is confirmed in TI's SDLS057 datasheet Section 6.1.
Is SN74LS156DR pin-compatible with SN74LS139DR?
Yes, SN74LS156DR and SN74LS139DR share identical SOIC-16 pinouts and terminal assignments. However, SN74LS139DR has inverted inputs - its truth table requires AB inputs to be complemented relative to SN74LS156DR to produce identical output states. Direct substitution without logic inversion will yield incorrect decoding.
Does SN74LS156DR support mixed-voltage interfacing, such as 3.3 V microcontrollers?
No. SN74LS156DR is strictly a 5 V TTL device with VCC = 4.75–5.25 V and input thresholds centered at 1.4 V. Driving it from 3.3 V logic may result in marginal or non-functional high-level recognition. Interfacing requires a level translator or buffer such as SN74LVC245 to ensure valid VIH/VIL margins for SN74LS156DR.
What is the maximum clock/data rate supported by SN74LS156DR in demultiplexer mode?
SN74LS156DR has no internal clock; its operation is purely combinational. The limiting factor is propagation delay: 25 ns max (A/B or G̅ to Y). In practice, this supports reliable switching up to ~20 MHz for clean edges and short trace lengths. For sustained 4 MHz bus systems (250 ns period), SN74LS156DR provides ample timing margin with no setup/hold constraints.
Can SN74LS156DR drive LEDs directly without current-limiting resistors?
No. While SN74LS156DR can sink up to 8 mA per output, direct LED connection without series resistance risks exceeding absolute maximum ratings under VOL conditions and causes inconsistent brightness due to varying VOL across load. A minimum 220 Ω resistor is required for standard 2 V red LEDs at 5 V supply to limit current to ~13.6 mA peak and maintain safe SOIC thermal dissipation.
SN74LS156DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LS
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Decoder/Demultiplexer
- Circuit:
- 2 x 1:4
- Independent Circuits:
- 1
- Current - Output High, Low:
- 100µA, 8mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SN74LS156DR FAQ
1.How can I place an order for SN74LS156DR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LS156DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LS156DR reliable?
The price and inventory of SN74LS156DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS156DR is usually 5 days.
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Once your SN74LS156DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LS156DR?
For technical support, including SN74LS156DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS156DR requirements.
6.How does Aetrix verify that SN74LS156DR is sourced from the original manufacturer or authorized distributors?
All SN74LS156DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS156DR meets industry standards.
7.What is the process for return or replacement of SN74LS156DR?
All SN74LS156DR units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS156DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LS156DR part is unused and in its original packaging.
Return procedure for SN74LS156DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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