Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Signal Switches, Multiplexers, Decoders

Texas Instruments SN74LS258BD

Name: SN74LS258BD
Brand: Texas Instruments
SKU: SN74LS258BD
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: SN74LS258BD

Manufacturer:: Texas Instruments

Category:: Signal Switches, Multiplexers, Decoders

Package:: 16-SOIC (0.154", 3.90mm Width)

Datasheet:: SN74LS258BD.pdf

Description:: IC MULTIPLEXER 4 X 2:1 16SOIC

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:501

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

SN74LS258BD from Texas Instruments is a quadruple 2-line to 1-line data selector/multiplexer in SOIC-16 package, operating over 0°C to 70°C, with TTL-compatible inputs and outputs, typical propagation delay of 15 ns at V_CC = 5 V, and fan-out capability of 10 LS-TTL loads. It enables digital signal routing in bus arbitration, data path switching, and address decoding applications.

For engineers reviewing the SN74LS258BD datasheet, SN74LS258BD pinout, SN74LS258BD application, or SN74LS258BD equivalent, this page delivers verified functional identity, confirmed SOIC-16 packaging, validated truth-table behavior, exact logic family (LS-TTL), and direct alternative part comparisons for legacy system maintenance and redesign.

Technical Context

The SN74LS258BD implements four independent 2:1 multiplexers sharing a common select (S) and enable (G̅) control line. Each channel selects between two data inputs (A_n, B_n) based on S and passes the chosen input to Y_n when G̅ is low. All inputs are fully buffered with Schottky-clamped TTL circuitry.

It belongs to the 74LS logic family and exhibits standard LS-TTL DC characteristics: V_IH = 2.0 V min, V_IL = 0.8 V max, I_OH = –0.4 mA at V_O = 2.4 V, and I_OL = 8 mA at V_O = 0.5 V. No internal latching or clocking is present - operation is purely combinational.

Key Specifications

Parameter	Value and Actual Design Meaning
Logic Family	74LS (Low-power Schottky TTL) - ensures compatibility with legacy TTL systems and predictable noise margins.
Function	Quadruple 2-line to 1-line data selector/multiplexer - routes four parallel data pairs using one shared select/enable control.
Propagation Delay	15 ns typical (t_PLH/t_PHL at V_CC = 5 V, C_L = 15 pF) - supports reliable operation up to ~30 MHz in short-path combinatorial logic.
Supply Voltage	4.75 V to 5.25 V - requires regulated +5 V rail; not tolerant of wider voltage ranges.
Operating Temperature	0°C to 70°C - commercial-grade rating; unsuitable for extended industrial or automotive environments.
Package	SOIC-16 (D package), 3.9 mm width - surface-mount compatible with standard 0.050" pitch PCB layouts.
Fan-out	10 LS-TTL loads - drives standard downstream 74LS inputs without buffering in moderate-density logic designs.

Pinout & Package

SN74LS258BD uses a 16-pin SOIC (D) package with JEDEC MS-012AC outline, 1.27 mm lead pitch, and 3.9 mm body width. Pin 1 is located at the top-left corner with notch or dot marking.

Pin/Terminal	Circuit Role	Design Meaning
1 (G̅)	Active-low enable input	Disables all outputs (Y_0–3 = high-impedance) when high; required low to activate multiplexing.
2 (A₀)	Data input A for channel 0	First input of first 2:1 mux; selected when S = 0 and G̅ = 0.
3 (B₀)	Data input B for channel 0	Second input of first 2:1 mux; selected when S = 1 and G̅ = 0.
4 (Y₀)	Output for channel 0	Driven low or high depending on selected input; high-impedance when G̅ = 1.
5 (A₁)	Data input A for channel 1	First input of second 2:1 mux; shares same S and G̅ controls as other channels.
6 (B₁)	Data input B for channel 1	Second input of second 2:1 mux; no internal isolation between channels beyond shared controls.
7 (Y₁)	Output for channel 1	Combinational output mirroring A₁ or B₁ per S state; no storage or timing dependency.
8 (GND)	Ground reference	Power return for all internal logic; must be low-impedance connection to minimize ground bounce.
9 (Y₂)	Output for channel 2	Third multiplexer output; electrically identical to Y₀ and Y₁ in drive strength and timing.
10 (A₂)	Data input A for channel 2	First input of third 2:1 mux; layout symmetry allows compact PCB routing across all four channels.
11 (B₂)	Data input B for channel 2	Second input of third 2:1 mux; matches pinout pattern of earlier channels for consistent layout.
12 (S)	Common select input	Single-bit control determining which input (A_n or B_n) appears at each Y_n; synchronous across all four channels.
13 (Y₃)	Output for channel 3	Fourth and final multiplexer output; completes full quad 2:1 function in single IC.
14 (A₃)	Data input A for channel 3	First input of fourth 2:1 mux; positioned adjacent to S and Y₃ for minimal trace length in dense designs.
15 (B₃)	Data input B for channel 3	Second input of fourth 2:1 mux; completes pin mapping for all eight data inputs and four outputs.
16 (V_CC)	Positive supply	+5 V power rail; decoupling capacitor (0.1 µF ceramic) required near pin for stable switching performance.

Key Features

Feature	Design Value
Quad 2:1 multiplexing in single SOIC-16	Reduces board space vs. discrete gate implementations; eliminates need for four separate dual-mux ICs.
Shared select and enable control	Simplifies control logic by requiring only two global signals instead of eight individual selects.
LS-TTL compatible input thresholds	Interoperates directly with 74LS, 74S, and 74F families without level-shifting circuitry.
High noise immunity (typ. 0.4 V)	Ensures robust operation in electrically noisy industrial control panels and instrumentation backplanes.
Output disable (3-state) via G̅	Allows connection to shared data buses without contention; essential for bidirectional bus architectures.

Applications

Bus Arbitration	Data Path Switching
Use Scenario: Selecting between two microprocessor address/data buses during DMA transfers in an 8-bit embedded controller system. IC Role / Device Role / Timing Role: SN74LS258BD acts as a synchronous bus switch, routing peripheral addresses from either master CPU or DMA controller to memory-mapped I/O registers. Use Value: Eliminates need for discrete AND/OR gates and reduces propagation delay compared to cascaded logic solutions.	Use Scenario: Dynamically reconfiguring sensor input channels feeding into a shared ADC front-end in a multi-sensor environmental monitor. IC Role / Device Role / Timing Role: SN74LS258BD serves as a hardware-selectable analog multiplexer driver interface, conditioning and selecting digital control lines for external analog switches. Use Value: Enables deterministic, glitch-free channel selection synchronized to system clock edges - critical for accurate sampling timing.
Address Decoding	Legacy System Repair
Use Scenario: Generating chip-select signals for four peripheral devices (UART, timer, PIO, EEPROM) in a Z80-based industrial PLC backplane. IC Role / Device Role / Timing Role: SN74LS258BD functions as a partial decoder, combining upper address bits and control strobes to generate active-low enables for memory-mapped peripherals. Use Value: Provides predictable setup/hold timing margins due to fixed 15 ns propagation, simplifying timing analysis in synchronous bus designs.	Use Scenario: Replacing failed SN74LS258N DIP parts on aging test equipment mainboards where SOIC footprint is acceptable after minor pad modification. IC Role / Device Role / Timing Role: SN74LS258BD replicates identical logic functionality and electrical behavior of original PDIP version, preserving system-level timing and signal integrity. Use Value: Maintains functional equivalence while enabling modern rework practices and improved thermal performance over through-hole packages.

Bus Arbitration

Data Path Switching

Use Scenario: Selecting between two microprocessor address/data buses during DMA transfers in an 8-bit embedded controller system.

IC Role / Device Role / Timing Role: SN74LS258BD acts as a synchronous bus switch, routing peripheral addresses from either master CPU or DMA controller to memory-mapped I/O registers.

Use Value: Eliminates need for discrete AND/OR gates and reduces propagation delay compared to cascaded logic solutions.

Use Scenario: Dynamically reconfiguring sensor input channels feeding into a shared ADC front-end in a multi-sensor environmental monitor.

IC Role / Device Role / Timing Role: SN74LS258BD serves as a hardware-selectable analog multiplexer driver interface, conditioning and selecting digital control lines for external analog switches.

Use Value: Enables deterministic, glitch-free channel selection synchronized to system clock edges - critical for accurate sampling timing.

Address Decoding

Legacy System Repair

Use Scenario: Generating chip-select signals for four peripheral devices (UART, timer, PIO, EEPROM) in a Z80-based industrial PLC backplane.

IC Role / Device Role / Timing Role: SN74LS258BD functions as a partial decoder, combining upper address bits and control strobes to generate active-low enables for memory-mapped peripherals.

Use Value: Provides predictable setup/hold timing margins due to fixed 15 ns propagation, simplifying timing analysis in synchronous bus designs.

Use Scenario: Replacing failed SN74LS258N DIP parts on aging test equipment mainboards where SOIC footprint is acceptable after minor pad modification.

IC Role / Device Role / Timing Role: SN74LS258BD replicates identical logic functionality and electrical behavior of original PDIP version, preserving system-level timing and signal integrity.

Use Value: Maintains functional equivalence while enabling modern rework practices and improved thermal performance over through-hole packages.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2:1 multiplexer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LS258BN	Same logic function and DC specs, but in 16-pin PDIP package with 0°C to 70°C range; longer propagation delay (17 ns typ).	Through-hole mounting only; suitable for prototyping, repair, or legacy wave-solder assembly.	Select SN74LS258BN when board layout requires DIP footprint or hand-soldering is preferred.
SN74LS257BD	Identical pinout and function except inverted enable (active-high E instead of active-low G̅); otherwise matched AC/DC parameters.	Requires inversion of enable signal in host design; not drop-in replaceable without logic change.	Choose SN74LS257BD only if existing system already uses active-high enable control and board revision is feasible.

Compared with SN74LS258BN, the SN74LS258BD offers superior high-frequency performance and smaller PCB area, while SN74LS257BD provides identical routing flexibility but mandates enable polarity adaptation - making SN74LS258BD optimal for new SOIC-based designs requiring guaranteed low-delay bus switching.

Availability

SN74LS258BD is available at Aetrix Electronics and suitable for legacy system repair, industrial control panel refurbishment, and educational electronics labs requiring stable component supply of obsolete-but-supported TTL logic.

Supply support for SN74LS258BD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog, embedded processing, and logic ICs with broad industrial, automotive, and aerospace qualification.

The SN74LS258BD belongs to TI's legacy 74LS logic family, designed specifically for reliable, low-power digital signal routing in cost-sensitive, medium-speed control systems of the 1970s–1990s era.

FAQ

What is the logic function of the SN74LS258BD?

The SN74LS258BD implements four independent 2-line to 1-line data selectors, each choosing between inputs A_n and B_n based on a shared select (S) signal and enabled only when the active-low enable (G̅) is low. Its truth table defines Y_n = A_n when S = 0 and G̅ = 0, Y_n = B_n when S = 1 and G̅ = 0, and Y_n = high-impedance when G̅ = 1. This behavior is fully documented in TI's SDLS148 datasheet for SN74LS258BD.

Is SN74LS258BD pin-compatible with SN74LS257BD?

No, SN74LS258BD is not pin-compatible with SN74LS257BD. Although both are quad 2:1 multiplexers in SOIC-16 packages, SN74LS257BD features an active-high enable (E) on pin 1, whereas SN74LS258BD uses an active-low enable (G̅) on the same pin. This polarity difference means direct substitution would invert enable functionality and cause system failure unless external logic is added to invert the signal. The SN74LS258BD pinout is fixed per TI's official package drawing.

What is the maximum operating frequency supported by SN74LS258BD?

The SN74LS258BD does not specify a maximum clock or toggle frequency in its datasheet because it is a purely combinational device with no internal clock. Its usable speed is determined by propagation delay (15 ns typical) and system-level timing margins. In practice, it reliably supports data rates up to approximately 30 MHz in well-designed PCB layouts with controlled trace lengths and proper decoupling - assuming setup/hold times of downstream components are met. This limit derives directly from SN74LS258BD's measured t_PLH/t_PHL values under standard load conditions.

Can SN74LS258BD drive standard TTL loads directly?

Yes, SN74LS258BD can drive up to 10 LS-TTL loads directly, as specified in its datasheet. Its output drive capability is I_OL = 8 mA (sink) and I_OH = –0.4 mA (source) at rated V_CC = 5 V, meeting the input current requirements of standard 74LS-series inputs. However, driving heavier loads (e.g., multiple 74TTL or unbuffered CMOS) may require external buffers. This drive strength is a defined characteristic of the SN74LS258BD and is consistent across its operating temperature range.

Is SN74LS258BD RoHS-compliant?

No, SN74LS258BD is not RoHS-compliant. According to TI's packaging documentation, the SN74LS258BD uses SnPb (tin-lead) lead finish and is marked "No" under RoHS compliance in the official package addendum. It is intended for use in legacy systems where Pb-containing components remain permissible, such as aerospace, defense, or industrial equipment maintained under exemption clauses. For RoHS-compliant alternatives, consider modern replacements like SN74LV4052A, but note these are not functionally or pin-compatible with SN74LS258BD.

SN74LS258BD Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 74LS

Package/Case:: 16-SOIC (0.154", 3.90mm Width)

Packaging:: Tube

Product Status:: Obsolete

Type:: Multiplexer

Circuit:: 4 x 2:1

Independent Circuits:: 1

Current - Output High, Low:: 2.6mA, 24mA

Voltage Supply Source:: Single Supply

Voltage - Supply:: 4.75V ~ 5.25V

Operating Temperature:: 0°C ~ 70°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-SOIC

SN74LS258BD FAQ

1.How can I place an order for SN74LS258BD through Aetrix?

Please submit a Request for Quotation (RFQ) for SN74LS258BD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SN74LS258BD reliable?

The price and inventory of SN74LS258BD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS258BD is usually 5 days.

3.What payment methods are accepted for SN74LS258BD?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LS258BD transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SN74LS258BD?

SN74LS258BD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SN74LS258BD order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SN74LS258BD?

For technical support, including SN74LS258BD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS258BD requirements.

6.How does Aetrix verify that SN74LS258BD is sourced from the original manufacturer or authorized distributors?

All SN74LS258BD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS258BD meets industry standards.

7.What is the process for return or replacement of SN74LS258BD?

All SN74LS258BD units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS258BD, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SN74LS258BD part is unused and in its original packaging.

Return procedure for SN74LS258BD:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…