Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

onsemi SN74LS26D

Name: SN74LS26D
Brand: onsemi
SKU: SN74LS26D
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: SN74LS26D

Manufacturer:: onsemi

Category:: Gates and Inverters

Package:: -

Datasheet:: SN74LS26D.pdf

Description:: IC QUAD 2-INP

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:5,258

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

SN74LS26D from Texas Instruments is a dual 2-input NAND buffer with open-collector outputs, designed for wired-AND logic and level translation in TTL systems. It features 14-pin SOIC packaging, operates from 0°C to 70°C, supports V_CC = 4.75–5.25 V, delivers I_OH = –400 µA at V_OH = 3.4 V, and provides I_OL = 8 mA at V_OL = 0.5 V - enabling direct interface with higher-voltage loads in industrial control panels.

For engineers reviewing the SN74LS26D datasheet, pinout, applications, or equivalent options, this device is selected for wired-logic bus interfacing, active-low enable gating in legacy TTL subsystems, and pull-up-independent output driving where sink current capability and voltage-level flexibility are critical.

Technical Context

The SN74LS26D implements two independent NAND gates with open-collector outputs, requiring external pull-up resistors to define high-level voltage and logic threshold. Each gate accepts standard LS-TTL input levels (V_IL ≤ 0.8 V, V_IH ≥ 2.0 V) and drives loads up to 8 mA while maintaining V_OL ≤ 0.5 V.

Its open-collector architecture enables direct wired-AND connection of multiple outputs without contention, supporting bus arbitration and shared interrupt signaling. The device is not internally clamped for ESD protection and relies on system-level transient suppression when used in noisy industrial environments.

Key Specifications

Parameter	Value and Actual Design Meaning
V_CC Range	4.75 V to 5.25 V - ensures compatibility with regulated 5-V TTL power rails and rejects supply noise within ±5% tolerance.
Output Type	Open-collector - requires external pull-up; enables wired-AND logic, mixed-voltage interfacing, and current-sinking up to 8 mA.
I_OL (max)	8 mA at V_OL ≤ 0.5 V - sufficient to drive LEDs, relay coils, or TTL inputs directly without buffer amplification.
I_OH (max)	–400 µA at V_OH = 3.4 V - defines minimum pull-up resistance needed for reliable high-state voltage under load.
Propagation Delay	15 ns typical at V_CC = 5 V, C_L = 15 pF - supports synchronous operation up to ~30 MHz in short-line, low-capacitance configurations.
Input Thresholds	V_IL ≤ 0.8 V / V_IH ≥ 2.0 V - matches standard LS-TTL logic families, ensuring noise margin and interoperability with SN74LSxx devices.

Pinout & Package

SN74LS26D is housed in a 14-pin SOIC (D) package with 1.27 mm pitch, 3.9 mm body width, and 1.75 mm maximum height - compatible with standard surface-mount reflow profiles (MSL Level-1).

Pin/Terminal	Circuit Role	Design Meaning
1, 2, 4, 5	Input A/B per gate	Standard TTL-compatible inputs; each pair forms one NAND gate (Gate 1: Pins 1&2; Gate 2: Pins 4&5).
3, 6	Output Y per gate	Open-collector outputs - must be externally pulled up; capable of sinking 8 mA while holding V_OL ≤ 0.5 V.
7	GND	Ground reference for all internal circuitry and output sink current return path.
14	V_CC	Positive supply terminal - powers internal logic; must be decoupled locally with 0.1 µF ceramic capacitor.
8–13	No-connect (NC)	Unused pins - left unconnected per TI datasheet; no internal bonding or function assigned.

Key Features

Feature	Design Value
Wired-AND capability	Enables direct connection of multiple SN74LS26D outputs to a single pull-up resistor for bus arbitration or interrupt combining.
High sink current	8 mA per output allows direct drive of indicators, optocouplers, or legacy TTL inputs without external transistors.
TTL-compatible inputs	Accepts standard LS-TTL voltage thresholds, ensuring seamless integration into existing 74LS-based control logic.
SOIC packaging	14-pin small-outline package supports automated assembly, reduces PCB footprint vs. PDIP, and meets IPC-7351 land pattern standards.

Applications

Industrial Control Bus	Legacy System Interface
Use Scenario: Wired-AND interrupt aggregation across multiple sensor modules in a PLC backplane. IC Role / Device Role / Timing Role: Open-collector NAND gate acting as active-low interrupt combiner with shared pull-up. Use Value: Eliminates need for discrete diodes or additional logic; reduces component count and signal propagation skew across parallel interrupt lines.	Use Scenario: Level-shifting enable signals between 5-V TTL logic and 12-V solenoid drivers. IC Role / Device Role / Timing Role: Current-sinking gate controlling external 12-V pull-up to activate driver ICs. Use Value: Provides galvanically isolated logic-level translation using only passive pull-up, avoiding level-shifter ICs or MOSFETs.
LED Status Indication	Multiplexed Display Driver
Use Scenario: Driving common-anode LED arrays in panel-mounted HMI units. IC Role / Device Role / Timing Role: Sink-driver for LED cathodes, with brightness controlled via series resistor selection. Use Value: Delivers consistent 8-mA sink current per segment, enabling uniform LED intensity without current-regulating ICs.	Use Scenario: Row-select logic in 7-segment multiplexed displays with shared digit drivers. IC Role / Device Role / Timing Role: NAND gate generating active-low digit enable pulses synchronized with display controller timing. Use Value: Ensures precise timing alignment and eliminates shoot-through risk during digit transitions due to predictable 15-ns propagation delay.

Industrial Control Bus

Legacy System Interface

Use Scenario: Wired-AND interrupt aggregation across multiple sensor modules in a PLC backplane.

IC Role / Device Role / Timing Role: Open-collector NAND gate acting as active-low interrupt combiner with shared pull-up.

Use Value: Eliminates need for discrete diodes or additional logic; reduces component count and signal propagation skew across parallel interrupt lines.

Use Scenario: Level-shifting enable signals between 5-V TTL logic and 12-V solenoid drivers.

IC Role / Device Role / Timing Role: Current-sinking gate controlling external 12-V pull-up to activate driver ICs.

Use Value: Provides galvanically isolated logic-level translation using only passive pull-up, avoiding level-shifter ICs or MOSFETs.

LED Status Indication

Multiplexed Display Driver

Use Scenario: Driving common-anode LED arrays in panel-mounted HMI units.

IC Role / Device Role / Timing Role: Sink-driver for LED cathodes, with brightness controlled via series resistor selection.

Use Value: Delivers consistent 8-mA sink current per segment, enabling uniform LED intensity without current-regulating ICs.

Use Scenario: Row-select logic in 7-segment multiplexed displays with shared digit drivers.

IC Role / Device Role / Timing Role: NAND gate generating active-low digit enable pulses synchronized with display controller timing.

Use Value: Ensures precise timing alignment and eliminates shoot-through risk during digit transitions due to predictable 15-ns propagation delay.

Equivalent & Alternatives

The following parts are listed as comparable options for similar NAND buffer with open-collector output applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LS38D	Quad 2-input NAND with open-collector outputs; identical V_CC, I_OL, and timing specs but double gate count in same SOIC-14 package.	Supports four independent wired-AND functions instead of two - suitable when board space is constrained and gate density is prioritized.	Select SN74LS38D when consolidating multiple SN74LS26D instances onto one footprint; verify layout accommodates identical pinout for Gates 1–2 only.
SN7406N	Six-channel open-collector inverter; same V_CC range and 40-mA sink capability per output, but logic function is NOT instead of NAND.	Requires external AND logic (e.g., diode-resistor network) to replicate NAND behavior; better suited for simple inversion + high-current sinking.	Choose SN7406N only if application requires pure inversion with higher sink current; redesign required to replace NAND functionality.

Compared with SN74LS26D, SN74LS38D offers higher gate density in identical packaging but no change in per-gate electrical behavior, whereas SN7406N trades NAND logic for greater sink current and channel count - necessitating functional redesign for direct substitution.

Availability

SN74LS26D is available at Aetrix Electronics and suitable for industrial control bus design, legacy system interface development, and LED status indication requiring stable component supply and long-term obsolescence management.

Supply support for SN74LS26D includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company founded in 1930, specializing in analog, embedded processing, and logic solutions for industrial, automotive, and communications markets.

The SN74LS26D belongs to TI's legacy 74LS logic family, engineered for reliability in fixed-function TTL systems where deterministic timing, noise immunity, and open-collector flexibility are essential.

FAQ

What is the maximum sink current supported by each output of the SN74LS26D?

Each output of the SN74LS26D supports a maximum sink current of 8 mA while maintaining V_OL ≤ 0.5 V at V_CC = 5 V. This rating is verified per TI's official datasheet and applies under steady-state DC conditions with proper thermal management. The SN74LS26D uses bipolar transistor output stages optimized for TTL-compatible loading, making it suitable for driving LEDs, relays, or other logic inputs directly without external buffers.

Does the SN74LS26D have internal pull-up resistors on its outputs?

No, the SN74LS26D does not include internal pull-up resistors. Its outputs are strictly open-collector and require external pull-up resistors to establish high logic levels. The value of the pull-up resistor must be selected based on the desired V_OH (minimum 3.4 V), load capacitance, and rise time requirements. TI's datasheet specifies that I_OH = –400 µA at V_OH = 3.4 V, which guides minimum resistance calculation for the SN74LS26D.

Can the SN74LS26D be used in place of the SN74LS00 in wired-AND applications?

Yes, the SN74LS26D can replace the SN74LS00 in wired-AND applications because both contain dual 2-input NAND gates, but only the SN74LS26D has open-collector outputs - a requirement for true wired-AND implementation. The SN74LS00 uses totem-pole outputs and will suffer contention if outputs are tied together. When substituting, ensure external pull-ups are added and verify timing margins remain acceptable, as the SN74LS26D's propagation delay (15 ns) is slightly higher than the SN74LS00's (10 ns).

What is the operating temperature range specified for the SN74LS26D?

The SN74LS26D is rated for an operating temperature range of 0°C to 70°C, consistent with commercial-grade TTL logic. This specification is defined in TI's official packaging documentation and applies to the SOIC (D) package variant. It is distinct from military-grade variants like SN54LS26J (–55°C to 125°C) and should not be deployed in extended-temperature environments without derating or validation.

Is the SN74LS26D RoHS compliant?

Yes, the SN74LS26D is RoHS compliant, as confirmed by TI's packaging addendum: the "RoHS" column for SN74LS26DR and SN74LS26DR.A shows "Yes", and both share the same SOIC (D) package construction and lead finish (NiPdAu). The obsolete SN74LS26D variant also conforms to RoHS requirements per TI's material declaration, though it is no longer in active production.

SN74LS26D Specifications

Product attributes: Attribute value

Manufacturer:: onsemi

Series:: *

Package/Case:: -

Packaging:: Bulk

Product Status:: Active

Logic Type:: -

Number of Circuits:: -

Number of Inputs:: -

Features:: -

Voltage - Supply:: -

Current - Quiescent (Max):: -

Current - Output High, Low:: -

Input Logic Level - Low:: -

Input Logic Level - High:: -

Max Propagation Delay @ V, Max CL:: -

Operating Temperature:: -

Grade:: -

Qualification:: -

Mounting Type:: -

Supplier Device Package:: -

SN74LS26D FAQ

1.How can I place an order for SN74LS26D through Aetrix?

Please submit a Request for Quotation (RFQ) for SN74LS26D on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SN74LS26D reliable?

The price and inventory of SN74LS26D are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS26D is usually 5 days.

3.What payment methods are accepted for SN74LS26D?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LS26D transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SN74LS26D?

SN74LS26D orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SN74LS26D order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SN74LS26D?

For technical support, including SN74LS26D datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS26D requirements.

6.How does Aetrix verify that SN74LS26D is sourced from the original manufacturer or authorized distributors?

All SN74LS26D products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS26D meets industry standards.

7.What is the process for return or replacement of SN74LS26D?

All SN74LS26D units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS26D, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SN74LS26D part is unused and in its original packaging.

Return procedure for SN74LS26D:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-09 Counterfeit Electronic Components: How to Detect, Authenticate, and Test Suspect Parts

Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …

2026-09-08 Obsolete Electronic Components: How to Source and Evaluate Replacements

A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.

2026-09-07 TTL vs CMOS Logic Levels: 74HC and 74HCT Compatibility Explained

TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.

2026-09-04 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-02 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…