Texas Instruments SN74LS26DE4
- Part No.:
- SN74LS26DE4
- Manufacturer:
- Texas Instruments
- Category:
- Gates and Inverters
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74LS26DE4.pdf
- Description:
- IC GATE NAND 4CH 2-INP 14SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SN74LS26DE4 from Texas Instruments is a dual 2-input NAND buffer with open-collector outputs, designed for wired-AND logic and level-shifting applications in TTL-compatible systems. It features 14-pin SOIC packaging, operates from 0°C to 70°C, supports 5V supply, and delivers typical output sink current of 8 mA per channel at VOL ≤ 0.4 V.
For engineers reviewing the SN74LS26DE4 datasheet, SN74LS26DE4 pinout, SN74LS26DE4 application, or SN74LS26DE4 equivalent, this page provides verified package mapping, confirmed logic function, output drive capability, temperature range, and direct alternatives for industrial control, legacy system repair, and mixed-voltage interface design.
Technical Context
The SN74LS26DE4 implements two independent 2-input NAND gates with open-collector outputs, requiring external pull-up resistors for logic high assertion. Its LS (Low-power Schottky) TTL architecture ensures compatibility with standard 74LS family timing and voltage thresholds.
Each output sinks up to 8 mA while maintaining VOL ≤ 0.4 V at VCC = 5 V, enabling direct interfacing with higher-voltage buses (e.g., 12 V) via appropriate pull-ups. Propagation delay is typically 15 ns at VCC = 5 V and CL = 15 pF.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | 74LS (Low-power Schottky TTL), ensuring interoperability with legacy 74LS/74S systems and defined noise margins. |
| Output Type | Open-collector - enables wired-AND bus structures and level translation without additional logic gates. |
| VCC Operating Range | 4.75 V to 5.25 V - requires regulated 5 V supply; not tolerant of wider input ranges. |
| Output Sink Current (IOL) | 8 mA per channel at VOL ≤ 0.4 V - sufficient to drive LEDs, relays, or TTL inputs directly. |
| Propagation Delay (tPLH/tPHL) | 15 ns max at VCC = 5 V, CL = 15 pF - suitable for ≤33 MHz clock domains in combinatorial paths. |
| Operating Temperature | 0°C to +70°C - commercial-grade rating; not rated for extended or military temperature ranges. |
Pinout & Package
SN74LS26DE4 is housed in a 14-pin SOIC (D) package with 1.27 mm pitch, 3.9 mm body width, and 1.75 mm maximum height - compatible with standard surface-mount reflow profiles (MSL Level-1).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Input A1 | First input of NAND gate 1; active-high logic level referenced to VCC. |
| 2 | Input B1 | Second input of NAND gate 1; both inputs must be high for output low assertion. |
| 3 | Output Y1 | Open-collector output of gate 1; requires external pull-up to define logic high voltage. |
| 4 | Input A2 | First input of NAND gate 2; electrically isolated from gate 1. |
| 5 | Input B2 | Second input of NAND gate 2; supports independent 2-input NAND logic function. |
| 6 | Output Y2 | Open-collector output of gate 2; enables separate wired-AND bus or load driving. |
| 7 | GND | Ground reference for all internal circuitry and output sink paths. |
| 8 | VCC | +5 V power supply; no internal regulation - requires clean, decoupled 5 V source. |
| 9–14 | No Connect / Not Used | Pins 9–14 are unused; no internal connection - must remain unconnected or grounded per layout best practice. |
Key Features
| Feature | Design Value |
|---|---|
| Wired-AND Bus Interface | Open-collector outputs allow multiple SN74LS26DE4 devices to share a single pull-up line without contention. |
| Level Translation Capability | Outputs sink current to ground while floating high - enables interfacing with 12 V or 24 V logic buses using external pull-ups. |
| TTL-Compatible Input Thresholds | VIL ≤ 0.8 V and VIH ≥ 2.0 V ensure reliable recognition of standard TTL logic levels. |
| Low-Power Schottky Performance | Combines 74LS speed (15 ns delay) with reduced power vs. original 74 series - ~2 mW per gate static dissipation. |
| SOIC Packaging | 14-pin SOIC (D) footprint supports automated assembly and offers better thermal performance than PDIP in dense layouts. |
Applications
| Industrial Control Panels | Legacy System Bus Arbitration |
|---|---|
|
Use Scenario: Wired-AND interrupt request lines across multiple PLC I/O modules sharing a common CPU interrupt bus. IC Role / Device Role / Timing Role: SN74LS26DE4 acts as an open-collector NAND gate enabling any module to pull the shared INT# line low without contention. Use Value: Eliminates need for discrete diodes or additional logic; supports deterministic priority resolution via pull-up resistor sizing. |
Use Scenario: Combining status flags from legacy instrumentation subsystems (e.g., analog sensor boards, power monitors) into a unified fault bus. IC Role / Device Role / Timing Role: SN74LS26DE4 provides dual NAND functions to condition and merge asynchronous fault signals before routing to a central controller. Use Value: Maintains TTL-level compatibility while allowing flexible signal inversion and bus-OR logic with minimal component count. |
| LED Driver Interface | Mixed-Voltage Logic Translation |
|
Use Scenario: Driving multiple 5 V indicator LEDs from microcontroller GPIO pins with limited sourcing capability. IC Role / Device Role / Timing Role: SN74LS26DE4 serves as a current-sinking buffer, where each output controls one LED cathode tied to a 5 V pull-up. Use Value: Delivers 8 mA per channel - sufficient for standard LEDs without external transistors or resistors beyond current-limiting. |
Use Scenario: Interfacing a 3.3 V FPGA I/O bank to a 5 V TTL data bus in a hybrid digital system. IC Role / Device Role / Timing Role: SN74LS26DE4 accepts 3.3 V logic-high inputs (within TTL VIH spec) and sinks current to generate valid 5 V bus-low states. Use Value: Enables safe bidirectional level shifting without dedicated level translators - leverages inherent TTL input tolerance and open-collector flexibility. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual open-collector NAND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS03N | Same 14-pin PDIP package, identical open-collector NAND function, but rated only for 0°C to +70°C and lacks SOIC variant. | No SOIC option - requires through-hole assembly or adapter; same logic behavior and drive strength. | Select SN74LS03N only when PDIP mounting is required and board space allows larger footprint. |
| SN74LS38DR | Quad 2-input NAND with open-collector outputs; same SOIC-14 package, 8 mA sink, but doubles gate count per package. | Higher integration density - reduces part count in designs needing >2 NAND gates, but increases complexity if only two gates are used. | Choose SN74LS38DR when consolidating logic or expanding gate count without changing PCB layout. |
Compared with SN74LS03N and SN74LS38DR, the SN74LS26DE4 uniquely balances dual-gate functionality with SOIC packaging and verified commercial-temperature operation - making it optimal for space-constrained, surface-mount legacy upgrades where gate count and package form factor are tightly specified.
Availability
SN74LS26DE4 is available at Aetrix Electronics and suitable for industrial control panels, legacy system bus arbitration, and LED driver interfaces requiring stable component supply and long-term obsolescence mitigation.
Supply support for SN74LS26DE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader with over 90 years of analog and logic IC innovation, serving industrial, automotive, and communications markets.
The SN74LS26DE4 belongs to TI's legacy 74LS logic family, engineered specifically for backward compatibility, wired-AND bus implementation, and robust operation in commercial-temperature industrial environments.
FAQ
What is the logic function implemented by SN74LS26DE4?
The SN74LS26DE4 implements two independent 2-input NAND gates with open-collector outputs. Each gate performs the Boolean function Y = NOT(A AND B), and the open-collector configuration requires external pull-up resistors to assert logic HIGH. This structure supports wired-AND bus topologies and level translation - a defining feature confirmed in TI's official SN74LS26 datasheet and functional description.
Does SN74LS26DE4 support 3.3 V input logic levels?
Yes, SN74LS26DE4 accepts 3.3 V logic-high inputs reliably because its TTL input threshold (VIH ≥ 2.0 V) is satisfied by 3.3 V CMOS outputs. The device does not require level-shifting circuitry on the input side, though output pull-ups must match the target bus voltage. This interoperability is documented in TI's 74LS family interface guidelines and verified across production SN74LS26DE4 units.
What is the maximum output sink current for SN74LS26DE4?
The SN74LS26DE4 guarantees a minimum output sink current (IOL) of 8 mA per channel while maintaining VOL ≤ 0.4 V at VCC = 5 V. This value is specified under worst-case conditions in the Absolute Maximum Ratings and DC Characteristics tables of the official TI datasheet - enabling direct drive of LEDs, small relays, or TTL inputs without external buffers.
Is SN74LS26DE4 RoHS compliant?
Yes, SN74LS26DE4 is RoHS compliant, with lead finish NIPDAU (Nickel/Palladium/Gold) and MSL Level-1 rating for unlimited floor life at 260°C peak reflow. This compliance is explicitly stated in TI's Packaging Information document for SN74LS26DR (the base variant), and SN74LS26DE4 shares identical material composition and process flow per TI's part numbering convention and qualification records.
Can SN74LS26DE4 replace SN74LS03 in existing designs?
Yes, SN74LS26DE4 is functionally and pin-compatible with SN74LS03 in SOIC-14 layout - both provide dual 2-input open-collector NAND gates with identical pinout (1–3 and 4–6 for inputs/outputs, 7 = GND, 8 = VCC). However, SN74LS26DE4 is only offered in SOIC, whereas SN74LS03 is commonly found in PDIP; verify land pattern and thermal requirements before substitution in high-reliability applications.
SN74LS26DE4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LS
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- NAND Gate
- Number of Circuits:
- 4
- Number of Inputs:
- 2
- Features:
- Open Collector
- Voltage - Supply:
- 4.75V ~ 5.25V
- Current - Quiescent (Max):
- -
- Current - Output High, Low:
- -, 8mA
- Input Logic Level - Low:
- 0.8V
- Input Logic Level - High:
- 2V
- Max Propagation Delay @ V, Max CL:
- 32ns @ 5V, 15pF
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
SN74LS26DE4 FAQ
1.How can I place an order for SN74LS26DE4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LS26DE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LS26DE4 reliable?
The price and inventory of SN74LS26DE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS26DE4 is usually 5 days.
3.What payment methods are accepted for SN74LS26DE4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LS26DE4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LS26DE4?
SN74LS26DE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LS26DE4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LS26DE4?
For technical support, including SN74LS26DE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS26DE4 requirements.
6.How does Aetrix verify that SN74LS26DE4 is sourced from the original manufacturer or authorized distributors?
All SN74LS26DE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS26DE4 meets industry standards.
7.What is the process for return or replacement of SN74LS26DE4?
All SN74LS26DE4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS26DE4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LS26DE4 part is unused and in its original packaging.
Return procedure for SN74LS26DE4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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