onsemi SN74LS368AD
- Part No.:
- SN74LS368AD
- Manufacturer:
- onsemi
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74LS368AD.pdf
- Description:
- IC BUFFER INVERT 5.25V 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:33,606
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74LS368AD from Texas Instruments is a dual 4-bit inverting line driver with three-state outputs, designed for bus-oriented bidirectional data transmission in TTL-level digital systems. It features 16-pin SOIC packaging, operates from 0°C to 70°C, supports 5 V ±5% supply, and delivers typical propagation delay of 15 ns at VCC = 5 V. It is commonly used in microprocessor address/data bus buffering and memory interface circuits.
For engineers reviewing the SN74LS368AD datasheet, pinout, applications, or equivalent options, this page provides verified functional specifications, package dimensions, real-world use scenarios, and validated alternative parts for industrial control, legacy system repair, and TTL-compatible logic design.
Technical Context
The SN74LS368AD implements two independent 4-bit inverting buffers, each with active-low output-enable (OE) control enabling high-impedance state on all eight outputs. Its bipolar TTL architecture ensures compatibility with standard LS-family logic levels and drive capability (IOH = –15 mA, IOL = 24 mA).
Each 4-bit section processes inputs A1–A4 and B1–B4 separately, producing inverted outputs Y1–Y4 and W1–W4. The device requires no external biasing, operates with single +5 V supply, and meets JEDEC JESD78 Class II latch-up immunity standards.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Family | 74LS (Low-power Schottky TTL), ensuring interoperability with legacy TTL systems and predictable noise margins. |
| Function | Dual 4-bit inverting line driver with 3-state outputs - enables bidirectional bus control via OE pins. |
| Supply Voltage | 4.75 V to 5.25 V - strict 5 V ±5% operation required for guaranteed timing and output drive compliance. |
| Propagation Delay | 15 ns max (A to Y, VCC = 5 V, TA = 25°C) - defines maximum clock-to-data latency in synchronous bus applications. |
| Output Drive | IOL = 24 mA / IOH = –15 mA (VCC = 5 V) - sufficient to drive 10 standard TTL loads per output. |
| Operating Temp | 0°C to 70°C - commercial-grade rating suitable for office, lab, and non-military embedded environments. |
| Package | SOIC-16 (D package), 7.5 mm width, 1.75 mm height - surface-mount compatible with standard reflow profiles (MSL Level-1). |
Pinout & Package
SN74LS368AD uses a 16-pin Small Outline Integrated Circuit (SOIC) package (TI drawing D), 7.5 mm body width, 1.27 mm lead pitch, and 1.75 mm maximum height. Pin 1 is marked by a beveled corner or dot.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 2, 3, 4 9, 10, 11, 12 | Input (A1–A4, B1–B4) | Active-high TTL-compatible inputs; each drives one inverting buffer stage. |
| 5, 13 | Output Enable (OE1, OE2) | Active-low enables corresponding 4-bit output group; high forces outputs into high-impedance state. |
| 6, 7, 8, 14 15, 16, 1, 2 | Output (Y1–Y4, W1–W4) | Inverted buffered outputs; tri-stated when respective OE is high; drive up to 10 TTL loads. |
| 8, 16 | VCC, GND | Power and ground pins - must be decoupled locally with 0.1 µF ceramic capacitor per device. |
Key Features
| Feature | Design Value |
|---|---|
| Three-State Outputs | Enables shared-bus architectures by allowing multiple drivers to coexist without contention when OE is inactive. |
| Inverting Logic Function | Provides signal polarity inversion without external gates - simplifies level-shifting or complement generation in address/data paths. |
| TTL-Compatible Input Thresholds | VIL ≤ 0.8 V, VIH ≥ 2.0 V - ensures reliable interfacing with standard 5 V TTL and LS logic families. |
| High Sink Current Capability | 24 mA per output - supports direct driving of LEDs, relays, or multiple downstream TTL inputs without external buffers. |
| SOIC Packaging | Industry-standard 16-pin SOIC footprint - enables automated assembly, PCB space savings, and thermal performance suitable for dense logic layouts. |
Applications
| Microprocessor Bus Buffering | Legacy Industrial Controller I/O Expansion |
|---|---|
Use Scenario: Isolating and driving address/data lines between an 8080/8085 CPU and peripheral ICs or memory chips on a backplane. IC Role / Device Role / Timing Role: Acts as a direction-controlled, inverting bus transceiver - OE signals synchronize with CPU control strobes to manage read/write cycles. Use Value: Prevents bus contention during multi-master arbitration and extends fan-out beyond native CPU drive limits. | Use Scenario: Adding isolated, TTL-compatible input/output ports to aging PLC modules where replacement controllers are obsolete. IC Role / Device Role / Timing Role: Provides galvanically isolated (when paired with optocouplers) input conditioning and output sinking for 24 V DC field sensors and actuators. Use Value: Enables drop-in repair of discontinued I/O cards using existing PCB footprints and firmware logic. |
| Test Equipment Signal Conditioning | EPROM Programming Interface |
Use Scenario: Driving calibrated logic-level test patterns into DUTs while maintaining signal integrity across long probe cables. IC Role / Device Role / Timing Role: Functions as a low-skew, inverting repeater - compensates for cable capacitance-induced rise/fall time degradation. Use Value: Ensures clean edge transitions (<15 ns delay) and stable logic thresholds at the DUT input, improving test repeatability. | Use Scenario: Interfacing a modern PC-based EPROM programmer to vintage 27xx-series UV-erasable memory chips requiring inverted address/data latching. IC Role / Device Role / Timing Role: Inverts and buffers parallel address bits (A0–A15) and data bits (D0–D7) before delivery to EPROM pins. Use Value: Matches EPROM's active-low write enable and inverted address decode requirements without additional inverters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar inverting 3-state line driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS240N | Octal inverting 3-state buffer (8-channel vs. dual 4-channel); identical VCC, timing, and drive specs. | Better suited for single-bus 8-bit systems; requires different PCB layout due to PDIP-20 package and pinout. | Select when consolidating multiple SN74LS368AD functions onto one IC to reduce component count and board area. |
| SN74LS368AN | Identical logic function and electrical specs; differs only in PDIP-16 through-hole packaging (vs. SOIC-16). | Designed for prototyping, hand-soldered repairs, or legacy through-hole assemblies; same pinout but larger footprint. | Choose for breadboard development, field service replacements, or mixed-technology boards where SOIC reflow is unavailable. |
Compared with SN74LS240N and SN74LS368AN, the SN74LS368AD offers optimized surface-mount integration for automated production while retaining full functional equivalence - making it ideal for new designs targeting cost-effective, high-density TTL bus interfaces.
Availability
SN74LS368AD is available at Aetrix Electronics and suitable for industrial control systems, legacy equipment refurbishment, and educational electronics labs requiring stable component supply and long-term obsolescence management.
Supply support for SN74LS368AD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions with over 90 years of innovation in industrial, automotive, and communications markets.
The SN74LS368AD belongs to TI's legacy 74LS logic family, engineered specifically for robust, low-power TTL interoperability in mission-critical industrial and instrumentation applications where reliability and backward compatibility are essential.
FAQ
What is the primary logic function of the SN74LS368AD?
The SN74LS368AD is a dual 4-bit inverting line driver with three-state outputs. Each of its two sections accepts four active-high TTL inputs (A1–A4 or B1–B4), inverts them, and drives corresponding outputs (Y1–Y4 or W1–W4) - all under independent active-low output-enable control. This makes SN74LS368AD ideal for bidirectional bus management in legacy digital systems.
Can SN74LS368AD be used as a non-inverting buffer?
No - the SN74LS368AD performs only inverting logic; there is no internal configuration or external wiring that converts it to a true non-inverting buffer. To achieve non-inverting behavior, a second SN74LS368AD stage or discrete inverters would be required, increasing propagation delay and component count. For non-inverting 3-state buffering, consider SN74LS241 or SN74LS367 instead of SN74LS368AD.
What are the absolute maximum ratings for SN74LS368AD?
The absolute maximum ratings for SN74LS368AD are: supply voltage VCC = 7.0 V, input voltage = –0.5 V to VCC + 0.5 V, output short-circuit duration = continuous (with IOL limited to 24 mA), and operating ambient temperature = 0°C to 70°C. Exceeding any of these values may cause permanent damage. These limits apply strictly to SN74LS368AD and are not derated for extended life.
Is SN74LS368AD RoHS compliant?
Yes - SN74LS368AD is RoHS compliant, with lead finish NIPDAU (Nickel/Palladium/Gold) and MSL Level-1 rating for unlimited floor life at ≤30°C/85% RH. This compliance applies specifically to the SOIC (D) package variant and is verified per TI's official packaging documentation dated 2026.
How does SN74LS368AD differ from SN74LS367AD?
SN74LS368AD provides inverting outputs, while SN74LS367AD provides non-inverting outputs - otherwise, both share identical pinout, timing, drive strength, package, and operating conditions. This functional difference dictates their use: SN74LS368AD suits applications requiring signal inversion (e.g., address complementing), whereas SN74LS367AD is selected when polarity preservation is critical. Both remain pin-compatible alternatives within the same design.
SN74LS368AD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Series:
- 74LS
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Logic Type:
- Buffer, Inverting
- Number of Elements:
- 2
- Number of Bits per Element:
- 2, 4 (Hex)
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 2.6mA, 24mA
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SN74LS368AD FAQ
1.How can I place an order for SN74LS368AD through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LS368AD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LS368AD reliable?
The price and inventory of SN74LS368AD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS368AD is usually 5 days.
3.What payment methods are accepted for SN74LS368AD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LS368AD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LS368AD?
SN74LS368AD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LS368AD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LS368AD?
For technical support, including SN74LS368AD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS368AD requirements.
6.How does Aetrix verify that SN74LS368AD is sourced from the original manufacturer or authorized distributors?
All SN74LS368AD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS368AD meets industry standards.
7.What is the process for return or replacement of SN74LS368AD?
All SN74LS368AD units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS368AD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LS368AD part is unused and in its original packaging.
Return procedure for SN74LS368AD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74LS368AD Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

