Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Buffers, Drivers, Receivers, Transceivers

Texas Instruments SN74LS467N

Name: SN74LS467N
Brand: Texas Instruments
SKU: SN74LS467N
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: SN74LS467N

Manufacturer:: Texas Instruments

Category:: Buffers, Drivers, Receivers, Transceivers

Package:: -

Datasheet:: SN74LS467N.pdf

Description:: BUS DRIVER, LS SERIES

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:4,309

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

SN74LS467N from Texas Instruments is a quad 3-state line driver with open-collector outputs, designed for bus-oriented bidirectional data transmission in TTL systems. It features 15 mA sink current per output, 2.4 V minimum high-level output voltage, and operates over 0°C to 70°C ambient temperature - used in industrial control backplanes and legacy instrumentation interfaces.

For engineers reviewing the SN74LS467N datasheet, SN74LS467N pinout, SN74LS467N application, or SN74LS467N equivalent, key selection factors include output drive strength, TTL-compatible input thresholds, open-collector interface flexibility, and 16-pin DIP package compatibility with through-hole PCB layouts.

Technical Context

The SN74LS467N integrates four independent line drivers, each with active-low 3-state enable (G̅) controlling output high-impedance state. Its open-collector outputs allow wired-AND logic and level translation when pulled up externally.

All inputs are TTL-compatible (0.8 V max low, 2.0 V min high), and outputs meet standard LS TTL sink specifications: 15 mA guaranteed at V_OL ≤ 0.5 V with V_CC = 5 V. Propagation delay is 15 ns typical from G̅ to output transition.

Key Specifications

Parameter	Value and Actual Design Meaning
Logic Family	74LS TTL - ensures interoperability with legacy LS/TTL logic families and compatible timing margins
Output Type	Open-collector - enables wired-AND bus structures and external pull-up voltage selection (e.g., 5 V or 3.3 V)
Sink Current	15 mA per output - supports driving multiple TTL inputs or small LEDs without external buffers
Propagation Delay	15 ns typical (G̅ to output) - suitable for sub-33 MHz bus clocking in synchronous backplane designs
Operating Temperature	0°C to +70°C - validated for commercial-grade industrial control and test equipment environments
Supply Voltage	4.75 V to 5.25 V - tight regulation required to maintain V_OH ≥ 2.4 V and V_OL ≤ 0.5 V

Pinout & Package

SN74LS467N uses a 16-pin plastic dual in-line package (PDIP) with 0.3-inch body width and standard through-hole footprint.

Pin/Terminal	Circuit Role	Design Meaning
1, 4, 10, 13	Data Input (A1–A4)	TTL-compatible inputs accepting 0–5 V logic levels; drive internal driver stages
2, 5, 11, 14	Output (Y1–Y4)	Open-collector outputs requiring external pull-up; sink up to 15 mA each
3, 6, 12, 15	Enable Input (G̅1–G̅4)	Active-low 3-state controls; logic low enables output, high places output in high-Z
7	GND	Ground reference for all inputs, outputs, and internal circuitry
16	V_CC	+5 V supply pin; must be decoupled locally to suppress switching noise

Key Features

Feature	Design Value
Quad independent drivers	Four isolated channels allow mixed-direction bus segments without cross-talk or contention
Individual 3-state control	Per-channel G̅ enables selective bus arbitration without global enable delays
Open-collector outputs	Supports multi-drop wired-AND configurations and mixed-voltage interface via external pull-up
TTL input compatibility	Accepts standard TTL logic thresholds (V_IL ≤ 0.8 V, V_IH ≥ 2.0 V), eliminating level-shifter need in LS systems

Applications

Industrial Backplane Bus	Legacy Test Equipment Interface
Use Scenario: Bidirectional data routing across modular rack-mounted instruments using shared parallel bus lines. IC Role / Device Role / Timing Role: Line driver providing controlled output enable per slot to prevent bus contention during hot-swap or configuration changes. Use Value: Individual G̅ pins allow per-module bus arbitration; open-collector outputs tolerate varying termination voltages across instrument modules.	Use Scenario: Interfacing microcontroller-based controllers to vintage GPIB-compatible peripherals with TTL-level handshaking. IC Role / Device Role / Timing Role: Level-translating driver for handshake signals (DAV, NRFD, NDAC) requiring wired-AND capability and 15 mA sink strength. Use Value: Matches original GPIB controller timing specs; open-collector outputs simplify integration with legacy peripheral pull-up schemes.
Repair Replacement for 74LS Systems	Discrete Logic Bus Extender
Use Scenario: Field replacement of failed SN74LS467N units in deployed military COTS test systems where obsolescence mitigation is critical. IC Role / Device Role / Timing Role: Drop-in functional and pinout-compatible replacement maintaining identical timing, drive, and voltage behavior. Use Value: Rochester-manufactured version meets original TI 74LS467 specifications including propagation delay, V_OL, and input thresholds.	Use Scenario: Extending TTL bus length beyond standard fan-out limits by buffering signals between chassis sections. IC Role / Device Role / Timing Role: Signal repeater with 3-state isolation to break ground loops and reduce capacitive loading on long traces. Use Value: 15 mA sink current sustains signal integrity over 30 cm ribbon cable runs; individual enables support staggered activation.

Industrial Backplane Bus

Legacy Test Equipment Interface

Use Scenario: Bidirectional data routing across modular rack-mounted instruments using shared parallel bus lines.

IC Role / Device Role / Timing Role: Line driver providing controlled output enable per slot to prevent bus contention during hot-swap or configuration changes.

Use Value: Individual G̅ pins allow per-module bus arbitration; open-collector outputs tolerate varying termination voltages across instrument modules.

Use Scenario: Interfacing microcontroller-based controllers to vintage GPIB-compatible peripherals with TTL-level handshaking.

IC Role / Device Role / Timing Role: Level-translating driver for handshake signals (DAV, NRFD, NDAC) requiring wired-AND capability and 15 mA sink strength.

Use Value: Matches original GPIB controller timing specs; open-collector outputs simplify integration with legacy peripheral pull-up schemes.

Repair Replacement for 74LS Systems

Discrete Logic Bus Extender

Use Scenario: Field replacement of failed SN74LS467N units in deployed military COTS test systems where obsolescence mitigation is critical.

IC Role / Device Role / Timing Role: Drop-in functional and pinout-compatible replacement maintaining identical timing, drive, and voltage behavior.

Use Value: Rochester-manufactured version meets original TI 74LS467 specifications including propagation delay, V_OL, and input thresholds.

Use Scenario: Extending TTL bus length beyond standard fan-out limits by buffering signals between chassis sections.

IC Role / Device Role / Timing Role: Signal repeater with 3-state isolation to break ground loops and reduce capacitive loading on long traces.

Use Value: 15 mA sink current sustains signal integrity over 30 cm ribbon cable runs; individual enables support staggered activation.

Equivalent & Alternatives

The following parts are listed as comparable options for similar quad open-collector line driver applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LS244N	Push-pull (not open-collector) outputs; no wired-AND capability; 24 mA sink/source	Requires redesign for bus-OR logic; unsuitable where external pull-up voltage differs from V_CC	Select only if wired-AND is unnecessary and higher drive strength is needed
SN74LS367N	Hex non-inverting buffer with common 3-state enable (not per-channel); same open-collector outputs	Lacks per-output enable granularity; less flexible for multi-segment bus arbitration	Prefer when channel count >4 is needed and per-channel control is not required

Compared with SN74LS244N and SN74LS367N, the SN74LS467N uniquely provides both per-channel 3-state control and open-collector outputs - essential for dynamic bus topology management in legacy TTL systems where signal polarity, voltage translation, and contention avoidance are design-critical.

Availability

SN74LS467N is available at Aetrix Electronics and suitable for industrial backplane buses, legacy test equipment interfaces, and repair-replacement programs requiring stable component supply and long-term obsolescence mitigation.

Supply support for SN74LS467N includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a U.S.-based semiconductor company specializing in analog and logic ICs, with decades of leadership in TTL and bipolar logic families.

The SN74LS467N belongs to the 74LS logic series, engineered for high-speed, low-power TTL-compatible digital interfacing in industrial, instrumentation, and computing systems of the 1970s–1990s era.

FAQ

What is the maximum sink current per output of the SN74LS467N?

The SN74LS467N guarantees 15 mA sink current per output at V_OL ≤ 0.5 V with V_CC = 5 V. This rating is validated across the full 0°C to +70°C operating range and allows direct driving of multiple TTL inputs or indicator LEDs without external amplification. The SN74LS467N maintains this performance under worst-case process, voltage, and temperature conditions per original TI specifications.

Does the SN74LS467N support wired-AND bus configurations?

Yes, the SN74LS467N supports wired-AND configurations via its open-collector outputs. Each output requires an external pull-up resistor, enabling multiple devices to share a common bus line without contention. This functionality is intrinsic to the SN74LS467N's architecture and is explicitly specified in the original TI datasheet for bus arbitration and level-flexible signaling.

Is the SN74LS467N pin-compatible with other 74LS-series drivers like SN74LS244N?

No, the SN74LS467N is not pin-compatible with SN74LS244N. While both are 16-pin DIP quad drivers, the SN74LS467N has individual active-low enables (pins 3,6,12,15) and open-collector outputs (pins 2,5,11,14), whereas SN74LS244N uses two shared enables and push-pull outputs. Pin mapping and electrical behavior differ fundamentally - the SN74LS467N requires distinct PCB layout and system-level logic design.

What is the propagation delay specification for the SN74LS467N?

The SN74LS467N has a typical propagation delay of 15 ns from enable (G̅) input to output transition, measured under standard TTL load conditions (V_CC = 5 V, T_A = 25°C, R_L = 500 Ω to V_CC). This value is consistent across the Rochester-manufactured SN74LS467N and matches the original TI datasheet timing parameters for reliable integration into sub-33 MHz synchronous bus designs.

Can the SN74LS467N operate with a 3.3 V pull-up while powered from 5 V?

Yes, the SN74LS467N can operate with a 3.3 V external pull-up on its open-collector outputs while V_CC remains at 5 V. Because outputs are open-collector, the pull-up voltage is independent of V_CC; the SN74LS467N only sinks current and does not source it. This feature enables safe interfacing between 5 V logic domains and 3.3 V peripherals - a key capability confirmed in the SN74LS467N datasheet and widely applied in mixed-voltage legacy upgrades.

SN74LS467N Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: *

Package/Case:: -

Packaging:: Bulk

Product Status:: Active

Logic Type:: -

Number of Elements:: -

Number of Bits per Element:: -

Input Type:: -

Output Type:: -

Current - Output High, Low:: -

Voltage - Supply:: -

Operating Temperature:: -

Grade:: -

Qualification:: -

Mounting Type:: -

Supplier Device Package:: -

SN74LS467N FAQ

1.How can I place an order for SN74LS467N through Aetrix?

Please submit a Request for Quotation (RFQ) for SN74LS467N on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SN74LS467N reliable?

The price and inventory of SN74LS467N are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS467N is usually 5 days.

3.What payment methods are accepted for SN74LS467N?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LS467N transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SN74LS467N?

SN74LS467N orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SN74LS467N order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SN74LS467N?

For technical support, including SN74LS467N datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS467N requirements.

6.How does Aetrix verify that SN74LS467N is sourced from the original manufacturer or authorized distributors?

All SN74LS467N products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS467N meets industry standards.

7.What is the process for return or replacement of SN74LS467N?

All SN74LS467N units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS467N, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SN74LS467N part is unused and in its original packaging.

Return procedure for SN74LS467N:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-09-03 Logic Level Shifter: How to Connect 3.3V and 5V Logic Safely

A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.

2026-09-03 74HC595 vs TPIC6B595: Output Drive, Pinout, Current, and Load Selection

The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…

2026-09-01 74HC595 Pinout, Timing, Output Current, and Applications

The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…

2026-09-01 Latch vs Flip-Flop: Timing, Differences and Design Choices

A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…

2026-08-30 D Latch Circuit: Truth Table, Timing, ICs and Applications

A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

2026-08-28 SR Latch Explained: NOR and NAND Circuits, Truth Tables, and Applications

An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…

2026-08-27 Latch Circuit: SR and D Latches, Truth Tables, Timing, and Applications

Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…