Texas Instruments SN74LS670DR
- Part No.:
- SN74LS670DR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74LS670DR.pdf
- Description:
- IC REGISTER FILE 1 X 1:1 16SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,075
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Product details
Overview
SN74LS670DR from Texas Instruments is a 4×4 register file IC with three-state outputs, used as a compact, synchronous RAM-like storage element in TTL-based control logic and microprocessor support circuits. It provides 16 bits of storage (four 4-bit words), dual address decoding (A0–A1), independent read/write control (R/W), and output enable (G) - enabling selective data routing in bus-oriented systems such as early minicomputer I/O controllers and industrial sequencers.
For engineers reviewing the SN74LS670DR datasheet, SN74LS670DR pinout, SN74LS670DR application, or SN74LS670DR equivalent, key selection criteria include its 16-pin SOIC package, TTL-compatible input thresholds, 3-state output drive capability, and compatibility with LS-family timing budgets in legacy digital systems requiring small-scale on-chip register storage without external memory interface overhead.
Technical Context
The SN74LS670DR implements a fully decoded 4-word × 4-bit static register array using bipolar TTL circuitry, with separate address inputs (A0, A1), write-enable (W), read-enable (R/W), and output-enable (G) controls. All operations are edge-triggered synchronous to the W signal, and data retention is static - no clock required for hold.
Its three-state outputs allow direct connection to shared data buses; output disable is asserted when G = HIGH, independent of R/W state. The device operates strictly within the 0°C to +70°C commercial temperature range and requires a single +5 V supply with typical ICC of 60 mA at 5 V - consistent with standard LS-TTL power profiles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Storage capacity | 4 words × 4 bits = 16-bit register file, usable as scratchpad or temporary storage in microcode engines |
| Supply voltage | +4.75 V to +5.25 V - compatible with standard TTL logic rails and noise margins |
| Propagation delay (max) | 40 ns (address-to-output, G-enabled) - fits within 25 MHz LS-TTL system timing budgets |
| Output drive | Three-state TTL outputs with IOH = –0.4 mA / IOL = 8 mA - drives standard LS loads directly |
| Input compatibility | TTL-level inputs (VIH ≥ 2.0 V, VIL ≤ 0.8 V) - interoperable with 74LS, 74S, and 74F families |
| Operating temperature | 0°C to +70°C - commercial-grade rating suitable for office, lab, and non-military embedded systems |
Pinout & Package
SN74LS670DR is supplied in a 16-pin SOIC (D) package, 7.5 mm wide, with 1.27 mm pitch, RoHS-compliant NiPdAu lead finish, and moisture sensitivity level (MSL) 1 - suitable for standard reflow assembly without dry-pack requirements.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A0) | Address bit 0 | Selects word 0/1 or 2/3 depending on A1; LSB of 2-bit word address |
| 2 (A1) | Address bit 1 | Selects upper or lower word pair; MSB of 2-bit word address |
| 3 (D0) | Data input 0 | LSB of 4-bit parallel input bus during write cycle |
| 4 (D1) | Data input 1 | Second bit of 4-bit parallel input bus |
| 5 (D2) | Data input 2 | Third bit of 4-bit parallel input bus |
| 6 (D3) | Data input 3 | MSB of 4-bit parallel input bus during write cycle |
| 7 (G) | Output enable | Active-LOW control: G = LOW enables outputs; G = HIGH forces high-impedance state |
| 8 (GND) | Ground | Reference return for all signals and power |
| 9 (Q0) | Data output 0 | LSB of selected 4-bit word, tri-stated when G = HIGH |
| 10 (Q1) | Data output 1 | Second bit of selected 4-bit word, tri-stated when G = HIGH |
| 11 (Q2) | Data output 2 | Third bit of selected 4-bit word, tri-stated when G = HIGH |
| 12 (Q3) | Data output 3 | MSB of selected 4-bit word, tri-stated when G = HIGH |
| 13 (W) | Write enable | Active-HIGH pulse latches D0–D3 into addressed register location |
| 14 (R/W) | Read/write control | HIGH = read mode (outputs enabled per G); LOW = write mode (inputs sampled on W rising edge) |
| 15 (VCC) | Power supply | +5 V DC supply pin; decoupling recommended within 1 cm of pin |
| 16 (NC) | No connect | Internal die pad not bonded; must remain unconnected on PCB |
Key Features
| Feature | Design Value |
|---|---|
| Four independently addressable 4-bit registers | Enables compact state storage in finite-state machines without external RAM or latch arrays |
| Three-state bidirectional outputs | Allows direct connection to multiplexed data buses without external transceivers or isolation logic |
| Separate read/write control (R/W) | Eliminates need for external direction logic when interfacing with bidirectional microprocessor data buses |
| Static storage with no clock required | Reduces timing complexity versus clocked RAM; data retained as long as power and address stable |
| Direct TTL input/output compatibility | Integrates seamlessly into existing 74LS-based designs without level-shifting or buffering |
Applications
| Microprocessor Support Logic | Industrial Sequence Controllers |
|---|---|
|
Use Scenario: Interfacing an 8-bit CPU (e.g., Z80 or 8085) to local register-based peripherals where full RAM is overkill. IC Role / Device Role / Timing Role: Acts as a 16-bit scratchpad register bank, mapped into I/O space via address decoding, providing fast-access temporary storage for ALU operands or status flags. Use Value: Reduces bus loading and eliminates wait states associated with external RAM access - improves instruction throughput in tight-loop control code. |
Use Scenario: Implementing a 4-step machine-state register in PLC-style ladder logic hardware. IC Role / Device Role / Timing Role: Stores current step ID, sensor mask, timer preset, and output enable pattern - updated synchronously on step-transition pulses. Use Value: Enables deterministic, glitch-free state transitions with zero software overhead - critical for safety-critical sequencing in relay replacement modules. |
| Legacy Test Equipment Data Buffers | Digital Signal Path Configuration Registers |
|
Use Scenario: Capturing and holding 4-byte measurement results (e.g., ADC samples) in benchtop multimeters or waveform analyzers built with discrete TTL logic. IC Role / Device Role / Timing Role: Serves as a capture latch between analog front-end and display driver logic, triggered by end-of-conversion strobe. Use Value: Provides stable, noise-immune data hold during multiplexed segment decoding - prevents display flicker or digit corruption. |
Use Scenario: Storing configuration bits for analog switch matrices or filter coefficient selectors in programmable signal generators. IC Role / Device Role / Timing Role: Holds 4-bit channel routing codes or gain settings, updated only during setup - no dynamic refresh needed. Use Value: Eliminates EEPROM wear-out and startup delays; guarantees immediate, repeatable configuration on power-up. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar register file applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LS373N | Octal transparent latch (8-bit), no internal addressing or multi-word storage | Requires external address decoding and multiple devices to match 4×4 functionality | Choose when needing simple latch behavior with higher pin efficiency per bit, not word-select capability |
| SN74LS273N | 8-bit D-type flip-flop with common clock and clear; no address decoding or 3-state outputs | Supports edge-triggered capture but lacks word selection and bus-driving flexibility | Prefer for clock-synchronized register banks where address multiplexing is handled externally |
Compared with SN74LS373N and SN74LS273N, the SN74LS670DR uniquely integrates address decoding, multi-word storage, and 3-state outputs in a single 16-pin package - reducing component count and board area in systems requiring compact, selectable register sets without microcontroller intervention.
Availability
SN74LS670DR is available at Aetrix Electronics and suitable for legacy system repair, industrial controller refurbishment, and educational TTL logic labs requiring stable component supply and long-term obsolescence mitigation.
Supply support for SN74LS670DR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a U.S.-based semiconductor company founded in 1930, specializing in analog, embedded processing, and logic technologies with broad industrial and automotive reach.
The SN74LS670DR belongs to TI's classic 74LS logic family, designed specifically for high-speed, low-power TTL-compatible digital systems in the 1970s–1980s - emphasizing reliability, interoperability, and ease of integration in discrete control architectures.
FAQ
What is the function of the R/W pin on the SN74LS670DR?
The R/W (Read/Write) pin on the SN74LS670DR determines operational mode: when HIGH, the device is in read mode and outputs reflect the contents of the addressed register (subject to G); when LOW, it enters write mode and samples D0–D3 on the rising edge of the W signal. This separation allows clean bidirectional bus handling without external direction control logic.
Does the SN74LS670DR require a clock signal to retain data?
No, the SN74LS670DR uses static TTL latches and does not require a clock signal to retain stored data. Data remains valid as long as power is applied and address inputs are stable. Only the W signal edge is needed to initiate a write - no continuous clocking or refresh cycles are involved.
Can the SN74LS670DR be used with modern 3.3 V microcontrollers?
The SN74LS670DR is a 5 V-only TTL device with input thresholds referenced to 5 V (VIH ≥ 2.0 V, VIL ≤ 0.8 V). While 3.3 V logic may meet VIH margin under ideal conditions, reliable interfacing requires level translation - either a 3.3 V-to-5 V buffer on control lines or use of open-drain translators to avoid potential input undervoltage and increased static power draw.
What does the NC pin (Pin 16) on the SN74LS670DR signify?
Pin 16 of the SN74LS670DR is marked NC (No Connect) - it corresponds to an unbonded die pad with no internal connection. It must remain unconnected on the PCB; routing traces or applying solder to this pin risks internal shorting or compromised thermal performance. TI documentation confirms this pin has no electrical function.
How many unique addresses does the SN74LS670DR support?
The SN74LS670DR supports four unique addresses via its two address inputs (A0 and A1), allowing selection among Word 0 (A1A0 = 00), Word 1 (01), Word 2 (10), and Word 3 (11). Each word holds 4 bits, resulting in a total 16-bit register file organized as 4 × 4 - no additional addressing or expansion capability is provided internally.
SN74LS670DR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LS
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Register File
- Circuit:
- 1 x 1:1
- Independent Circuits:
- 4
- Current - Output High, Low:
- 2.6mA, 8mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 4.75V ~ 5.25V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SN74LS670DR FAQ
1.How can I place an order for SN74LS670DR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LS670DR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LS670DR reliable?
The price and inventory of SN74LS670DR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LS670DR is usually 5 days.
3.What payment methods are accepted for SN74LS670DR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LS670DR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LS670DR?
SN74LS670DR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LS670DR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LS670DR?
For technical support, including SN74LS670DR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LS670DR requirements.
6.How does Aetrix verify that SN74LS670DR is sourced from the original manufacturer or authorized distributors?
All SN74LS670DR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LS670DR meets industry standards.
7.What is the process for return or replacement of SN74LS670DR?
All SN74LS670DR units undergo pre-shipment inspection (PSI). If there is an issue with SN74LS670DR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LS670DR part is unused and in its original packaging.
Return procedure for SN74LS670DR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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