Texas Instruments SN74LV123ADG4

Overview

SN74LV123ADG4 from Texas Instruments is a dual retriggerable monostable multivibrator IC with Schmitt-trigger inputs, designed for 2-V to 5.5-V operation. It delivers programmable output pulse widths (e.g., 90–110 µs at C_ext = 0.01 µF, R_ext = 10 kΩ), sub-11 ns propagation delay at 5 V, and supports mixed-mode voltage interfacing across all I/O pins. It is used in digital video camera timing control, embedded PC reset sequencing, and interrupt pulse shaping for microcontrollers.

For engineers reviewing the SN74LV123ADG4 datasheet, SN74LV123ADG4 pinout, SN74LV123ADG4 application, or SN74LV123ADG4 equivalent, key selection considerations include its retriggerable pulse generation capability, I_off-enabled partial-power-down support, Schmitt-trigger noise immunity on A/B/CLR inputs, and compatibility with legacy 'AHC123A/'AHCT123A pinouts.

Technical Context

The SN74LV123ADG4 integrates two independent monostable multivibrators, each triggered by edge-sensitive logic combinations of A (falling-edge active when B = L), B (rising-edge active when A = H), or CLR (active-high override). Pulse width is externally set via R_ext/C_ext network connected to dedicated pins (e.g., 1Rext/Cext, 1Cext), with K-factor-based timing formula t_w = K × R_ext × C_ext (K ≈ 1.0 for C_ext ≥ 1000 pF).

It features glitch-free power-up outputs (Q low, Q high), I_off circuitry enabling safe back-drive prevention during partial power-down, and robust ESD protection (±2000-V HBM, ±1000-V CDM). All inputs tolerate slow transitions due to integrated Schmitt triggers with hysteresis, eliminating need for external debouncing in noisy environments.

Key Specifications

Pinout & Package

SN74LV123ADG4 is packaged in a 16-pin SOIC (D) package with nominal body size 6.00 mm × 9.90 mm, lead pitch 1.27 mm, and surface-mount gull-wing leads.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar monostable multivibrator applications.

Compared with SN74LVC123A and 74AHC123, SN74LV123ADG4 uniquely combines 2-V operation, I_off protection, and full Schmitt-trigger coverage-including CLR-making it optimal for robust, multi-rail industrial timing where reliability trumps marginal cost savings.

Availability

SN74LV123ADG4 is available at Aetrix Electronics and suitable for digital video camera timing control, embedded PC reset sequencing, and microcontroller interrupt pulse shaping requiring stable component supply across automotive-qualified temperature ranges (–40°C to 125°C).

Supply support for SN74LV123ADG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 50 years of innovation in high-reliability timing and interface ICs.

The SN74LV123ADG4 belongs to TI's LV logic family, engineered for low-voltage, high-noise-immunity applications in consumer electronics, industrial controls, and communications infrastructure where precise, retriggerable pulse generation is essential.

FAQ

What is the minimum supply voltage required for reliable operation of the SN74LV123ADG4?

The SN74LV123ADG4 operates reliably from 2 V to 5.5 V. At V_CC = 2 V, guaranteed parameters include V_IH = 1.5 V (min), V_IL = 0.5 V (max), and I_OH/I_OL = ±50 µA. This 2-V minimum enables direct integration with modern low-power microcontrollers and battery-backed subsystems without level translation.

How does the retriggerable function work in the SN74LV123ADG4, and what is the minimum retrigger interval?

The SN74LV123ADG4 allows extending an active output pulse by applying a new trigger (A or B edge) before the original pulse ends. Minimum retrigger time t_MIR ≈ 0.30 × t_w; for a 100-µs pulse, retriggering must occur ≥30 µs after the prior trigger. This enables adaptive pulse-width control in real-time systems like servo position correction loops.

Can the SN74LV123ADG4 be used with different external capacitor values, and how does K-factor affect timing accuracy?

Yes-t_w = K × R_ext × C_ext, where K = 1.0 for C_ext ≥ 1000 pF. For smaller capacitors (e.g., 100 pF), K rises to ~1.15 (per TI Figure 3), introducing minor nonlinearity. SN74LV123ADG4 maintains ±1% pulse-matching between channels regardless of C_ext value, ensuring consistent dual-channel timing.

Does the SN74LV123ADG4 support partial power-down, and how is I_off implemented?

Yes-the SN74LV123ADG4 includes I_off circuitry that disables all outputs when V_CC = 0 V, limiting leakage to 5 µA (max). This prevents back-driving of powered-down sections in multi-rail systems, such as when an FPGA I/O bank is unpowered but connected to SN74LV123ADG4 outputs.

What are the absolute maximum ratings for the SN74LV123ADG4, and why is V_CC limited to 7 V?

Absolute maximum V_CC is 7 V, exceeding recommended 5.5 V. This 1.5-V margin accommodates transient overshoot during hot-swap or inductive load switching. Exceeding 7 V risks permanent damage to internal oxide layers; TI specifies this limit per JESD78 Class II reliability testing, not theoretical breakdown.