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Texas Instruments SN74LV123ADRE4
- Part No.:
- SN74LV123ADRE4
- Manufacturer:
- Texas Instruments
- Category:
- Multivibrators
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74LV123ADRE4.pdf
- Description:
- IC MULTIVIBRATOR 13NS 16SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:1,419
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Product details
Overview
SN74LV123ADRE4 from Texas Instruments is a dual retriggerable monostable multivibrator IC with Schmitt-trigger inputs, operating from 2 V to 5.5 V supply, delivering ≤11 ns propagation delay at 5 V, ±1% pulse-duration matching between channels, and programmable output pulse width up to 100% duty cycle via external R/C network - used for edge-sensitive timing control in digital interrupt conditioning and signal debouncing.
For engineers reviewing the SN74LV123ADRE4 datasheet, SN74LV123ADRE4 pinout, SN74LV123ADRE4 application, or SN74LV123ADRE4 equivalent, key selection considerations include its dual-channel retriggerability, Ioff partial-power-down support, mixed-mode voltage tolerance on all I/Os, and guaranteed glitch-free power-up reset - critical for reliable timing in embedded microcontroller interfaces and industrial control logic.
Technical Context
The SN74LV123ADRE4 implements two independent monostable multivibrators, each triggered by rising- or falling-edge logic on A/B inputs with Schmitt-trigger hysteresis (≥0.3×VCC), enabling robust operation with slow/noisy signals. Pulse duration is set externally via Rext/Cext connected to dedicated pins per channel, with K-factor = 1.0 for Cext ≥ 1000 pF.
Each channel supports three trigger modes: (1) 1A↓ with 1B = L, (2) 1B↑ with 1A = H, or (3) 1CLR↑ while 1A = L and 1B = H. The active-low clear input overrides ongoing pulses, and Ioff circuitry disables outputs during power-down to prevent backflow current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2 V to 5.5 V - enables direct interfacing with 2.5 V, 3.3 V, and 5 V logic domains without level shifters |
| Max tpd | 11 ns at VCC = 5 V - ensures sub-100 MHz timing resolution for high-speed digital event capture |
| Pulse Duration Range | 90 ns to >1 ms - programmable via Rext (1 kΩ–100 kΩ) and Cext (28 pF–0.1 µF), supporting both short glitches and long hold times |
| Δtw Matching | ±1% - guarantees tightly synchronized pulse widths across both channels for differential timing applications |
| Ioff | ≤5 µA at 0 V - allows safe hot-insertion and partial-power-down in multi-rail systems without latch-up risk |
| VIH/VIL | VIH = 0.7×VCC, VIL = 0.3×VCC - provides noise margin ≥0.3×VCC for reliable operation in electrically noisy environments |
Pinout & Package
SN74LV123ADRE4 is packaged in a 16-pin SOIC (D) package measuring 6.00 mm × 9.90 mm, with standard JEDEC MS-012AC footprint and 1.27 mm pitch. Pin assignments are identical to 'AHC123A/'AHCT123A for drop-in compatibility where voltage levels permit.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A | Falling-edge trigger input (active-low) | Held low to enable B-input triggering; transition from H→L initiates pulse when corresponding B = L |
| 1B, 2B | Rising-edge trigger input (active-high) | Held high to enable A-input triggering; transition from L→H initiates pulse when corresponding A = H |
| 1CLR, 2CLR | Asynchronous clear input | Active-high; forces Q low and Q high immediately, overriding any ongoing pulse regardless of timing state |
| 1Q, 2Q | Inverted output | Active-low output pulse; complements 1Q/2Q; used for direct drive of enable/disable logic requiring inverted polarity |
| 1Q, 2Q | Non-inverted output | Active-high output pulse; primary timing output; drives downstream logic, LEDs, or microcontroller interrupts directly |
| 1Cext, 2Cext | External capacitor negative terminal | Connects to GND side of timing capacitor; forms RC time constant with Rext/Cext node |
| 1Rext/Cext, 2Rext/Cext | RC junction node | Connects to positive side of Cext and one end of Rext; sets pulse width via tw = K × Rext × Cext (K ≈ 1.0 for Cext ≥ 1 nF) |
| VCC, GND | Power supply terminals | Single-supply operation; decoupling capacitor required between VCC and GND near device for stable timing |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs on A, B, CLR | Input hysteresis ≥0.3×VCC eliminates false triggering from slow edges or EMI-coupled noise in industrial wiring |
| Retriggerable architecture | Allows extending output pulse indefinitely by repeated valid triggers before timeout - essential for variable-length event windows |
| Glitch-free power-up reset | Q outputs initialize low and Q high at power-on without external reset circuitry - simplifies system boot sequencing |
| Mixed-mode I/O voltage tolerance | All inputs accept 0–5.5 V regardless of VCC, enabling direct connection to higher-voltage sensors or legacy logic without translators |
| Ioff partial-power-down protection | Outputs enter high-impedance state with <5 µA leakage when VCC = 0 V - prevents backdrive damage in hot-swap or multi-supply systems |
Applications
| Microcontroller Interrupt Conditioning | Digital Signal Debouncing |
|---|---|
|
Use Scenario: A mechanical switch or encoder generates noisy, bouncing transitions that must be converted into clean, single-pulse interrupts for an ARM Cortex-M4 MCU. IC Role / Device Role / Timing Role: SN74LV123ADRE4 acts as a hardware-based edge detector and pulse stretcher, converting each physical switch closure into a precise, jitter-free 100 µs interrupt pulse. Use Value: Eliminates need for software debouncing loops or external RC + Schmitt buffers, reducing CPU load and ensuring deterministic interrupt latency under all environmental conditions. |
Use Scenario: An industrial PLC input module receives TTL-level signals from limit switches subject to electromagnetic interference in motor control cabinets. IC Role / Device Role / Timing Role: SN74LV123ADRE4 serves as a dual-channel noise-immune pulse generator, using Schmitt-triggered A/B inputs to reject sub-100 ns transients while preserving valid edge events. Use Value: Provides >30 dB noise rejection margin and ±1% pulse-width consistency across temperature, improving system reliability without FPGA or microcontroller firmware overhead. |
| Legacy Logic Interface Timing | Power Sequencing Control |
|
Use Scenario: A 5 V legacy FPGA design requires precise 200 ns strobe pulses synchronized to a 3.3 V microcontroller's GPIO outputs. IC Role / Device Role / Timing Role: SN74LV123ADRE4 functions as a voltage-tolerant timing bridge, accepting 3.3 V trigger inputs and generating 5 V-compatible output pulses with sub-12 ns skew. Use Value: Enables seamless interoperability between mixed-voltage subsystems without discrete level shifters or timing uncertainty from passive RC networks. |
Use Scenario: A server PSU controller must assert a "PGOOD" signal only after all rail voltages stabilize, requiring a programmable delay with override capability. IC Role / Device Role / Timing Role: SN74LV123ADRE4 operates as a retriggerable power-good timer, where each rail's OK signal retriggers the pulse until all rails settle, then clears on final timeout. Use Value: Delivers fail-safe sequencing with hardware-enforced minimum delay (e.g., 10 ms) and immediate abort if any rail fails post-stabilization - no software watchdog needed. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar monostable multivibrator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LV123ADR | Same die, SOIC-16 package but without Green (RoHS-compliant) marking suffix - identical electrical specs and pinout | No functional difference; used in non-RoHS-restricted legacy production lines | Select SN74LV123ADR only if RoHS exemption applies; otherwise SN74LV123ADRE4 is preferred for modern compliance |
| SN74LVC1G123DBVR | Single-channel, SOT-23-6 package; lower drive strength (±24 mA vs ±25 mA); same VCC range and retriggering behavior | Requires two units for dual-channel use; occupies less board area but increases component count and routing complexity | Choose SN74LVC1G123DBVR only for space-constrained single-channel designs; SN74LV123ADRE4 remains optimal for dual-channel integration |
Compared with SN74LV123ADR, SN74LV123ADRE4 adds RoHS compliance without performance trade-offs; versus SN74LVC1G123DBVR, it delivers true dual-channel functionality in one package, reducing BOM count and inter-channel skew - critical for synchronized timing tasks.
Availability
SN74LV123ADRE4 is available at Aetrix Electronics and suitable for industrial control systems, embedded microcontroller interfaces, and power management circuits requiring stable component supply, long-term lifecycle support, and guaranteed RoHS compliance.
Supply support for SN74LV123ADRE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog and embedded processing technologies, with over 50 years of innovation in precision timing, logic, and power management ICs.
The SN74LV123A family was designed for robust, low-power monostable timing in mixed-voltage digital systems - targeting applications demanding glitch-free startup, noise immunity, and flexible pulse-width programming without software intervention.
FAQ
What is the maximum output pulse width achievable with SN74LV123ADRE4?
The SN74LV123ADRE4 supports output pulse widths up to 100% duty cycle through retriggering. With Rext = 100 kΩ and Cext = 0.1 µF, the base pulse duration exceeds 1 ms; repeated valid triggers before timeout extend it indefinitely. The SN74LV123ADRE4 datasheet confirms this behavior under Device Functional Modes and Application Information sections.
Does SN74LV123ADRE4 require external pull-up resistors on A, B, or CLR inputs?
No, SN74LV123ADRE4 does not require external pull-up resistors. Its Schmitt-trigger inputs have defined VIH and VIL thresholds (0.7×VCC and 0.3×VCC), and all unused inputs must be tied to VCC or GND per TI application report SCBA004 - internal structure eliminates need for external biasing.
Can SN74LV123ADRE4 operate with a 2.5 V supply and interface to 5 V logic inputs?
Yes, SN74LV123ADRE4 supports 2.5 V VCC operation and accepts input voltages up to 5.5 V on all I/O pins, including A, B, and CLR. This mixed-mode voltage tolerance allows direct connection to 5 V sensors or legacy logic without level-shifting components - confirmed in the Recommended Operating Conditions table of the SN74LV123ADRE4 datasheet.
How does the Ioff feature protect SN74LV123ADRE4 during partial power-down?
The Ioff circuitry in SN74LV123ADRE4 disables all outputs when VCC = 0 V, limiting leakage current to ≤5 µA. This prevents backflow current from live I/O lines into the unpowered device - protecting against latch-up and enabling safe hot-swap operation in multi-rail systems, as specified in Section 7.5 Electrical Characteristics.
What is the pulse-width matching accuracy between the two channels of SN74LV123ADRE4?
SN74LV123ADRE4 guarantees ±1% output pulse-duration variation (Δtw) between Channel 1 and Channel 2 under identical Rext/Cext conditions and temperature - a key specification verified in Switching Characteristics tables (Sections 7.9–7.11) and critical for applications requiring synchronized timing such as dual-edge detection or complementary pulse generation.
SN74LV123ADRE4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LV
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Logic Type:
- Monostable
- Independent Circuits:
- 2
- Schmitt Trigger Input:
- Yes
- Propagation Delay:
- 13 ns
- Current - Output High, Low:
- 12mA, 12mA
- Voltage - Supply:
- 2 V ~ 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
SN74LV123ADRE4 FAQ
1.How can I place an order for SN74LV123ADRE4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LV123ADRE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LV123ADRE4 reliable?
The price and inventory of SN74LV123ADRE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LV123ADRE4 is usually 5 days.
3.What payment methods are accepted for SN74LV123ADRE4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LV123ADRE4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LV123ADRE4?
SN74LV123ADRE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LV123ADRE4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LV123ADRE4?
For technical support, including SN74LV123ADRE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LV123ADRE4 requirements.
6.How does Aetrix verify that SN74LV123ADRE4 is sourced from the original manufacturer or authorized distributors?
All SN74LV123ADRE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LV123ADRE4 meets industry standards.
7.What is the process for return or replacement of SN74LV123ADRE4?
All SN74LV123ADRE4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74LV123ADRE4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LV123ADRE4 part is unused and in its original packaging.
Return procedure for SN74LV123ADRE4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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