Texas Instruments SN74LV123APWRG4
- Part No.:
- SN74LV123APWRG4
- Manufacturer:
- Texas Instruments
- Category:
- Multivibrators
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74LV123APWRG4.pdf
- Description:
- IC MULTIVIBRATOR 13NS 16TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SN74LV123APWRG4 from Texas Instruments is a dual retriggerable monostable multivibrator IC with Schmitt-trigger inputs, operating from 2 V to 5.5 V supply, delivering ≤11 ns propagation delay at 5 V, ±1% pulse-duration matching between channels, and programmable output pulse width up to 100% duty cycle via external R/C network - used for edge-sensitive timing control in digital interrupt conditioning and signal debouncing circuits.
For engineers reviewing the SN74LV123APWRG4 datasheet, SN74LV123APWRG4 pinout, SN74LV123APWRG4 application, or SN74LV123APWRG4 equivalent, key selection criteria include its dual-channel retriggerability, Ioff partial-power-down support, mixed-mode voltage tolerance on all I/Os, and guaranteed glitch-free power-up reset - critical for embedded microcontroller interface timing integrity.
Technical Context
The SN74LV123APWRG4 implements two independent monostable multivibrators, each triggered by rising- or falling-edge logic on A/B inputs with Schmitt-trigger hysteresis (≥0.3×VCC), enabling robust operation with slow or noisy signals. Pulse duration is set externally via Rext/Cext network, with tw = K × RT × CT where K ≈ 1.0 for CT ≥ 1000 pF.
Each channel supports three trigger modes: (1) 1A↓ with 1B = L, (2) 1B↑ with 1A = H, or (3) 1CLR↑ while 1A = L and 1B = H. The active-low clear input overrides ongoing pulses, and Ioff circuitry disables outputs during power-down to prevent backflow current.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2 V to 5.5 V - enables direct interfacing with 2.5 V, 3.3 V, and 5 V logic domains without level shifters. |
| Max tpd @ 5 V | 11 ns - ensures sub-100 MHz timing margin for fast microcontroller interrupt synchronization. |
| Pulse Duration Range | Programmable from ~100 ns to >1 ms via external R/C - supports both short debounce and long timeout functions. |
| Δtw Matching | ±1% - guarantees matched pulse widths across dual channels for synchronized timing in differential or redundant paths. |
| Ioff Support | Yes - prevents current backflow when VCC = 0 V, enabling safe hot-insertion and partial-power-down system architectures. |
| Input Hysteresis | ≥0.3×VCC on A, B, CLR - rejects noise and eliminates chatter on mechanical switch inputs or slow-rising sensor signals. |
| Power-Up State | Glitch-free Q = L / Q = H - eliminates spurious interrupts or latch-up risk at system startup without external reset. |
Pinout & Package
TSSOP-16 package (6.40 mm × 5.00 mm), lead pitch 0.65 mm, exposed pad not electrically connected - compatible with standard surface-mount reflow profiles and automated optical inspection.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1A, 2A | Falling-edge trigger input (active-low gated) | Must be held low for rising-edge mode; transitions from H→L initiate pulse when corresponding B = L. |
| 1B, 2B | Rising-edge trigger input (active-high gated) | Must be held high for falling-edge mode; transitions from L→H initiate pulse when corresponding A = H. |
| 1CLR, 2CLR | Asynchronous active-high clear | Drives Q low and Q high immediately - terminates ongoing output pulse regardless of retrigger state. |
| 1Q, 2Q | Inverting output | Active-low pulse; normally high; goes low for programmed duration upon valid trigger event. |
| 1Q, 2Q | Non-inverting output | Active-high pulse; normally low; goes high for programmed duration upon valid trigger event. |
| 1Cext, 2Cext | External capacitor negative terminal | Connects to GND side of timing capacitor; forms RC time constant with Rext/Cext node. |
| 1Rext/Cext, 2Rext/Cext | RC junction node | Connects timing resistor to VCC and timing capacitor to Cext pin - sets pulse width per tw = K × RT × CT. |
| VCC | Positive supply | Supplies both logic core and output drivers; decoupling capacitor required within 1 cm of pin. |
| GND | Ground reference | Return path for all internal currents and external timing components; must be low-impedance plane. |
Key Features
| Feature | Design Value |
|---|---|
| Retriggerable operation | Enables extending output pulse beyond initial duration by applying new trigger before timeout - supports variable-length strobes in burst-mode interfaces. |
| Schmitt-trigger inputs | Provides ≥0.3×VCC hysteresis on A, B, and CLR - eliminates false triggering from EMI, contact bounce, or slow-rising analog-to-digital signals. |
| Mixed-mode I/O voltage tolerance | Accepts 0–5.5 V input levels regardless of VCC - allows direct connection to higher-voltage sensors or legacy logic without translators. |
| Glitch-free power-up reset | Guarantees Q = L / Q = H at VCC ramp-up - prevents unintended MCU interrupts or latch-up in boot-critical systems. |
| Ioff partial-power-down | Disables outputs when VCC = 0 V - blocks reverse current flow into powered subsystems during hot-swap or sleep-state transitions. |
Applications
| Keyboard/Keypad Debounce | Microcontroller Interrupt Conditioning |
|---|---|
Use Scenario: Mechanical keypress generates noisy, bouncing signal lasting 5–20 ms. IC Role / Device Role / Timing Role: SN74LV123APWRG4 converts each keypress into a clean, fixed-duration low pulse on Q output, synchronized to first stable edge. Use Value: Eliminates software polling or firmware debounce delays; reduces MCU CPU load by >90% and ensures deterministic response latency ≤11 ns + tw. |
Use Scenario: External sensor asserts asynchronous interrupt line with unpredictable edge rate or noise. IC Role / Device Role / Timing Role: SN74LV123APWRG4 conditions sensor output into precise, jitter-free pulse for MCU external interrupt pin, using Schmitt-triggered A/B inputs. Use Value: Prevents multiple spurious interrupts from single event; enables reliable edge detection even with 100+ µs rise times or ±200 mV noise. |
| Dual-Channel Timing Synchronization | Power Sequencing Timeout |
Use Scenario: Two independent control signals require precisely matched timing windows for parallel actuation. IC Role / Device Role / Timing Role: SN74LV123APWRG4 uses identical R/C networks on both channels to generate synchronized Q/Q pulses with ±1% duration matching. Use Value: Ensures simultaneous enablement of dual power rails or motor phases - avoids shoot-through or sequencing skew in safety-critical drives. |
Use Scenario: System requires fail-safe timeout if power-good signal fails to assert within defined window. IC Role / Device Role / Timing Role: SN74LV123APWRG4 configured with long R/C time constant triggers watchdog reset if PG# remains low beyond threshold. Use Value: Provides hardware-enforced power sequencing guardband (e.g., 100 ms) independent of firmware - meets IEC 61508 SIL-2 requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar monostable multivibrator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LV123APW | No G4 suffix; same TSSOP-16 package, identical electrical specs, RoHS-compliant but not automotive-grade (no AEC-Q100 qualification). | Lacks extended temperature range (–40°C to 125°C) and enhanced ESD robustness (±2000 V HBM) of SN74LV123APWRG4. | Select SN74LV123APW only for commercial-grade cost-sensitive designs where automotive reliability is not required. |
| 74LVC123AD | Lower VCC min (1.65 V), faster max tpd (7.5 ns @ 3.3 V), but no Ioff support and narrower hysteresis (≈0.15×VCC). | Unsuitable for partial-power-down systems; less noise immunity on slow inputs; incompatible with 2 V-only supply rails. | Choose 74LVC123AD only when ultra-low propagation delay and 1.8 V compatibility outweigh need for Ioff and robust Schmitt thresholds. |
Compared with SN74LV123APW and 74LVC123AD, SN74LV123APWRG4 uniquely combines automotive-grade reliability (AEC-Q100), Ioff-enabled power-down safety, and wide-input-hysteresis noise immunity - making it the sole choice for industrial control and automotive body electronics requiring fail-operational timing integrity.
Availability
SN74LV123APWRG4 is available at Aetrix Electronics and suitable for keyboard debounce, microcontroller interrupt conditioning, dual-channel timing synchronization, and power sequencing timeout applications requiring stable component supply across automotive, industrial, and medical device production cycles.
Supply support for SN74LV123APWRG4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 50 years of innovation in high-reliability timing and interface ICs.
The SN74LV123A product line delivers retriggerable monostable multivibrators optimized for noise-immune digital timing in automotive body control, industrial PLC I/O modules, and medical diagnostic equipment requiring AEC-Q100 compliance and long-term supply stability.
FAQ
What is the minimum external timing capacitance supported by SN74LV123APWRG4?
The SN74LV123APWRG4 supports external timing capacitance down to 1 pF, though for accurate pulse width calculation (tw = K × RT × CT), CT ≥ 1000 pF is recommended to maintain K ≈ 1.0. At lower values, K deviates from unity and must be interpolated from Figure 3 in the datasheet. Operation below 1 pF is not characterized and may yield inconsistent timing.
Does SN74LV123APWRG4 support both rising- and falling-edge triggering on the same input pin?
Yes - SN74LV123APWRG4 supports configurable edge sensitivity per channel: 1A and 2A accept falling-edge triggers when the corresponding B input is held low, while 1B and 2B accept rising-edge triggers when the corresponding A input is held high. This dual-mode capability is inherent to the internal gated logic and requires no external configuration.
Can SN74LV123APWRG4 operate with VCC = 2.0 V and still meet its specified propagation delay?
Yes - SN74LV123APWRG4 is fully specified down to VCC = 2.0 V, with maximum tpd of 37 ns (CL = 50 pF) at that voltage. While propagation delay increases as VCC decreases, all timing parameters including tpd, tw, and trr remain guaranteed across the full 2 V to 5.5 V range per the Recommended Operating Conditions table.
How does the Ioff feature of SN74LV123APWRG4 protect downstream circuitry during power-down?
The Ioff feature in SN74LV123APWRG4 disables all output drivers when VCC = 0 V, presenting high-impedance outputs that prevent current backflow from powered I/O lines into the unpowered IC. This protects against latch-up and damage in mixed-voltage systems where other devices remain active during partial power-down sequences.
Is the pulse duration matching between the two channels of SN74LV123APWRG4 specified over temperature?
Yes - SN74LV123APWRG4 guarantees ±1% pulse-duration matching (Δtw) between Channel 1 and Channel 2 over the full operating temperature range (–40°C to 125°C) and supply voltage range (2 V to 5.5 V), as confirmed in Section 7.9 Switching Characteristics under CL = 50 pF test conditions.
SN74LV123APWRG4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LV
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Monostable
- Independent Circuits:
- 2
- Schmitt Trigger Input:
- Yes
- Propagation Delay:
- 13 ns
- Current - Output High, Low:
- 12mA, 12mA
- Voltage - Supply:
- 2 V ~ 5.5 V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
SN74LV123APWRG4 FAQ
1.How can I place an order for SN74LV123APWRG4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LV123APWRG4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LV123APWRG4 reliable?
The price and inventory of SN74LV123APWRG4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LV123APWRG4 is usually 5 days.
3.What payment methods are accepted for SN74LV123APWRG4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LV123APWRG4 transactions.
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4.How is shipping managed for SN74LV123APWRG4?
SN74LV123APWRG4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LV123APWRG4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LV123APWRG4?
For technical support, including SN74LV123APWRG4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LV123APWRG4 requirements.
6.How does Aetrix verify that SN74LV123APWRG4 is sourced from the original manufacturer or authorized distributors?
All SN74LV123APWRG4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LV123APWRG4 meets industry standards.
7.What is the process for return or replacement of SN74LV123APWRG4?
All SN74LV123APWRG4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74LV123APWRG4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LV123APWRG4 part is unused and in its original packaging.
Return procedure for SN74LV123APWRG4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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