Texas Instruments SN74LV138ABQBR

Overview

SN74LV138ABQBR from Texas Instruments is a 3-line to 8-line decoder/demultiplexer IC operating from 2 V to 5.5 V, delivering 9.5 ns maximum propagation delay at 5 V, supporting mixed-mode voltage operation on all ports, and featuring Ioff for partial-power-down mode. It is used in LED matrix control and output expansion circuits where low-voltage compatibility and deterministic enable logic are required.

For engineers reviewing the SN74LV138ABQBR datasheet, SN74LV138ABQBR pinout, SN74LV138ABQBR application, or SN74LV138ABQBR equivalent, key selection considerations include its dual active-low + single active-high enable architecture, 16-pin WQFN (BQB) package with thermal pad, guaranteed 25 mA output drive capability, and JESD17 latch-up immunity exceeding 250 mA.

Technical Context

The SN74LV138ABQBR implements a positive-logic 3-to-8 decoding function using standard CMOS inputs and balanced push-pull outputs. Its three binary address inputs (A0–A2) and three enable inputs-G0 and G1 (active-low), G2 (active-high)-determine which of eight outputs (Y0–Y7) is driven low while others remain high-impedance or high.

It supports partial-power-down via Ioff circuitry that disables outputs and limits leakage to ≤5 μA when VCC = 0 V, enabling safe back-drive prevention in hot-swap or multi-rail systems. The device meets JESD17 latch-up specification (>250 mA) and provides ground bounce (VOLP < 0.8 V) and undershoot (VOHV > 2.3 V) performance validated at 3.3 V/25°C.

Key Specifications

Pinout & Package

SN74LV138ABQBR is packaged in a 16-pin WQFN (BQB) with 3.60 mm × 2.60 mm body size and an exposed thermal pad. This RoHS-compliant, leadless package supports high-density PCB layouts and enhanced thermal dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-to-8 decoder applications.

Compared with SN74HC138DR and 74LVC138PW,118, the SN74LV138ABQBR offers superior thermal performance in space-constrained designs, guaranteed Ioff for robust power sequencing, and tighter propagation delay consistency across 2–5.5 V operation-making it optimal for industrial PLC I/O modules and portable instrumentation.

Availability

SN74LV138ABQBR is available at Aetrix Electronics and suitable for LED matrix control, output expansion, and 7-segment display control requiring stable component supply, long-term industrial lifecycle support, and RoHS-compliant packaging.

Supply support for SN74LV138ABQBR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and logic solutions, with over 90 years of innovation in industrial, automotive, and communications markets.

The SN74LV138ABQBR belongs to TI's LV logic family, designed specifically for low-voltage, high-noise-immunity digital interfacing in mixed-supply systems where power sequencing integrity and signal integrity are critical.

FAQ

What is the maximum propagation delay of the SN74LV138ABQBR at 3.3 V?

The SN74LV138ABQBR has a maximum propagation delay of 13.5 ns at VCC = 3.3 V with a 15 pF load, measured from any address or enable input to any Y output. This value is specified across the full operating temperature range (–40°C to +85°C) and ensures predictable timing in real-time decoding applications. The SN74LV138ABQBR achieves this performance while maintaining low ground bounce and controlled undershoot characteristics.

Does the SN74LV138ABQBR support partial-power-down operation?

Yes, the SN74LV138ABQBR supports partial-power-down operation via its Ioff feature. When VCC = 0 V, all outputs enter a high-impedance state with leakage current limited to ≤5 μA, preventing back-current flow from live buses into the unpowered device. This behavior is explicitly characterized in the Electrical Characteristics table and makes the SN74LV138ABQBR suitable for hot-swap and multi-rail power architectures where subsystems power up/down independently.

What package type is used for the SN74LV138ABQBR?

The SN74LV138ABQBR uses a 16-pin WQFN package (BQB variant) with dimensions of 3.60 mm × 2.60 mm and an exposed thermal pad. This leadless, RoHS-compliant package provides lower thermal resistance (86°C/W) compared to TSSOP or SOIC alternatives and supports fine-pitch surface-mount assembly. The thermal pad must be soldered to a PCB ground plane for optimal thermal and EMI performance.

Can the SN74LV138ABQBR interface directly with 1.8 V logic inputs?

No-the SN74LV138ABQBR does not guarantee recognition of 1.8 V logic HIGH inputs. Its VIH(min) is VCC × 0.7 (e.g., 2.31 V at VCC = 3.3 V), and absolute input voltage rating is 0–5.5 V. While 1.8 V signals applied to inputs will not damage the device, they may not meet the minimum high-level threshold and could result in indeterminate output states. For 1.8 V–3.3 V interfacing, a level translator or compatible 1.8 V–tolerant logic family should be used alongside the SN74LV138ABQBR.

How many enable inputs does the SN74LV138ABQBR have, and what are their polarities?

The SN74LV138ABQBR has three enable inputs: G0 and G1 are active-low, and G2 is active-high. All three must be asserted simultaneously (G0 = L, G1 = L, G2 = H) for decoding to occur. This asymmetric enable structure reduces external logic count in cascaded decoder configurations-for example, a 24-line decoder can be implemented without any external inverters. The SN74LV138ABQBR datasheet confirms this behavior in the Function Table and Logic Diagram sections.