Texas Instruments SN74LV138AQWBQBRQ1
- Part No.:
- SN74LV138AQWBQBRQ1
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-WFQFN Exposed Pad
- Datasheet:
-
SN74LV138AQWBQBRQ1.pdf
- Description:
- AUTOMOTIVE THREE-LINE TO EIGHT-L
- Quantity:
- Payment:

- Shipping:

Inventory:2,648
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74LV138AQWBQBRQ1 from Texas Instruments is an AEC-Q100 Grade 1 automotive 3-line-to-8-line decoder/demultiplexer with 2 V to 5.5 V VCC operation, 9.5 ns max propagation delay at 5 V, Ioff partial-power-down support, and active-low G0/G1 plus active-high G2 enable architecture. It serves as a memory address decoder or data routing switch in engine control units and body electronics modules.
For engineers reviewing the SN74LV138AQWBQBRQ1 datasheet, SN74LV138AQWBQBRQ1 pinout, SN74LV138AQWBQBRQ1 application, or SN74LV138AQWBQBRQ1 equivalent, key selection criteria include automotive temperature range (–40°C to +125°C), mixed-mode voltage compatibility across all ports, output ground bounce <0.8 V at 3.3 V, and WQFN-16 (BQB) package thermal performance (RθJA = 86°C/W).
Technical Context
The SN74LV138AQWBQBRQ1 implements a positive-logic 3:8 decoder with three binary-select inputs (A0–A2) and three enable inputs (G2 high-active, G0/G1 low-active), enabling direct cascading without external inverters. Its CMOS push-pull outputs drive up to ±12 mA at 5 V while maintaining VOL ≤ 0.55 V and VOH ≥ 3.8 V under load.
Designed for automotive memory decoding and data routing, it features Ioff circuitry that disables outputs during power-down to prevent backflow current, and supports stable operation with capacitive loads ≤50 pF. The device meets AEC-Q100-002 HBM Level 2 (±2 kV) and AEC-Q100-011 CDM Level C4B (±1 kV) ESD requirements.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2 V to 5.5 V - enables interoperability with 2.5 V, 3.3 V, and 5 V logic domains without level shifters |
| Max tpd | 9.5 ns at 5 V, CL = 15 pF - ensures minimal system decoding delay in high-speed memory subsystems |
| Operating Temp | –40°C to +125°C (Grade 1) - qualified for under-hood and transmission control module environments |
| Ioff | <5 μA - prevents damaging back-current when VCC = 0 V, critical for hot-swap and partial-power-down systems |
| Output Drive | ±12 mA at 5 V - sufficient to directly drive LED segments, small MOSFET gates, or CMOS inputs without buffers |
| Input Leakage | ±1 μA - allows reliable termination with 10-kΩ pull-up/down resistors without significant voltage error |
| ESD Rating | HBM ±2 kV, CDM ±1 kV - exceeds AEC-Q100 requirements for assembly and field reliability |
Pinout & Package
SN74LV138AQWBQBRQ1 uses a 16-pin WQFN package (BQB) with 3.60 mm × 2.60 mm body size and wettable flanks for AOI-compatible solder joint inspection. Thermal pad (exposed die attach) enhances thermal dissipation (RθJB = 54.9°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0, A1, A2 | Binary address select inputs | Determine which of eight outputs (Y0–Y7) is asserted; support 3-bit memory address decoding |
| G0, G1 | Active-low enable inputs | Enable function only when both are LOW; reduce need for external inverters in multi-chip decode trees |
| G2 | Active-high enable input | Enables decoder when HIGH; complements G0/G1 for flexible hierarchical enable logic |
| Y0–Y7 | Active-low decoded outputs | Each output goes LOW when selected; supports wired-OR expansion and LED sink driving |
| VCC | Positive supply | Single rail powers all logic and outputs; supports mixed-voltage I/O via level-tolerant inputs |
| GND | Ground reference | Return path for all output sink current and supply current; requires low-impedance PCB plane |
| Thermal Pad | Die attach thermal interface | Must be soldered to PCB copper pour for thermal management; not electrically connected |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive use from –40°C to +125°C ambient, including thermal cycling and humidity testing |
| Mixed-mode voltage operation | All inputs tolerate 0–5.5 V regardless of VCC, enabling seamless interfacing between 3.3 V controllers and 5 V peripherals |
| Low-output-ground-bounce | VOLP < 0.8 V at 3.3 V - minimizes noise coupling into adjacent signal lines in dense PCB layouts |
| Partial-power-down (Ioff) | Outputs enter high-impedance state with <5 μA leakage when VCC = 0 V - essential for domain-isolated power architectures |
| Wettable flanks | QFN side-wall plating enables automated optical inspection of solder fillets - improves manufacturing yield in automotive SMT lines |
Applications
| Engine Control Unit (ECU) Address Decoding | LED Matrix Driver for Instrument Cluster |
|---|---|
Use Scenario: Selecting one of eight memory-mapped peripheral registers (e.g., ADC channels, PWM timers) within a 32-bit microcontroller subsystem. IC Role / Device Role / Timing Role: 3:8 address decoder translating CPU address bits A0–A2 into individual chip-select signals for peripheral ICs. Use Value: Eliminates need for discrete logic gates or FPGA resources; 9.5 ns tpd ensures no impact on CPU memory access timing budget. | Use Scenario: Driving rows of a 8×8 LED matrix in automotive digital instrument clusters requiring brightness uniformity and EMI control. IC Role / Device Role / Timing Role: Row selector demultiplexer sinking current from 8 parallel LED strings via active-low Y0–Y7 outputs. Use Value: Built-in Ioff prevents ghost lighting during sleep mode; VOL ≤ 0.55 V at 12 mA ensures consistent LED forward voltage drop across temperature. |
| 7-Segment Display Multiplexing | Body Control Module (BCM) Output Expansion |
Use Scenario: Scanning four 7-segment displays using time-multiplexed digit selection in center console infotainment panels. IC Role / Device Role / Timing Role: Digit-enable decoder asserting one of eight outputs (Y0–Y3 mapped to digits, Y4–Y7 unused or tied) per display cycle. Use Value: Low-drive outputs minimize ringing on long flex-cable traces; mixed-voltage tolerance allows direct connection to 3.3 V MCU GPIOs. | Use Scenario: Expanding discrete output capability in BCMs to control solenoids, relays, or status indicators beyond MCU pin count limits. IC Role / Device Role / Timing Role: Logic-level translator and driver enabling MCU GPIOs to activate multiple 12 V automotive loads via external N-channel MOSFETs. Use Value: G0/G1/G2 enable structure permits hierarchical control - e.g., global enable (G2) + zone enable (G0) + local select (A0–A2). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC138QPWRQ1 | Higher VCC min (2 V vs. 4.5 V), slower tpd (21 ns @ 5 V), no Ioff, same BQB package | Lacks partial-power-down; unsuitable for systems requiring VCC-off isolation | Choose for cost-sensitive non-isolated designs where speed and Ioff are not required |
| MC74LVX138DT | Non-automotive grade (–40°C to +85°C), different pinout (SOIC-16), no AEC-Q100 qualification | Not qualified for automotive safety-critical functions; limited thermal performance (RθJA > 120°C/W) | Acceptable for prototyping or non-automotive industrial use; avoid in production vehicle ECUs |
Compared with SN74HC138QPWRQ1 and MC74LVX138DT, SN74LV138AQWBQBRQ1 uniquely combines Grade 1 temperature range, Ioff protection, and 9.5 ns speed in a thermally optimized WQFN package - making it the only option qualified for high-reliability automotive decoding where power-domain isolation and timing integrity are mandatory.
Availability
SN74LV138AQWBQBRQ1 is available at Aetrix Electronics and suitable for engine control units, instrument cluster displays, and body control modules requiring stable component supply across extended automotive lifecycles.
Supply support for SN74LV138AQWBQBRQ1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader delivering analog and embedded processing solutions for automotive, industrial, and personal electronics markets.
The SN74LV138AQWBQBRQ1 belongs to TI's LV-A family of automotive-qualified logic devices, engineered specifically for low-voltage, high-speed decoding and demultiplexing in safety-critical vehicle subsystems.
FAQ
What is the maximum operating temperature for SN74LV138AQWBQBRQ1?
The SN74LV138AQWBQBRQ1 is rated for continuous operation from –40°C to +125°C ambient temperature (AEC-Q100 Grade 1). This specification is validated across process corners and lifetime stress conditions, making SN74LV138AQWBQBRQ1 suitable for under-hood applications such as transmission control modules and battery management systems where junction temperatures may exceed 150°C under transient load.
Does SN74LV138AQWBQBRQ1 support partial power-down mode?
Yes, SN74LV138AQWBQBRQ1 includes Ioff circuitry that disables all outputs when VCC = 0 V, limiting leakage to <5 μA per terminal. This feature prevents back-current flow from powered sections into unpowered domains - a critical requirement in modern automotive domain controllers with independent power rails. The Ioff behavior is specified across full temperature range and verified per JESD78.
What is the propagation delay of SN74LV138AQWBQBRQ1 at 3.3 V supply?
At VCC = 3.3 V and CL = 15 pF, the typical propagation delay (tpd) of SN74LV138AQWBQBRQ1 is 11.4 ns, with a maximum of 13.5 ns over temperature and voltage extremes. This value applies to transitions from any address input (A0–A2) or enable input (G0/G1/G2) to any output (Y0–Y7), as confirmed in Section 6.7 of the official datasheet SCLS885.
Can SN74LV138AQWBQBRQ1 interface with both 3.3 V and 5 V logic families?
Yes, SN74LV138AQWBQBRQ1 supports mixed-mode voltage operation: its inputs tolerate 0–5.5 V regardless of VCC, and outputs swing rail-to-rail (VOL ≈ 0 V, VOH ≈ VCC). When powered at 3.3 V, it can accept 5 V inputs without damage and drive 3.3 V CMOS loads; when powered at 5 V, it drives 5 V TTL/CMOS loads while accepting 3.3 V control signals - eliminating external level shifters in heterogeneous systems.
Is SN74LV138AQWBQBRQ1 pin-compatible with standard SN74LV138A devices?
Yes, SN74LV138AQWBQBRQ1 shares identical pin configuration, function mapping, and electrical behavior with commercial-grade SN74LV138A in the same BQB (WQFN-16) package. Pin-for-pin compatibility extends to signal names (A0–A2, G0–G2, Y0–Y7, VCC, GND), thermal pad placement, and PCB footprint - enabling drop-in replacement in existing designs upgraded to automotive qualification.
SN74LV138AQWBQBRQ1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LV
- Package/Case:
- 16-WFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 12mA, 12mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount, Wettable Flank
- Supplier Device Package:
- 16-WQFN (2.5x3.5)
SN74LV138AQWBQBRQ1 FAQ
1.How can I place an order for SN74LV138AQWBQBRQ1 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LV138AQWBQBRQ1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LV138AQWBQBRQ1 reliable?
The price and inventory of SN74LV138AQWBQBRQ1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LV138AQWBQBRQ1 is usually 5 days.
3.What payment methods are accepted for SN74LV138AQWBQBRQ1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LV138AQWBQBRQ1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LV138AQWBQBRQ1?
SN74LV138AQWBQBRQ1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LV138AQWBQBRQ1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LV138AQWBQBRQ1?
For technical support, including SN74LV138AQWBQBRQ1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LV138AQWBQBRQ1 requirements.
6.How does Aetrix verify that SN74LV138AQWBQBRQ1 is sourced from the original manufacturer or authorized distributors?
All SN74LV138AQWBQBRQ1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LV138AQWBQBRQ1 meets industry standards.
7.What is the process for return or replacement of SN74LV138AQWBQBRQ1?
All SN74LV138AQWBQBRQ1 units undergo pre-shipment inspection (PSI). If there is an issue with SN74LV138AQWBQBRQ1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LV138AQWBQBRQ1 part is unused and in its original packaging.
Return procedure for SN74LV138AQWBQBRQ1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74LV138AQWBQBRQ1 Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
