Texas Instruments SN74LV157ADBR
- Part No.:
- SN74LV157ADBR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
SN74LV157ADBR.pdf
- Description:
- IC MULTIPLEXER 4 X 2:1 16SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,411
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74LV157ADBR from Texas Instruments is a quadruple 2-line to 1-line data selector/multiplexer operating from 2 V to 5.5 V, with 7.5 ns max propagation delay at 5 V, 5.5 V-tolerant inputs, and latch-up immunity exceeding 100 mA per JESD78 Class II-used in LED display data routing and network switch I/O expansion.
For engineers reviewing the SN74LV157ADBR datasheet, SN74LV157ADBR pinout, SN74LV157ADBR application, or SN74LV157ADBR equivalent, this page delivers verified electrical specs, SSOP-16 package details, functional mode truth table, noise performance (VOLP < 0.8 V), and real-world implementation guidance for logic-level signal selection in industrial and telecom systems.
Technical Context
The SN74LV157ADBR implements four independent 2:1 multiplexers with a shared active-low output strobe (G) and common address select (A/B) line, enabling simultaneous 4-bit word selection from dual input sources. Its positive-logic function table defines output Y = A when A/B = L and Y = B when A/B = H, with G = H forcing all outputs to high-impedance.
It features TTL-compatible input thresholds across its 2–5.5 V supply range, supports 5.5 V input overvoltage tolerance regardless of VCC, and maintains robust dynamic noise margins: typical VOLP < 0.8 V and VOHV > 2 V at VCC = 5 V and TA = 25°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 2 V to 5.5 V - enables direct interface with 2.5 V, 3.3 V, and 5 V logic domains without level shifters. |
| Max tpd @ 5 V | 7.5 ns - ensures sub-133 MHz operation for high-speed data path selection in servers and switches. |
| Input Voltage Tolerance | Up to 5.5 V - allows safe connection to legacy 5 V buses while powered from lower VCC (e.g., 3.3 V). |
| Output Drive | ±12 mA @ 5 V - sufficient to drive 50 pF loads with clean edges in dense PCB layouts. |
| Latch-up Immunity | >100 mA per JESD78 Class II - guarantees robustness against transient current faults in noisy industrial environments. |
| Operating Temperature | –40°C to +85°C - qualified for extended temperature use in telecom infrastructure and motor control enclosures. |
Pinout & Package
SN74LV157ADBR is housed in a 16-pin SSOP (Shrink Small Outline Package) with body dimensions 6.2 mm × 5.3 mm and 0.65 mm lead pitch. The package is RoHS-compliant, moisture sensitivity level 1, and rated for peak reflow at 260°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A/B) | Global address select input | Controls all four MUX channels simultaneously: selects input A (A/B = L) or B (A/B = H) for each Y output. |
| 2–3, 5–6, 10–11, 13–14 (1A/1B, 2A/2B, 3A/3B, 4A/4B) | Data input pairs | Eight total inputs grouped as four independent 2-input channels feeding corresponding Y outputs. |
| 4, 7, 9, 12 (1Y, 2Y, 3Y, 4Y) | True data outputs | Four buffered, non-inverted outputs delivering selected A or B data; high-impedance when G = H. |
| 8 (GND) | Power ground reference | Primary return path for all internal logic and output drivers; must be low-inductance connection. |
| 15 (G) | Active-low output enable/strobe | When high, forces all Y outputs into high-impedance state-enables bus sharing and output contention avoidance. |
| 16 (VCC) | Positive supply rail | Single supply powering all logic and output stages; requires local 0.1 µF bypass capacitor per TI layout guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (2–5.5 V) | Eliminates need for separate voltage translators when interfacing mixed-supply systems (e.g., 3.3 V MCU controlling 5 V peripherals). |
| 5.5 V-tolerant inputs | Permits direct connection to higher-voltage control lines without external clamping or resistive dividers. |
| Low ground bounce (VOLP < 0.8 V) | Reduces switching noise coupling into shared ground planes-critical for stable ADC reference and analog subsystems. |
| High noise immunity (VOHV > 2 V) | Prevents false triggering on adjacent traces during fast transitions, improving signal integrity in high-density routing. |
| JESD78 Class II latch-up rating | Ensures reliable operation under ESD events and power-rail transients in uncontrolled industrial deployment environments. |
Applications
| LED Display Control | Network Switch I/O Expansion |
|---|---|
|
Use Scenario: Routing digit segment data from two microcontroller ports to shared 7-segment driver ICs in multi-digit displays. IC Role / Device Role / Timing Role: Data selector enabling dynamic source switching without software overhead or additional GPIOs. Use Value: Reduces MCU pin count by 50% versus discrete routing; 7.5 ns tpd ensures flicker-free update at >10 kHz refresh rates. |
Use Scenario: Multiplexing status signals (link up/down, speed, duplex) from multiple PHYs to a single management controller in 1U rack switches. IC Role / Device Role / Timing Role: Parallel 4-bit data selector synchronizing status reporting across eight Ethernet lanes. Use Value: Enables compact, low-latency monitoring architecture with no timing skew between channel outputs. |
| Telecom Line Card Interface | Industrial Motor Driver Logic |
|
Use Scenario: Selecting between primary and backup configuration registers for FPGA-based framer modules in optical line terminals. IC Role / Device Role / Timing Role: Fault-tolerant register bank selector activated by watchdog-controlled A/B line. Use Value: Achieves sub-microsecond failover with guaranteed glitch-free output transitions per truth table behavior. |
Use Scenario: Steering direction and enable signals from dual-position encoder feedback to H-bridge gate drivers in servo amplifiers. IC Role / Device Role / Timing Role: Real-time signal router coordinating motion control logic with position-sensing inputs. Use Value: Supports 20 kHz PWM carrier synchronization across all four motor phases via common A/B and G timing. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2:1 multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC157A | Lower VCC min (1.65 V), faster tpd (5.2 ns @ 3.3 V), but only 3.6 V input tolerant-not 5.5 V. | Better for ultra-low-voltage battery-powered designs; unsuitable where 5 V legacy signal routing is required. | Choose SN74LVC157A only if system operates strictly ≤3.6 V and needs marginal speed gain. |
| 74HC157 | Slower (21 ns @ 4.5 V), narrower VCC (2–6 V), no 5.5 V input tolerance, higher ICC (80 µA vs. 20 µA). | Acceptable for cost-sensitive consumer-grade boards with relaxed timing and no mixed-voltage interconnect. | Select 74HC157 only for non-critical, low-frequency applications where TI's LV family reliability and noise specs are not required. |
Compared with SN74LVC157A and 74HC157, SN74LV157ADBR uniquely balances wide supply range, 5.5 V input tolerance, low power, and industrial-grade latch-up immunity-making it the preferred choice for interoperable, mixed-voltage infrastructure equipment.
Availability
SN74LV157ADBR is available at Aetrix Electronics and suitable for LED display control, network switch I/O expansion, and telecom infrastructure requiring stable component supply across extended temperature and mixed-voltage environments.
Supply support for SN74LV157ADBR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of expertise in industrial-grade interface ICs and broad portfolio scalability.
The SN74LV157ADBR belongs to TI's LV logic family, engineered for robust operation across 2–5.5 V supplies in telecom, server, and motor control systems where voltage interoperability and noise resilience are critical.
FAQ
What is the maximum propagation delay of the SN74LV157ADBR at 3.3 V?
The SN74LV157ADBR has a maximum propagation delay of 9.5 ns at VCC = 3.3 V ± 0.3 V with a 15 pF load and TA = 25°C. This value is specified in Section 6.7 of the official datasheet and reflects worst-case timing for design margining in high-speed digital interfaces using the SN74LV157ADBR.
Does the SN74LV157ADBR support 5 V input signals when powered from 3.3 V?
Yes-the SN74LV157ADBR accepts input voltages up to 5.5 V regardless of VCC level, including when VCC = 3.3 V. This 5.5 V input tolerance is explicitly stated in the Features section and Absolute Maximum Ratings table, making the SN74LV157ADBR ideal for bridging 3.3 V logic domains to legacy 5 V buses.
What is the function of the G pin on the SN74LV157ADBR?
The G pin (Pin 15) is an active-low output strobe that places all four Y outputs (1Y–4Y) into high-impedance state when driven high. When G is low, outputs reflect the selected A/B data-enabling bus sharing, output isolation, and conflict prevention in multi-driver systems using the SN74LV157ADBR.
Is the SN74LV157ADBR pin-compatible with older 74LS157 or 74HC157 devices?
No-the SN74LV157ADBR uses a 16-pin SSOP (DB) package with 0.65 mm pitch, whereas standard 74LS157 and 74HC157 are typically offered in 16-pin PDIP or SOIC packages with 1.27 mm pitch. Physical pinout matches the logic diagram, but mechanical compatibility requires board redesign; electrical behavior differs in voltage thresholds and drive strength.
What is the recommended bypass capacitor for the VCC pin of the SN74LV157ADBR?
Texas Instruments recommends a 0.1 µF ceramic capacitor placed as close as possible to the VCC (Pin 16) and GND (Pin 8) pins of the SN74LV157ADBR. This minimizes power supply noise and ensures stable switching performance-especially critical given the device's 7.5 ns propagation delay and sensitivity to ground bounce (VOLP).
SN74LV157ADBR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LV
- Package/Case:
- 16-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Multiplexer
- Circuit:
- 4 x 2:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- 12mA, 12mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 2V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SSOP
SN74LV157ADBR FAQ
1.How can I place an order for SN74LV157ADBR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LV157ADBR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LV157ADBR reliable?
The price and inventory of SN74LV157ADBR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LV157ADBR is usually 5 days.
3.What payment methods are accepted for SN74LV157ADBR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LV157ADBR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LV157ADBR?
SN74LV157ADBR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LV157ADBR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LV157ADBR?
For technical support, including SN74LV157ADBR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LV157ADBR requirements.
6.How does Aetrix verify that SN74LV157ADBR is sourced from the original manufacturer or authorized distributors?
All SN74LV157ADBR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LV157ADBR meets industry standards.
7.What is the process for return or replacement of SN74LV157ADBR?
All SN74LV157ADBR units undergo pre-shipment inspection (PSI). If there is an issue with SN74LV157ADBR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LV157ADBR part is unused and in its original packaging.
Return procedure for SN74LV157ADBR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74LV157ADBR Tags
-
SN74HC138DR
Texas Instruments

-
TC7SB3157CFU,LF(CT
Toshiba Semiconductor and Storage

-
74CBTLV3257PW,118
Nexperia USA Inc.
-
SN74CBTLV3257PWR
Texas Instruments

-
74CBTLV3257GUX
Nexperia USA Inc.

-
74HC154BQ,118
Nexperia USA Inc.

-
P3S0200GMX
NXP USA Inc.

-
SN74CB3Q3245PWR
Texas Instruments
-
SN74CB3Q3257RGYR
Texas Instruments

-
TCA9543APWR
Texas Instruments
-
TCA9546APWR
Texas Instruments

-
SN74HC138N
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
