Texas Instruments SN74LVC126ADT
- Part No.:
- SN74LVC126ADT
- Manufacturer:
- Texas Instruments
- Package:
- 14-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
SN74LVC126ADT.pdf
- Description:
- IC BUF NON-INVERT 3.6V 14SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SN74LVC126ADT from Texas Instruments is a quadruple bus buffer gate with independent 3-state outputs, designed for 1.65V–3.6V VCC operation. It supports 5.5V-tolerant inputs, delivers ≤4.7ns propagation delay at 3.3V, operates across –40°C to +125°C, and drives up to 24mA per output - enabling robust signal buffering in mixed-voltage digital interfaces such as MCU-to-peripheral data paths.
For engineers reviewing the SN74LVC126ADT datasheet, SN74LVC126ADT pinout, SN74LVC126ADT application, or SN74LVC126ADT equivalent, key selection considerations include its 14-pin SOIC (D) package, 3-state control per channel via dedicated OE pins, 5.5V input tolerance for level translation, and guaranteed performance over automotive-grade temperature range.
Technical Context
The SN74LVC126ADT implements four identical non-inverting buffer channels, each with separate output-enable (OE) control. Its CMOS design ensures rail-to-rail output swing (VOH ≥ VCC–0.3V, VOL ≤ 0.3V at 125°C), while input thresholds scale with VCC (VIH = 0.65×VCC min at low VCC). Each buffer performs Y = A logic with high-impedance state activated when OE is low.
It features 5.5V-tolerant inputs regardless of VCC, enabling down-translation from 5V logic to 1.8V/2.5V/3.3V systems. The device requires pulldown biasing on all OE pins during power-up/down to guarantee high-Z state, and supports up to 24mA sink/source per output at VCC = 3V with <0.8V ground bounce and >2V VOH undershoot at 3.3V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65V to 3.6V - enables direct use in 1.8V, 2.5V, and 3.3V logic domains without level shifters. |
| Input Voltage Tolerance | Up to 5.5V - allows interfacing with legacy 5V peripherals while powered from lower VCC. |
| tpd (max) | 4.7ns at VCC = 3.3V - supports reliable operation in high-speed digital buses up to ~100MHz. |
| IOL/IOH (max) | 24mA at VCC = 3V - drives multiple CMOS inputs or moderate capacitive loads without external buffers. |
| Operating Temperature | –40°C to +125°C - qualified for under-hood automotive, industrial control, and telecom infrastructure applications. |
| ESD Rating | ±2000V HBM - meets standard handling requirements for automated assembly and field-replaceable modules. |
| Power Dissipation | 500mW max (TA ≤ 125°C) - supports continuous operation in compact PCB layouts with minimal thermal derating. |
Pinout & Package
SN74LVC126ADT uses the 14-pin SOIC (D) package (8.65mm × 6.0mm body, 8.65mm × 3.91mm footprint), with exposed pad not present. Pin assignment follows standard TI 14-pin SOIC layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 4, 10, 13 | 1OE, 2OE, 3OE, 4OE | Active-low enable inputs - each independently controls high-impedance state of corresponding buffer output. |
| 2, 5, 9, 12 | 1A, 2A, 3A, 4A | Buffer input terminals - accept 5.5V-tolerant signals; drive internal non-inverting gates. |
| 3, 6, 8, 11 | 1Y, 2Y, 3Y, 4Y | Buffer output terminals - deliver rail-swing CMOS outputs with 24mA drive capability per channel. |
| 7 | GND | Ground reference - must be connected to system ground plane; serves as return path for all I/O and supply currents. |
| 14 | VCC | Power supply pin - supplies core logic and output drivers; requires local 0.1µF bypass capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| 5.5V-tolerant inputs | Enables direct connection to 5V logic without external translators, reducing BOM count in mixed-voltage systems. |
| Independent 3-state control | Four dedicated OE pins allow selective bus isolation per channel - critical for multi-master or shared-bus architectures. |
| Low propagation delay | ≤4.7ns at 3.3V ensures timing margin preservation in high-speed data paths like memory interfaces or display controllers. |
| High-output drive strength | 24mA per output supports fan-out to ≥10 LVC/LVT inputs or driving 50Ω transmission lines with minimal termination. |
| Automotive temperature grade | –40°C to +125°C operation qualifies SN74LVC126ADT for engine control units, ADAS sensor hubs, and infotainment backplanes. |
Applications
| Audio Dock Interface | SSD Host Controller Buffer |
|---|---|
|
Use Scenario: Isolating and driving I²S or SPDIF signals between a 5V USB audio controller and a 3.3V codec IC in portable audio docks. IC Role / Device Role / Timing Role: Level-translating bus buffer that conditions clock/data lines while preventing back-drive during hot-plug events. Use Value: Eliminates need for discrete level shifters; 5.5V input tolerance handles USB PHY signaling, and 24mA drive sustains signal integrity across 10cm PCB traces. |
Use Scenario: Buffering command/address lines between a 1.8V NVMe controller and 3.3V NAND flash packages in client SSD modules. IC Role / Device Role / Timing Role: High-speed, low-skew buffer ensuring setup/hold timing compliance across voltage-domain boundaries. Use Value: 4.7ns tpd and <1ns skew between channels maintain PCIe Gen3 timing budgets; 3-state outputs support shared bus arbitration. |
| HDTV HDMI Signal Conditioning | Industrial PLC I/O Expansion |
|
Use Scenario: Driving DDC/CEC control lines and auxiliary data paths in LCD/HDTV mainboards where SoC runs at 1.2V but panel interface requires 3.3V logic. IC Role / Device Role / Timing Role: Voltage-level translator and noise-immune buffer for low-frequency control buses operating alongside high-speed video lanes. Use Value: Input tolerance prevents latch-up from ESD transients on HDMI connectors; –40°C to +125°C rating ensures reliability in enclosed thermal environments. |
Use Scenario: Interfacing a 2.5V FPGA I/O bank to 3.3V industrial sensors and actuators in modular PLC backplanes with hot-swap capability. IC Role / Device Role / Timing Role: Isolation buffer with controlled output enable sequencing to prevent bus contention during module insertion/removal. Use Value: Independent OE pins allow staggered activation; 24mA drive supports long traces to remote I/O terminals without signal degradation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bus buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC125ADT | Non-inverting quad buffer with active-high OE (vs. active-low OE in SN74LVC126ADT) | Requires inverted OE control logic; otherwise identical pinout, specs, and package | Select when system OE signals are active-high or when consolidating with other LVC125-based designs. |
| 74LVC126PW,118 | NXP variant in TSSOP-14 package (PW); same electrical specs but different thermal resistance (RθJA = 150.8°C/W vs. 127.8°C/W for SOIC) | Suitable for space-constrained layouts; requires rework of solder paste profile due to MSL Level-1 vs. Level-2 | Choose for higher-density boards where SOIC footprint is prohibitive, accepting slightly reduced thermal margin. |
Compared with SN74LVC126ADT, SN74LVC125ADT offers identical buffering performance but demands active-high OE logic, while 74LVC126PW,118 provides identical functionality in a smaller TSSOP package at the cost of higher junction-to-ambient thermal resistance - making SN74LVC126ADT optimal for thermally demanding, through-hole-compatible, or legacy SOIC-replacement designs.
Availability
SN74LVC126ADT is available at Aetrix Electronics and suitable for industrial automation, automotive infotainment, and solid-state storage applications requiring stable component supply, extended temperature qualification, and long-term manufacturing continuity.
Supply support for SN74LVC126ADT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of experience in high-reliability logic and interface solutions.
The SN74LVC126ADT belongs to TI's LVC (Low-Voltage CMOS) logic family, engineered for low-power, high-speed, mixed-voltage interoperability in automotive, industrial, and computing systems.
FAQ
What is the maximum input voltage the SN74LVC126ADT can tolerate?
The SN74LVC126ADT accepts input voltages up to 5.5V regardless of VCC level - a key feature enabling direct interfacing with 5V logic families while operating from 1.65V–3.6V supplies. This tolerance is specified across the full temperature range (–40°C to +125°C) and does not require external clamping circuitry. The SN74LVC126ADT maintains this rating even when VCC is as low as 1.65V, supporting robust down-translation in heterogeneous systems.
Does the SN74LVC126ADT support hot-swap or live-insertion scenarios?
Yes - the SN74LVC126ADT supports hot-swap operation when OE pins are properly biased. To ensure outputs remain in high-impedance state during power-up/down, each OE must be tied to GND via a pulldown resistor (value determined by driver current capability). This prevents bus contention and back-driving of powered subsystems, making SN74LVC126ADT suitable for modular backplanes and field-replaceable I/O cards where live insertion is required.
What is the recommended bypass capacitor for the SN74LVC126ADT VCC pin?
Texas Instruments recommends a 0.1µF ceramic capacitor placed as close as possible to the VCC pin (Pin 14) of the SN74LVC126ADT, with short, low-inductance traces to GND (Pin 7). For improved high-frequency noise suppression, a parallel combination of 0.1µF and 1µF capacitors is acceptable. This bypassing strategy minimizes supply ripple and prevents logic glitches caused by simultaneous switching noise - especially critical given the SN74LVC126ADT's 24mA per-output drive capability.
Can the SN74LVC126ADT be used as a level shifter between 5V and 3.3V systems?
Yes - the SN74LVC126ADT functions as a unidirectional down-translator: 5V-tolerant inputs accept 5V signals while VCC is set to 3.3V, producing 3.3V-compatible outputs. It does not support bidirectional translation or 3.3V-to-5V up-shifting. For reliable operation, ensure OE is asserted only after both VCC and input signals are stable; the SN74LVC126ADT's input structure inherently blocks reverse current flow, eliminating need for external diodes or resistors in this configuration.
What is the thermal resistance (RθJA) of the SN74LVC126ADT in its SOIC package?
The SN74LVC126ADT in the SOIC (D) package has a junction-to-ambient thermal resistance (RθJA) of 127.8°C/W, measured per JESD 51-7. This value assumes standard JEDEC high-K test board conditions. In real-world PCB layouts with 2–4 internal copper layers and thermal vias near the GND pad, actual RθJA may improve by 20–40°C/W. The SN74LVC126ADT's 500mW maximum power dissipation limit implies a safe ambient temperature ceiling of ~87°C at full load under nominal RθJA.
SN74LVC126ADT Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LVC
- Package/Case:
- 14-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 4
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 24mA, 24mA
- Voltage - Supply:
- 1.65V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 14-SOIC
SN74LVC126ADT FAQ
1.How can I place an order for SN74LVC126ADT through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LVC126ADT on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LVC126ADT reliable?
The price and inventory of SN74LVC126ADT are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LVC126ADT is usually 5 days.
3.What payment methods are accepted for SN74LVC126ADT?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LVC126ADT transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LVC126ADT?
SN74LVC126ADT orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LVC126ADT order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LVC126ADT?
For technical support, including SN74LVC126ADT datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LVC126ADT requirements.
6.How does Aetrix verify that SN74LVC126ADT is sourced from the original manufacturer or authorized distributors?
All SN74LVC126ADT products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LVC126ADT meets industry standards.
7.What is the process for return or replacement of SN74LVC126ADT?
All SN74LVC126ADT units undergo pre-shipment inspection (PSI). If there is an issue with SN74LVC126ADT, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LVC126ADT part is unused and in its original packaging.
Return procedure for SN74LVC126ADT:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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