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Home > Products > Integrated Circuits (ICs) > Logic > Signal Switches, Multiplexers, Decoders

Texas Instruments SN74LVC138ADB

Name: SN74LVC138ADB
Brand: Texas Instruments
SKU: SN74LVC138ADB
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: SN74LVC138ADB

Manufacturer:: Texas Instruments

Category:: Signal Switches, Multiplexers, Decoders

Package:: 16-SSOP (0.209", 5.30mm Width)

Datasheet:: SN74LVC138ADB.pdf

Description:: DECODER/DRIVER, LVC/LCX/Z SERIES

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Product details

Overview

SN74LVC138ADB from Texas Instruments is a 3-line to 8-line decoder/demultiplexer designed for 1.65-V to 3.6-V V_CC operation in surface-mount D-package (SOIC-16). It features three binary select inputs (A, B, C), two active-low enable inputs (G2A, G2B), one active-high enable input (G1), and eight active-low decoded outputs (Y0–Y7). With typical propagation delay of 6.7 ns at V_CC = 3.3 V, it supports high-speed memory decoding and data routing in compact logic systems.

For engineers reviewing the SN74LVC138ADB datasheet, SN74LVC138ADB pinout, SN74LVC138ADB application, or SN74LVC138ADB equivalent, this device is selected for low-voltage mixed-signal interfacing, address decoding in microcontroller peripherals, and demultiplexing control signals where 3.3-V/5-V level translation and sub-7-ns timing are required.

Technical Context

The SN74LVC138ADB implements positive-logic decoding with three enable inputs enabling hierarchical expansion-two active-low enables (G2A, G2B) and one active-high enable (G1) allow cascading without external inverters for up to 24-line decoding. Its EPIC™ submicron CMOS process ensures robust latch-up immunity (>250 mA per JESD 17) and ESD protection (>2000 V HBM).

All inputs tolerate 5.5-V signals, enabling direct interfacing with 5-V logic while operating from 1.65-V to 3.6-V supplies. Outputs drive ±24 mA at V_CC = 3.0 V with VOH ≥ 2.2 V and VOL ≤ 0.55 V, supporting TTL- and CMOS-compatible loads across industrial temperature range (–40°C to 85°C).

Key Specifications

Parameter	Value and Actual Design Meaning
V_CC Range	1.65 V to 3.6 V - Enables operation in modern low-voltage embedded systems and compatibility with 1.8-V, 2.5-V, and 3.3-V rails.
Propagation Delay (t_pd)	6.7 ns max at V_CC = 3.3 V - Supports address decoding in systems with ≤150-MHz clock domains without adding critical path latency.
Input Voltage Tolerance	Up to 5.5 V - Allows direct connection to legacy 5-V controllers or buses without level-shifting circuitry.
Output Drive Strength	±24 mA at V_CC = 3.0 V - Sufficient to drive multiple 74LVC inputs or small LED indicators without external buffers.
Operating Temperature	–40°C to +85°C - Qualified for industrial-grade applications including motor control, PLC I/O modules, and instrumentation.
Power Dissipation Capacitance	27 pF at V_CC = 3.3 V - Predictable dynamic power consumption for thermal modeling in dense PCB layouts.

Pinout & Package

SN74LVC138ADB uses a 16-pin SOIC (D) package with 1.27-mm pitch, 10.3-mm body width, and standard JEDEC MS-012AC footprint. Pin numbering follows top-view orientation with Pin 1 at bottom-left corner.

Pin/Terminal	Circuit Role	Design Meaning
1 (G2A)	Active-low enable input	Enables decoding only when low; used for hierarchical selection in multi-device address maps.
2 (G2B)	Active-low enable input	Second enable for modular expansion; both G2A and G2B must be low for device activation.
3 (G1)	Active-high enable input	Primary enable signal; high activates decoding; simplifies interface with microcontroller GPIOs.
4 (C)	Binary select input	Highest-order address bit (A2) in 3-bit decode; determines output Y4–Y7 vs Y0–Y3 grouping.
5 (B)	Binary select input	Middle address bit (A1); combined with A and C, fully selects one of eight outputs.
6 (A)	Binary select input	Lowest-order address bit (A0); defines even/odd output pair within each quadrant.
7 (Y0)	Active-low decoded output	Asserted low when A=B=C=0 and all enables active; drives peripheral chip-select lines directly.
8 (GND)	Ground reference	Return path for all internal logic and output currents; requires low-impedance PCB plane connection.
9 (Y1)	Active-low decoded output	Asserted low for A=1, B=C=0; used for discrete peripheral enable in multi-device memory maps.
10 (Y2)	Active-low decoded output	Asserted low for A=0, B=1, C=0; supports selective activation of UART, SPI, or GPIO expanders.
11 (Y3)	Active-low decoded output	Asserted low for A=B=1, C=0; commonly assigned to sensor interface or ADC channel selection.
12 (Y4)	Active-low decoded output	Asserted low for A=B=0, C=1; enables upper half of 8-device address space in modular designs.
13 (Y5)	Active-low decoded output	Asserted low for A=1, B=0, C=1; used in FPGA configuration or CPLD I/O expansion schemes.
14 (Y6)	Active-low decoded output	Asserted low for A=0, B=1, C=1; supports dual-bank memory or dual-display controller selection.
15 (Y7)	Active-low decoded output	Asserted low for A=B=C=1; final output in full decode sequence; often tied to system reset or watchdog enable.
16 (V_CC)	Supply voltage	Single 1.65–3.6-V rail powers all logic and outputs; decoupling capacitor (100 nF) required adjacent to Pin 16.

Key Features

Feature	Design Value
3.3-V/5-V input tolerance	Accepts 5.5-V inputs while powered from 1.65–3.6-V supply-eliminates level shifters in mixed-voltage MCU systems.
Three enable inputs (2× active-low, 1× active-high)	Enables seamless 24-line decoding without external inverters and reduces gate count in address expansion trees.
Sub-7-ns propagation delay at 3.3 V	Meets timing budgets in 100-MHz+ microcontroller bus cycles and synchronous peripheral interfaces.
±24-mA output drive at 3.0 V	Drives up to 10 LVC inputs or small capacitive loads (≤30 pF) without signal degradation or added delay.
Industrial temperature range (–40°C to +85°C)	Validated for use in factory automation, industrial HMI, and outdoor telemetry equipment without derating.

Applications

Microcontroller Address Decoding	FPGA I/O Expansion
Use Scenario: A Cortex-M4 microcontroller with limited GPIOs routes memory-mapped peripherals via 3-bit address lines to SN74LVC138ADB. IC Role / Device Role / Timing Role: Address decoder mapping A0–A2 to eight chip-select lines for SPI flash, EEPROM, CAN transceiver, and analog front-end ICs. Use Value: Reduces firmware complexity by eliminating software-based chip selection and guarantees deterministic <6.7-ns decode latency.	Use Scenario: An Artix-7 FPGA configures eight external ADCs using parallel control lines, requiring discrete enable signals per device. IC Role / Device Role / Timing Role: Demultiplexer converting single FPGA output into eight independent active-low ADC conversion triggers. Use Value: Enables simultaneous sampling across channels with hardware-synchronized enable edges and no FPGA resource overhead.
Industrial Sensor Hub	Legacy Bus Interface Translation
Use Scenario: A programmable logic controller (PLC) backplane connects 8 analog input modules, each enabled by a dedicated line. IC Role / Device Role / Timing Role: Decoder translating 3-bit DIP-switch settings into individual module enable signals under real-time OS control. Use Value: Provides deterministic, glitch-free module activation during hot-swap events and supports field-reconfigurable I/O mapping.	Use Scenario: A 5-V RS-485 transceiver interface board must accept 3.3-V microcontroller control signals while driving 5-V logic-level peripherals. IC Role / Device Role / Timing Role: Level-translating demultiplexer enabling 3.3-V MCU to select among eight 5-V buffer ICs on the bus. Use Value: Eliminates discrete MOSFET translators and maintains signal integrity with <1-ns skew between outputs.

Microcontroller Address Decoding

FPGA I/O Expansion

Use Scenario: A Cortex-M4 microcontroller with limited GPIOs routes memory-mapped peripherals via 3-bit address lines to SN74LVC138ADB.

IC Role / Device Role / Timing Role: Address decoder mapping A0–A2 to eight chip-select lines for SPI flash, EEPROM, CAN transceiver, and analog front-end ICs.

Use Value: Reduces firmware complexity by eliminating software-based chip selection and guarantees deterministic <6.7-ns decode latency.

Use Scenario: An Artix-7 FPGA configures eight external ADCs using parallel control lines, requiring discrete enable signals per device.

IC Role / Device Role / Timing Role: Demultiplexer converting single FPGA output into eight independent active-low ADC conversion triggers.

Use Value: Enables simultaneous sampling across channels with hardware-synchronized enable edges and no FPGA resource overhead.

Industrial Sensor Hub

Legacy Bus Interface Translation

Use Scenario: A programmable logic controller (PLC) backplane connects 8 analog input modules, each enabled by a dedicated line.

IC Role / Device Role / Timing Role: Decoder translating 3-bit DIP-switch settings into individual module enable signals under real-time OS control.

Use Value: Provides deterministic, glitch-free module activation during hot-swap events and supports field-reconfigurable I/O mapping.

Use Scenario: A 5-V RS-485 transceiver interface board must accept 3.3-V microcontroller control signals while driving 5-V logic-level peripherals.

IC Role / Device Role / Timing Role: Level-translating demultiplexer enabling 3.3-V MCU to select among eight 5-V buffer ICs on the bus.

Use Value: Eliminates discrete MOSFET translators and maintains signal integrity with <1-ns skew between outputs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-to-8 decoder/demultiplexer applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
74LVC138AD	Same pinout and function but rated for 1.65–3.3-V V_CC; lacks 3.6-V absolute max rating and 5.5-V input tolerance.	Suitable only for strictly 3.3-V systems; not recommended for mixed 3.3-V/5-V environments.	Select SN74LVC138ADB when interfacing with 5-V sources or operating near 3.6-V supply limits.
SN74LV138AD	Lower drive strength (±6 mA), higher propagation delay (12 ns), and narrower V_CC range (2.0–5.5 V); no 1.65-V support.	Better suited for 5-V legacy systems; insufficient for low-power 1.8-V microcontrollers or fast timing-critical paths.	Choose SN74LVC138ADB for sub-7-ns timing, 1.65-V operation, and 5-V tolerant inputs in modern embedded designs.

Compared with 74LVC138AD and SN74LV138AD, SN74LVC138ADB uniquely combines 1.65-V minimum supply, 5.5-V input tolerance, and 6.7-ns propagation delay-making it the only option qualified for energy-efficient, mixed-voltage, high-timing-margin applications.

Availability

SN74LVC138ADB is available at Aetrix Electronics and suitable for industrial control systems, microcontroller peripheral expansion, and FPGA I/O management requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for SN74LVC138ADB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of innovation in high-reliability logic families.

The SN74LVC138ADB belongs to TI's LVC (Low-Voltage CMOS) logic family, engineered for low-voltage operation, high noise immunity, and seamless interoperability across mixed-supply digital systems.

FAQ

What is the minimum supply voltage required for reliable operation of the SN74LVC138ADB?

The SN74LVC138ADB operates reliably down to 1.65 V, as specified in its recommended operating conditions. At this voltage, it maintains valid logic thresholds, guaranteed output drive (±4 mA), and functional decoding behavior across the full –40°C to +85°C temperature range. Operation below 1.65 V may result in undefined outputs or increased static current.

Can the SN74LVC138ADB safely interface with 5-V logic inputs without external level shifters?

Yes-the SN74LVC138ADB inputs are rated to 5.5 V regardless of V_CC, allowing direct connection to 5-V CMOS or TTL outputs. This capability is explicitly confirmed in the absolute maximum ratings and electrical characteristics tables of the official datasheet SCAS291I.

What is the maximum propagation delay of the SN74LVC138ADB at 3.3-V supply?

The maximum propagation delay (t_pd) of the SN74LVC138ADB is 6.7 ns when measured from any input (A, B, C, G1, G2A, or G2B) to any output (Y0–Y7) at V_CC = 3.3 V ± 0.3 V and T_A = 25°C, per the switching characteristics table in the SCAS291I datasheet.

Does the SN74LVC138ADB support cascading to decode more than eight outputs?

Yes-the SN74LVC138ADB supports hierarchical expansion using its three enable inputs. Two active-low enables (G2A, G2B) and one active-high enable (G1) allow building 24-line decoders without external inverters, and 32-line configurations with only one inverter, as documented in the functional description section of SCAS291I.

Is the SN74LVC138ADB pin-compatible with older 74LS138 or 74HC138 devices?

No-while functionally equivalent, the SN74LVC138ADB uses a different pinout than 74LS138 (which has G1/G2A/G2B on Pins 1/2/3) and 74HC138 (G1/G2A/G2B on Pins 1/2/3 but inverted output polarity). The SN74LVC138ADB places G2A/G2B/G1 on Pins 1/2/3 and outputs Y0–Y7 on Pins 7/9–15, requiring PCB layout revision for drop-in replacement.

SN74LVC138ADB Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: 74LVC

Package/Case:: 16-SSOP (0.209", 5.30mm Width)

Packaging:: Bulk

Product Status:: Active

Type:: Decoder/Demultiplexer

Circuit:: 1 x 3:8

Independent Circuits:: 1

Current - Output High, Low:: 24mA, 24mA

Voltage Supply Source:: Single Supply

Voltage - Supply:: 1.65V ~ 3.6V

Operating Temperature:: -40°C ~ 85°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 16-SSOP

SN74LVC138ADB FAQ

1.How can I place an order for SN74LVC138ADB through Aetrix?

Please submit a Request for Quotation (RFQ) for SN74LVC138ADB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SN74LVC138ADB reliable?

The price and inventory of SN74LVC138ADB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LVC138ADB is usually 5 days.

3.What payment methods are accepted for SN74LVC138ADB?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LVC138ADB transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SN74LVC138ADB?

SN74LVC138ADB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SN74LVC138ADB order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SN74LVC138ADB?

For technical support, including SN74LVC138ADB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LVC138ADB requirements.

6.How does Aetrix verify that SN74LVC138ADB is sourced from the original manufacturer or authorized distributors?

All SN74LVC138ADB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LVC138ADB meets industry standards.

7.What is the process for return or replacement of SN74LVC138ADB?

All SN74LVC138ADB units undergo pre-shipment inspection (PSI). If there is an issue with SN74LVC138ADB, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SN74LVC138ADB part is unused and in its original packaging.

Return procedure for SN74LVC138ADB:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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