Texas Instruments SN74LVC138AZQNR
- Part No.:
- SN74LVC138AZQNR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 20-VFBGA
- Datasheet:
-
SN74LVC138AZQNR.pdf
- Description:
- IC DECODER/DEMUX 1X3:8 20BGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SN74LVC138AZQNR from Texas Instruments is a 3-line to 8-line decoder/demultiplexer IC operating from 1.65 V to 3.6 V, featuring active-low G2A/G2B and active-high G1 enables, eight active-low outputs (Y0–Y7), and 5.8 ns max propagation delay at 3.3 V. It serves as a memory address decoder or LED column selector in industrial control logic.
For engineers reviewing the SN74LVC138AZQNR datasheet, SN74LVC138AZQNR pinout, SN74LVC138AZQNR application, or SN74LVC138AZQNR equivalent, key selection criteria include its 1.65–3.6 V supply range, 5.5 V-tolerant inputs, low propagation delay, BGA MICROSTAR JUNIOR (ZQN) package compatibility, and enable-input flexibility for cascaded decoding.
Technical Context
The SN74LVC138AZQNR implements standard 3-to-8 binary decoding with three select inputs (A, B, C) and three enable inputs (G1, G2A, G2B), where only one output goes LOW per valid input combination while all others remain HIGH. Its function table requires simultaneous assertion of G1 = HIGH and G2A = G2B = LOW to activate decoding.
Designed for high-speed memory systems and data routing, it supports mixed-voltage interfacing via 5.5 V-tolerant inputs and delivers sub-6 ns tpd at 3.3 V. The device uses CMOS technology with balanced drive strength and meets JESD 17 latch-up immunity (>250 mA).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.65 V to 3.6 V - Enables direct interface with 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Input Voltage Tolerance | Up to 5.5 V - Allows safe connection to legacy 5 V controllers or buses without external protection. |
| Max Propagation Delay | 5.8 ns at VCC = 3.3 V - Supports high-speed address decoding in ≤170 MHz memory access cycles. |
| Output Drive Strength | ±24 mA at VCC = 3.0 V - Sufficient to directly drive LED columns or TTL-compatible loads. |
| Operating Temperature | –40°C to +85°C - Qualified for industrial-grade embedded applications including factory automation. |
| ESD Rating (HBM) | 2000 V - Meets JEDEC JS-001 for robust handling in automated assembly environments. |
Pinout & Package
SN74LVC138AZQNR is packaged in a 20-pin BGA MICROSTAR JUNIOR (ZQN) with 4.00 mm × 3.00 mm body size and 0.5 mm pitch. Pin assignments follow JEDEC MO-220 standards and are validated per TI's ZQN package drawing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A | Select input A (LSB) | Binary address bit 0; determines output selection when enables are active. |
| B | Select input B | Binary address bit 1; used with A and C to generate 3-bit decode pattern. |
| C | Select input C (MSB) | Binary address bit 2; completes 3-bit input for full 8-output mapping. |
| G1 | Active-high enable | Primary enable; must be HIGH for any output to respond to select inputs. |
| G2A | Active-low enable A | Secondary enable; must be LOW to allow decoding; used for cascade control. |
| G2B | Active-low enable B | Third enable; must be LOW alongside G2A and G1 to activate outputs. |
| Y0–Y7 | Active-low decoded outputs | Only one output pulls LOW per valid input; others remain HIGH (open-drain behavior not present). |
| VCC | Power supply | Supplies core logic and I/O; requires local 0.1 µF bypass capacitor per TI layout guidelines. |
| GND | Ground reference | Return path for all signals and power; must be low-impedance for noise immunity. |
| NC | No internal connection | Pins B2, B3, D2, D3 - unused; must be left floating or tied to GND per design preference. |
Key Features
| Feature | Design Value |
|---|---|
| 3-to-8 decoding with enable control | Enables hierarchical addressing using G1/G2A/G2B to build 24- or 32-line decoders without external inverters. |
| 5.5 V-tolerant inputs | Eliminates need for level-shifting circuitry when interfacing with 5 V microcontrollers or FPGAs. |
| Sub-6 ns propagation delay | Reduces system-level timing budget overhead in high-speed memory subsystems and real-time control loops. |
| CMOS push-pull outputs | Provides rail-to-rail switching with ±24 mA drive, suitable for direct LED sinking or bus buffering. |
| Latch-up immunity >250 mA | Ensures reliability under transient overvoltage or ESD events per JESD 17 compliance. |
Applications
| LED Matrix Column Driver | Memory Address Decoder |
|---|---|
|
Use Scenario: Driving 8-column LED matrix displays in industrial HMIs or status panels. IC Role / Device Role / Timing Role: Low-side column selector that sequentially activates one Yx output per scan cycle. Use Value: Ensures only one column is enabled at a time, preventing current stacking and enabling uniform brightness control. |
Use Scenario: Decoding 3-bit address segments in microcontroller-based memory expansion. IC Role / Device Role / Timing Role: Translates upper address bits into chip-select signals for peripheral ICs (e.g., EEPROM, ADC). Use Value: Reduces MCU GPIO usage and eliminates software-based address decoding latency. |
| Industrial I/O Expander Interface | Factory Automation Logic Controller |
|
Use Scenario: Enabling discrete sensor or actuator groups in PLC backplanes. IC Role / Device Role / Timing Role: Selective activation of 8-channel relay drivers or opto-isolator banks. Use Value: Provides deterministic, glitch-free channel selection synchronized to control clock edges. |
Use Scenario: Implementing modular machine-state logic in packaging equipment or conveyor systems. IC Role / Device Role / Timing Role: State-dependent signal routing between motion controllers and safety interlocks. Use Value: Delivers predictable enable/disable sequencing critical for SIL-2 functional safety paths. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-to-8 decoder applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74HC138N | Wider VCC range (2 V–6 V), slower tpd (24 ns @ 4.5 V), non-5.5 V tolerant inputs | Suitable for legacy 5 V systems but incompatible with 1.8 V logic without level shifting | Choose when cost sensitivity outweighs speed and voltage flexibility requirements |
| 74LVC138PW | TSSOP-16 package (5.0 mm × 4.4 mm), identical electrical specs, no BGA footprint | Preferred for prototyping or space-constrained PCBs where BGA rework is impractical | Choose when manual assembly, test access, or thermal management favors exposed-pad SOIC alternatives |
Compared with SN74HC138N and 74LVC138PW, SN74LVC138AZQNR uniquely combines BGA miniaturization, 1.65 V operation, and 5.5 V input tolerance-making it optimal for compact, multi-voltage industrial controllers where board area and mixed-signal interoperability are critical.
Availability
SN74LVC138AZQNR is available at Aetrix Electronics and suitable for industrial I/O expansion, LED matrix driving, and memory address decoding requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SN74LVC138AZQNR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions with over 50 years of innovation in industrial and automotive electronics.
The SN74LVC138A product line delivers high-speed, low-voltage logic for memory decoding and data routing in space-constrained, power-sensitive industrial systems-designed specifically for reliable operation in harsh electromagnetic environments.
FAQ
What is the function of the G2A and G2B pins on the SN74LVC138AZQNR?
The G2A and G2B pins on the SN74LVC138AZQNR are active-low enable inputs. Both must be driven LOW, while G1 is held HIGH, for the decoder to respond to A/B/C select inputs. This dual-active-low enable architecture simplifies cascading multiple SN74LVC138AZQNR devices to create larger decoding trees without external inverters.
Can SN74LVC138AZQNR operate with a 1.8 V supply and interface with 5 V microcontrollers?
Yes, SN74LVC138AZQNR operates from 1.65 V to 3.6 V and accepts input voltages up to 5.5 V on all control pins. This allows direct connection to 5 V microcontrollers while powered from a 1.8 V rail-enabling seamless voltage translation in mixed-signal systems without external level shifters.
What is the maximum output sink current specification for SN74LVC138AZQNR at 3.3 V?
At VCC = 3.3 V, SN74LVC138AZQNR guarantees a minimum output sink current (IOL) of 24 mA per Y0–Y7 pin. This rating ensures reliable driving of LED columns, relay drivers, or TTL-compatible loads without external buffering in industrial control applications.
Does SN74LVC138AZQNR support hot insertion or live swapping in backplane systems?
No, SN74LVC138AZQNR does not include hot-swap protection features such as power-on reset, slew-rate limiting, or undervoltage lockout. Its absolute maximum ratings assume controlled power sequencing; use in live-insertion scenarios requires external protection circuitry per TI application report SLVA615.
How does the ZQN (BGA MICROSTAR JUNIOR) package of SN74LVC138AZQNR affect thermal performance?
The ZQN package of SN74LVC138AZQNR has a junction-to-board thermal resistance (RθJB) of 46.1°C/W and junction-to-ambient (RθJA) of 84°C/W. These values require adequate PCB copper pour and thermal vias beneath the package to maintain junction temperature within –40°C to +85°C operating limits during sustained 24 mA output loading.
SN74LVC138AZQNR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LVC
- Package/Case:
- 20-VFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Decoder/Demultiplexer
- Circuit:
- 1 x 3:8
- Independent Circuits:
- 1
- Current - Output High, Low:
- 24mA, 24mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 1.65V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-BGA MICROSTAR JUNIOR (4x3)
SN74LVC138AZQNR FAQ
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6.How does Aetrix verify that SN74LVC138AZQNR is sourced from the original manufacturer or authorized distributors?
All SN74LVC138AZQNR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LVC138AZQNR meets industry standards.
7.What is the process for return or replacement of SN74LVC138AZQNR?
All SN74LVC138AZQNR units undergo pre-shipment inspection (PSI). If there is an issue with SN74LVC138AZQNR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LVC138AZQNR part is unused and in its original packaging.
Return procedure for SN74LVC138AZQNR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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