Texas Instruments SN74LVC158APWR
- Part No.:
- SN74LVC158APWR
- Manufacturer:
- Texas Instruments
- Category:
- Signal Switches, Multiplexers, Decoders
- Package:
- 16-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SN74LVC158APWR.pdf
- Description:
- QUADRUPLE 2-LINE TO 1-LINE DATA
- Quantity:
- Payment:

- Shipping:

Inventory:3,052
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Product details
Overview
SN74LVC158APWR from Texas Instruments is a quadruple 2-line-to-1-line data selector/multiplexer with inverted outputs, operating across 1.1V–3.6V supply, supporting over-voltage tolerant inputs up to 5.5V, delivering ±24mA output drive at 3.3V, and achieving 6.4ns max propagation delay at 3.3V. It serves in digital bus routing, signal path selection, and logic-level multiplexing within low-voltage embedded control systems.
For engineers reviewing the SN74LVC158APWR datasheet, SN74LVC158APWR pinout, SN74LVC158APWR application, or SN74LVC158APWR equivalent, key selection criteria include its 16-pin TSSOP package, Ioff partial-power-down capability, inverted-output logic behavior, and compatibility with mixed-voltage interface domains requiring level-shifting tolerance.
Technical Context
The SN74LVC158APWR implements four independent 2:1 multiplexers sharing common A/B select and active-low strobe (G) control lines, with all outputs inverted per channel. Its CMOS input structure supports 5.5V-tolerant operation regardless of VCC, enabling safe interfacing with higher-voltage logic without external level shifters.
Each channel features balanced push-pull outputs capable of sourcing/sinking up to ±24mA at 3.3V, with propagation delays tightly specified down to 3.0ns (typical) at 3.3V/50pF load. The device incorporates Ioff protection to prevent back-drive current during partial power-down, meeting JESD78 latch-up immunity ≥100mA.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 1.1V to 3.6V - enables direct integration into 1.2V, 1.8V, 2.5V, and 3.3V logic domains without voltage translation |
| Input Voltage Tolerance | Up to 5.5V independent of VCC - allows safe connection to legacy 5V signals without damage or clamping diodes |
| Max Propagation Delay | 6.4ns at VCC = 3.3V, CL = 50pF - supports high-speed data routing in sub-10ns timing-critical paths |
| Output Drive Strength | ±24mA at 3.3V - drives moderate capacitive loads (≤50pF) and fan-out to multiple CMOS inputs without buffering |
| Ioff Protection | Enabled during partial power-down - prevents destructive current flow when VCC = 0V but inputs remain active |
| Latch-up Immunity | >100mA per JESD78 - ensures robustness against transient current faults in industrial environments |
| Operating Temperature | –40°C to +125°C - qualified for automotive under-hood and industrial control applications |
Pinout & Package
TSSOP-16 (PW) package: 5mm × 6.4mm body size, 0.65mm lead pitch, surface-mount, thermally enhanced with exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A/B) | Select control input | Common select line determining whether A or B input is routed to Y (low = A, high = B) |
| 2–3, 5–6, 10–11, 13–14 (1A–1B, 2A–2B, 3A–3B, 4A–4B) | Data inputs | Four independent pairs of 2:1 mux inputs; each pair feeds one channel |
| 4, 7, 9, 12 (1Y–4Y) | Inverted outputs | Active-low outputs - Y = NOT(A) when A/B = L, Y = NOT(B) when A/B = H |
| 8 (GND) | Ground reference | Primary return path for all logic and output currents; must be low-impedance |
| 15 (G) | Strobe enable | Active-low global enable - G = H forces all Y outputs high (inverted disable state) |
| 16 (VCC) | Power supply | Single positive supply for entire device; bypassing with 0.1µF capacitor required near pin |
Key Features
| Feature | Design Value |
|---|---|
| Inverted-output architecture | Eliminates need for external inverters in active-low bus enable or enable-gated logic paths |
| Over-voltage tolerant inputs | Accepts 5.5V signals while powered from 1.8V or 2.5V - simplifies mixed-voltage system interconnect |
| Ioff partial-power-down protection | Blocks current flow between powered and unpowered sections - critical for hot-swap and power-gating designs |
| High-output drive strength | ±24mA at 3.3V enables direct driving of transmission lines or multiple gate inputs without buffers |
| Low propagation delay variation | 6.4ns max at 3.3V with tight 3.0ns typical - ensures deterministic timing across temperature and voltage |
Applications
| Bus Data Selection | Logic-Level Multiplexing |
|---|---|
Use Scenario: Selecting between two 4-bit peripheral data buses (e.g., SPI flash vs. EEPROM) connected to a microcontroller's data port. IC Role / Device Role / Timing Role: Quad 2:1 mux routes parallel data lines with synchronized A/B and G control, providing cycle-accurate bus arbitration. Use Value: Reduces PCB layer count by consolidating four independent selectors into one 16-pin IC, eliminating four discrete gates or a larger CPLD. | Use Scenario: Enabling/disabling four independent control signals (e.g., reset, chip select, interrupt, clock enable) based on mode register bits. IC Role / Device Role / Timing Role: Acts as programmable signal router where A/B selects source and G enables output assertion with inversion. Use Value: Inverted outputs directly match active-low reset or chip-select requirements, removing external inverters and saving board space. |
| Low-Voltage Interface Translation | Hot-Swappable Module Control |
Use Scenario: Interfacing a 5V sensor subsystem to a 1.8V FPGA I/O bank while maintaining signal integrity and voltage safety. IC Role / Device Role / Timing Role: Input-tolerant mux passes 5V logic levels safely to downstream 1.8V logic, leveraging built-in clamping and level-agnostic operation. Use Value: Avoids dedicated level translators; eliminates risk of input overvoltage damage during power sequencing mismatches. | Use Scenario: Controlling power-enable and status lines for field-replaceable modules in telecom line cards with dynamic insertion/removal. IC Role / Device Role / Timing Role: Ioff-enabled mux isolates module-side signals during VCC ramp-up/down, preventing back-drive into live backplane logic. Use Value: Ensures system-level fault containment and meets IEC 61000-4-2 ESD immunity requirements without additional isolation circuitry. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2:1 multiplexer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC157APWR | Non-inverting outputs; identical pinout, supply range, and speed | Requires external inversion for active-low enable paths; unsuitable where inverted logic is mandatory | Select when system design requires true-pass (non-inverted) data routing |
| 74LVC257PW,118 | NXP variant with same function, 16-pin TSSOP, but no Ioff specification in public datasheet | Lacks documented partial-power-down protection - not recommended for hot-swap or multi-rail systems | Use only in fixed-power, single-supply applications where Ioff is not required |
Compared with SN74LVC157APWR and 74LVC257PW,118, the SN74LVC158APWR uniquely combines inverted outputs with Ioff and 5.5V input tolerance - making it the only choice for compact, mixed-voltage, hot-pluggable signal routing where output polarity and power-state isolation are both critical.
Availability
SN74LVC158APWR is available at Aetrix Electronics and suitable for industrial control panels, automotive body electronics, medical diagnostic interfaces, and IoT edge node designs requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SN74LVC158APWR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of leadership in industry-standard logic families and automotive-grade qualification.
The SN74LVC158APWR belongs to TI's LVC (Low-Voltage CMOS) logic family, designed specifically for high-speed, low-power, mixed-voltage digital interfacing in space-constrained industrial and automotive applications.
FAQ
What logic polarity does the SN74LVC158APWR implement on its outputs?
The SN74LVC158APWR provides inverted outputs: each Y output equals the logical inverse of the selected input (NOT(A) when A/B = L, NOT(B) when A/B = H). This is intrinsic to the device architecture - no configuration registers or mode pins alter this behavior. The SN74LVC158APWR output inversion is fixed and documented in the function table and logic diagram of its datasheet.
Can the SN74LVC158APWR safely interface a 5V signal while operating from a 1.8V supply?
Yes, the SN74LVC158APWR supports over-voltage tolerant inputs up to 5.5V independent of VCC. When powered from 1.8V, its inputs accept 5V logic levels without damage or external clamping. This capability is verified per datasheet Section 5.3 and enables direct connection to legacy 5V peripherals in modern low-voltage systems - a core design feature of the SN74LVC158APWR.
Does the SN74LVC158APWR support partial power-down, and how is it implemented?
Yes, the SN74LVC158APWR includes Ioff protection, which disables input/output paths when VCC = 0V to prevent back-drive current. This feature is enabled automatically - no external control is needed. During partial power-down, all I/O pins enter high-impedance state with leakage ≤±10µA, ensuring safe operation in multi-rail systems. This behavior is guaranteed per SN74LVC158APWR electrical characteristics Table 5.5.
What is the maximum capacitive load the SN74LVC158APWR can drive while maintaining specified timing?
The SN74LVC158APWR is characterized for loads up to 50pF, with switching specifications (e.g., 6.4ns max tpd) guaranteed at CL = 50pF and VCC = 3.3V. Driving larger capacitances increases propagation delay and may degrade noise margins. For reliable operation, keep total output load ≤50pF - including trace capacitance, probe effects, and receiver input capacitance - as confirmed in SN74LVC158APWR Application Section 8.2.1.1.
How does the strobe (G) pin function in the SN74LVC158APWR?
The G pin is an active-low strobe that globally enables or disables all four multiplexer outputs. When G = L, outputs respond to A/B and data inputs; when G = H, all Y outputs are forced HIGH (due to inversion, this is the disabled state). This behavior is defined in the function table and applies uniformly across all channels - a key timing and control feature of the SN74LVC158APWR.
SN74LVC158APWR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LVC
- Package/Case:
- 16-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Data Selector/Multiplexer
- Circuit:
- 4 x 2:1
- Independent Circuits:
- 1
- Current - Output High, Low:
- 24mA, 24mA
- Voltage Supply Source:
- Single Supply
- Voltage - Supply:
- 1.1V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TSSOP
SN74LVC158APWR FAQ
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5.How can I obtain technical support or documentation for SN74LVC158APWR?
For technical support, including SN74LVC158APWR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LVC158APWR requirements.
6.How does Aetrix verify that SN74LVC158APWR is sourced from the original manufacturer or authorized distributors?
All SN74LVC158APWR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LVC158APWR meets industry standards.
7.What is the process for return or replacement of SN74LVC158APWR?
All SN74LVC158APWR units undergo pre-shipment inspection (PSI). If there is an issue with SN74LVC158APWR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LVC158APWR part is unused and in its original packaging.
Return procedure for SN74LVC158APWR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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