Texas Instruments SN74LVC1G126DBVR
- Part No.:
- SN74LVC1G126DBVR
- Manufacturer:
- Texas Instruments
- Package:
- SC-74A, SOT-753
- Datasheet:
-
SN74LVC1G126DBVR.pdf
- Description:
- IC BUF NON-INVERT 5.5V SOT23-5
- Quantity:
- Payment:

- Shipping:

Inventory:33,452
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74LVC1G126 from Texas Instruments is a single non-inverting bus buffer gate with 3-state output, designed for bidirectional data isolation and level translation in low-voltage digital systems. It operates from 1.65V to 5.5V VCC, accepts inputs up to 5.5V, delivers ±24mA drive at 3.3V, achieves 3.7ns max propagation delay, and supports live insertion via Ioff. It is used in high-speed data acquisition paths and video infrastructure signal routing.
For engineers reviewing the SN74LVC1G126 datasheet, SN74LVC1G126 pinout, SN74LVC1G126 application, or SN74LVC1G126 equivalent, key selection criteria include 3-state control timing (ten/tdis), overvoltage-tolerant inputs, Ioff-enabled partial power-down behavior, and SOT-23-5 package compatibility with space-constrained PCB layouts.
Technical Context
The SN74LVC1G126 implements a CMOS-based non-inverting buffer with active-high output-enable logic. Its 3-state output is fully controlled by the OE input: when OE = L, Y enters high-impedance; when OE = H, Y mirrors A. Input structure includes overvoltage tolerance (up to 5.5V) independent of VCC, enabling down-translation from higher-voltage domains.
It features balanced CMOS output drivers capable of sourcing and sinking equal current (±24mA at 3.3V), with Ioff circuitry that disables all outputs when VCC = 0V-preventing back-drive and supporting hot-plug operation. The device meets JESD78 Class II latch-up immunity (>100mA) and supports –40°C to 125°C operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65V to 5.5V - enables interoperability across 1.8V, 2.5V, 3.3V, and 5V logic domains |
| Input Voltage Max | 5.5V - allows direct connection to 5V signals without external level shifters |
| tpd (max) | 3.7ns at VCC = 3.3V, CL = 15pF - supports >200MHz data rates in short trace applications |
| Output Drive | ±24mA at VCC = 3.3V - sufficient to drive 50Ω transmission lines or multiple CMOS loads |
| Ioff Current | ±10μA at VI/VO = 5.5V - ensures safe isolation during partial power-down or board hot-swap |
| ICC (max) | 10μA - minimizes quiescent power in always-on system management circuits |
| Operating Temp | –40°C to +125°C - qualified for industrial and automotive under-hood environments |
Pinout & Package
SN74LVC1G126DBVR uses the DBV (SOT-23-5) package: 2.9mm × 2.8mm footprint, 2.9mm × 1.6mm body, 5-pin surface-mount configuration with gull-wing leads.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - OE | Active-high output enable input | Drives Y into high-Z when low; must be tied to GND at power-up to prevent bus contention |
| 2 - A | Non-inverting data input | Accepts voltages up to 5.5V regardless of VCC; no external clamping required |
| 3 - GND | Ground reference | Return path for all internal logic and output current; requires low-inductance connection |
| 4 - Y | 3-state buffered output | True replica of A when OE = H; high-impedance when OE = L; drives ±24mA at 3.3V |
| 5 - VCC | Positive supply | Supplies core logic and output drivers; requires local 0.1μF bypass capacitor per TI layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| NanoFree™ packaging | DBV (SOT-23-5) footprint eliminates bond wires and die pad - reduces parasitic inductance for cleaner switching |
| Overvoltage-tolerant inputs | Accepts 0–5.5V on A/OE pins while VCC = 1.65–5.5V - enables seamless interfacing between mixed-voltage subsystems |
| Ioff partial-power-down | Outputs disable automatically when VCC = 0V - prevents back-driving and signal corruption during hot-insertion |
| Low ICC and Cpd | 10μA max ICC and 19pF typical Cpd - ideal for battery-backed monitoring and always-on wake-up logic |
| High-speed 3-state control | ten = 1.2ns, tdis = 1.0ns (VCC = 3.3V) - minimizes bus turnaround time in shared-data-path architectures |
Applications
| Cable Modem Termination | Video Infrastructure Routing |
|---|---|
|
Use Scenario: Isolating DOCSIS upstream/downstream data paths between RF front-end and baseband processor. IC Role / Device Role / Timing Role: Bidirectional 3-state buffer controlling signal flow direction on shared serial bus; OE synchronized to MAC layer frame boundaries. Use Value: Prevents signal contention during channel reconfiguration; ±24mA drive ensures robust edge integrity across 75Ω coax traces. |
Use Scenario: Managing multi-format video signal routing in IP-based transcoder chassis with hot-swappable line cards. IC Role / Device Role / Timing Role: Bus isolator enabling dynamic reassignment of HDMI/SDI/ASI data lanes without system reset. Use Value: Ioff protection prevents back-drive damage during card insertion; 5.5V-tolerant inputs accept legacy 5V sync signals directly. |
| Military Radar Signal Conditioning | Industrial Motor Control Interface |
|
Use Scenario: Buffering ADC sample clocks and trigger signals in phased-array radar front-ends operating at –40°C to +125°C. IC Role / Device Role / Timing Role: Low-jitter, high-reliability signal repeater ensuring deterministic timing between FPGA and analog subsystems. Use Value: 3.7ns tpd and <10μA ICC maintain timing margin and thermal headroom in sealed, conduction-cooled enclosures. |
Use Scenario: Interfacing isolated gate drivers with microcontroller PWM outputs in high-voltage motor inverters. IC Role / Device Role / Timing Role: Level-translating buffer isolating 3.3V MCU GPIO from 5V-compatible driver enable inputs. Use Value: 5.5V input tolerance eliminates external level shifters; 125°C rating matches IGBT driver thermal environment. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bus buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC1G125DBVR | Inverting logic (A → NOT Y); identical electrical specs, pinout, and package | Requires inverted control logic or additional inversion stage in non-inverting signal paths | Select only when system-level logic polarity mandates inversion; otherwise, SN74LVC1G126 provides true buffering without added gates |
| SN74AUP1G126DBVR | Lower ICC (500nA typ), slower tpd (5.8ns max at 3.3V), wider VCC range (0.8–3.6V) | Better suited for ultra-low-power battery sensors; not rated for 5V operation or 5.5V inputs | Choose SN74LVC1G126 for 5V-tolerant, high-speed, industrial-temp applications; select AUP variant only for sub-1μA standby-critical designs |
Compared with 74LVC1G125DBVR and SN74AUP1G126DBVR, the SN74LVC1G126 uniquely combines non-inverting function, 5.5V input tolerance, 3.7ns speed, and 125°C operation - making it the only option among the three qualified for mixed-voltage, high-reliability embedded control buses.
Availability
SN74LVC1G126 is available at Aetrix Electronics and suitable for cable modem termination systems, video infrastructure routing, military radar signal conditioning, industrial motor control interfaces, and high-speed data acquisition requiring stable component supply across extended temperature ranges.
Supply support for SN74LVC1G126 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with decades of leadership in industry-standard logic families.
The SN74LVC1G126 belongs to TI's LVC (Low-Voltage CMOS) logic portfolio, engineered for voltage translation, bus isolation, and signal integrity preservation in space- and power-constrained digital systems.
FAQ
What is the maximum input voltage the SN74LVC1G126 can tolerate?
The SN74LVC1G126 supports input voltages up to 5.5V on both A and OE pins, regardless of VCC level - enabling direct interface with 5V signals even when powered from 1.8V or 2.5V. This overvoltage tolerance is implemented via internal protection circuitry without positive clamp diodes, and must not exceed the Absolute Maximum Rating of 5.5V to avoid permanent damage.
Does the SN74LVC1G126 support hot-plug or live insertion?
Yes, the SN74LVC1G126 supports live insertion through its Ioff feature: when VCC = 0V, all outputs are disabled and leakage is limited to ±10μA, preventing back-drive into powered circuitry. This allows safe insertion into partially powered backplanes or modular systems - a capability confirmed in TI's Electrical Characteristics table and Feature Description section.
What is the recommended bypass capacitor for the SN74LVC1G126?
Texas Instruments recommends a 0.1μF ceramic capacitor placed as close as possible between VCC and GND pins of the SN74LVC1G126. Layout best practices require short, wide traces to minimize inductance, and placement on the same PCB side as the device. For broadband noise suppression, a parallel 1μF capacitor may also be added per TI Application Note SLMA002.
Can the SN74LVC1G126 drive a 50Ω transmission line directly?
Yes - the SN74LVC1G126 delivers ±24mA output drive at 3.3V, which is sufficient to drive a 50Ω load with ~1.2V swing (VOL ≈ 0.55V, VOH ≈ 2.75V). However, TI recommends adding a small series resistor (e.g., 10–22Ω) near the output to dampen reflections, especially for traces longer than 12cm or when driving unterminated lines.
Is the SN74LVC1G126 pin-compatible with other single-gate buffers in SOT-23-5?
Yes - the SN74LVC1G126DBVR shares identical pinout (OE-A-GND-Y-VCC) and footprint with TI's 74LVC1G125DBVR, 74LVC1G07DBVR, and 74LVC1G08DBVR in the DBV package. This enables drop-in functional substitution where logic function (non-inverting buffer) and electrical specs align, though design validation is required for timing and drive strength compatibility.
SN74LVC1G126DBVR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LVC
- Package/Case:
- SC-74A, SOT-753
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 32mA, 32mA
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-23-5
SN74LVC1G126DBVR FAQ
1.How can I place an order for SN74LVC1G126DBVR through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LVC1G126DBVR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LVC1G126DBVR reliable?
The price and inventory of SN74LVC1G126DBVR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LVC1G126DBVR is usually 5 days.
3.What payment methods are accepted for SN74LVC1G126DBVR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LVC1G126DBVR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LVC1G126DBVR?
SN74LVC1G126DBVR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LVC1G126DBVR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LVC1G126DBVR?
For technical support, including SN74LVC1G126DBVR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LVC1G126DBVR requirements.
6.How does Aetrix verify that SN74LVC1G126DBVR is sourced from the original manufacturer or authorized distributors?
All SN74LVC1G126DBVR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LVC1G126DBVR meets industry standards.
7.What is the process for return or replacement of SN74LVC1G126DBVR?
All SN74LVC1G126DBVR units undergo pre-shipment inspection (PSI). If there is an issue with SN74LVC1G126DBVR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LVC1G126DBVR part is unused and in its original packaging.
Return procedure for SN74LVC1G126DBVR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74LVC1G126DBVR Tags
-
SN74LVC1G17DBVR
Texas Instruments
-
SN74LVC1G07DCKR
Texas Instruments
-
SN74LVC1G17DCKR
Texas Instruments
-
SN74LVC1G07DBVR
Texas Instruments
-
SN74LVC1G125DCKR
Texas Instruments
-
SN74AHCT1G126DBVR
Texas Instruments
-
SN74LVC1G125DBVR
Texas Instruments
-
SN74AHCT1G125DBVR
Texas Instruments

-
SN74LVC2G17DBVR
Texas Instruments

-
SN74LVC2G07DCKR
Texas Instruments
-
SN74LVC1G34DCKR
Texas Instruments

-
SN74LVC2G17DCKR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
