Texas Instruments SN74LVC1G58DCKRE4
- Part No.:
- SN74LVC1G58DCKRE4
- Manufacturer:
- Texas Instruments
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
SN74LVC1G58DCKRE4.pdf
- Description:
- IC MULTI-FUNC GATE CONFIG SC70-6
- Quantity:
- Payment:

- Shipping:

Inventory:4,436
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SN74LVC1G58DCKRE4 from Texas Instruments is a configurable single-gate logic IC supporting AND, OR, NAND, NOR, XOR, inverter, and noninverter functions via three input pins (In0–In2) with Schmitt-trigger inputs, 1.65–5.5 V operation, 6.3 ns max propagation delay at 3.3 V, and ±24 mA output drive - used in level translation, signal conditioning, and flexible logic routing in space-constrained portable electronics.
For engineers reviewing the SN74LVC1G58DCKRE4 datasheet, SN74LVC1G58DCKRE4 pinout, SN74LVC1G58DCKRE4 application, or SN74LVC1G58DCKRE4 equivalent, key selection criteria include its 6-pin SC70 package, Ioff-enabled live insertion support, hysteresis-based noise immunity (ΔVT = 0.53–1.11 V), 10 µA max ICC, and compatibility with mixed-voltage systems requiring down-translation to VCC.
Technical Context
The SN74LVC1G58DCKRE4 implements a 3-input lookup table architecture where In2/In1/In0 select one of eight output states per the function table, enabling reconfigurable combinational logic without external programming. Its Schmitt-trigger inputs provide distinct VT+ (1.5–2.74 V) and VT– (0.35–2.29 V) thresholds for robust noise rejection in noisy environments.
It features Ioff circuitry that disables outputs during partial power-down, preventing back-drive current when VCC = 0 V, and supports live insertion in hot-swap applications. All inputs tolerate up to 5.5 V regardless of VCC, enabling seamless interfacing between 1.8 V, 2.5 V, 3.3 V, and 5 V domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 1.65 V to 5.5 V - enables direct interface across common logic families without level shifters. |
| Max Propagation Delay | 6.3 ns at 3.3 V - ensures timing-critical signal routing in high-speed digital subsystems. |
| Output Drive | ±24 mA at 3.3 V - drives moderate capacitive loads or multiple CMOS inputs without buffering. |
| Input Hysteresis (ΔVT) | 0.53 V to 1.11 V - rejects noise on slow-rising/falling signals in industrial or automotive sensor interfaces. |
| Ioff Current | ±10 µA max - blocks damaging back-current during power sequencing or board hot-plug operations. |
| ESD Protection | 2000-V HBM, 200-V MM, 1000-V CDM - meets JEDEC JESD22-A114/A115/C101 for handling reliability. |
| Operating Temperature | –40°C to +125°C - qualified for under-hood automotive, industrial control, and extended-temperature embedded use. |
Pinout & Package
SN74LVC1G58DCKRE4 is packaged in a 6-pin SC70 (DCK) surface-mount package measuring 2.0 mm × 1.25 mm × 0.9 mm (max height), optimized for ultra-compact PCB layouts and automated assembly. Pin 1 is marked by a dot or notch on the top side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| In0 | Configurable logic input A | Low-order bit of 3-bit function selector; tied to VCC/GND to fix logic behavior. |
| In1 | Configurable logic input B | Mid-order bit of 3-bit function selector; determines gate type and inversion state. |
| In2 | Configurable logic input C | High-order bit of 3-bit function selector; enables full 8-function configurability. |
| Y | Configurable logic output | Single-ended CMOS output reflecting selected function; supports rail-to-rail swing. |
| GND | Ground reference | Return path for all internal logic and output currents; must be low-impedance. |
| VCC | Supply voltage | Power rail for logic core and output drivers; decoupling capacitor required near pin. |
Key Features
| Feature | Design Value |
|---|---|
| Configurable logic function | Eight selectable Boolean functions (AND/OR/NAND/NOR/XOR/inverter/noninverter) via static input configuration - eliminates need for multiple fixed-function gates. |
| Schmitt-trigger inputs | Asymmetric VT+ and VT– thresholds provide >500 mV hysteresis - suppresses chatter on slow or noisy control lines like pushbuttons or sensor outputs. |
| Ioff partial-power-down | Outputs enter high-impedance state when VCC = 0 V - enables safe insertion into powered-backplane systems without bus contention. |
| Voltage-level translation | Inputs accept up to 5.5 V while operating from 1.65 V VCC - allows direct connection to higher-voltage peripherals without external translators. |
| NanoFree™ packaging | Diesize equals package footprint (SC70) - reduces parasitic inductance/capacitance and improves high-frequency signal integrity. |
Applications
| Industrial Sensor Interface | Portable Power Management |
|---|---|
Use Scenario: Conditioning analog sensor outputs (e.g., thermistor, pressure transducer) before ADC sampling in battery-powered IoT nodes. IC Role / Device Role / Timing Role: Configured as inverter or buffer with Schmitt input to debounce mechanical switch closures or clean up noisy analog comparator outputs. Use Value: Eliminates external RC debounce networks and discrete logic, reducing BOM count and PCB area while improving ESD robustness. | Use Scenario: Enabling/disabling voltage rails or charging paths in wearables and medical patches using microcontroller GPIOs. IC Role / Device Role / Timing Role: Configured as AND gate with one input tied to MCU enable signal and another to system fault flag - acts as safety interlock. Use Value: Provides fail-safe power gating with built-in hysteresis to prevent oscillation during brown-out conditions. |
| Automotive Body Control | Test & Measurement Equipment |
Use Scenario: Signal routing and logic adaptation between 5 V legacy sensors and 3.3 V microcontrollers in door module ECUs. IC Role / Device Role / Timing Role: Configured as level-translating OR gate to combine multiple wake-up interrupt sources before MCU input. Use Value: Supports mixed-voltage domain integration without dedicated level translators, simplifying layout and reducing thermal load. | Use Scenario: Flexible signal conditioning in modular bench instruments where firmware-defined logic behavior replaces fixed hardware. IC Role / Device Role / Timing Role: Configured as XOR gate to generate differential clock enables or toggle test pattern generators. Use Value: Enables field-reprogrammable logic behavior via simple pin-strapping - avoids costly FPGA or CPLD usage in low-complexity instruments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar configurable logic gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G97DCKR | Same SC70-6 package and 1.65–5.5 V range, but uses different function encoding (In1/In2/Y only); no Schmitt inputs. | Lacks hysteresis - unsuitable for noisy environments or slow edges; better for clean digital signal routing. | Select SN74LVC1G97DCKR when Schmitt action is unnecessary and lower input capacitance (2.5 pF vs. 3.5 pF) is prioritized. |
| 74LVC1G57GW,125 | NXP variant in SOT353 (5-pin) package; identical function table and Schmitt inputs, but only 5 pins (no dedicated VCC pin - shares with In2). | Requires modified PCB layout; limited to 1.65–5.5 V but lacks Ioff support - not suitable for hot-swap. | Choose 74LVC1G57GW,125 only if board space is extremely constrained and partial-power-down is not required. |
Compared with SN74LVC1G97DCKR and 74LVC1G57GW,125, the SN74LVC1G58DCKRE4 uniquely combines Schmitt-trigger noise immunity, Ioff-enabled live insertion, and full 3-input configurability in a standard 6-pin SC70 - making it optimal for rugged, mixed-voltage, and field-upgradable logic applications.
Availability
SN74LVC1G58DCKRE4 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable power management, and automotive body control modules requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for SN74LVC1G58DCKRE4 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and logic solutions, with over 90 years of innovation in high-reliability, energy-efficient components.
The SN74LVC1G58DCKRE4 belongs to TI's LVC low-voltage CMOS logic family, designed specifically for space-constrained, multi-rail systems needing flexible, robust, and power-efficient signal conditioning and logic adaptation.
FAQ
What logic functions does the SN74LVC1G58DCKRE4 support?
The SN74LVC1G58DCKRE4 supports eight configurable logic functions: AND, OR, NAND, NOR, XOR, inverter, noninverter, and 2-input NAND with both inputs inverted. These are selected by applying specific high/low states to its three input pins (In0, In1, In2) per the function table in the datasheet. Each configuration is static - no dynamic reprogramming is required once pins are set.
Does the SN74LVC1G58DCKRE4 support level translation between different supply voltages?
Yes, the SN74LVC1G58DCKRE4 supports down-translation: its inputs accept voltages up to 5.5 V while operating from a VCC as low as 1.65 V. This allows direct interfacing between 5 V sensors and 1.8 V or 3.3 V microcontrollers without external level shifters - a key capability confirmed in the "Supports Down Translation to VCC" feature list and electrical characteristics table.
What is the purpose of the Ioff feature in the SN74LVC1G58DCKRE4?
The Ioff feature in the SN74LVC1G58DCKRE4 disables output drivers when VCC = 0 V, limiting off-state leakage to ±10 µA. This prevents damaging back-current flow through the device during hot insertion, partial power-down, or system maintenance - critical for backplane and modular electronics where boards may be swapped while other sections remain powered.
How does the Schmitt-trigger input improve noise immunity in the SN74LVC1G58DCKRE4?
The SN74LVC1G58DCKRE4 features asymmetric input thresholds: VT+ (1.5–2.74 V) for rising edges and VT– (0.35–2.29 V) for falling edges, yielding hysteresis (ΔVT) of 0.53–1.11 V. This prevents multiple toggles on slow or noisy signals - such as mechanical switch bounce or EMI-coupled sensor lines - ensuring clean, chatter-free logic transitions without external filtering.
Which package type is used for the SN74LVC1G58DCKRE4, and what are its dimensions?
The SN74LVC1G58DCKRE4 uses the SC70-6 (DCK) package: 2.0 mm × 1.25 mm × 0.9 mm (max height), with 0.65 mm lead pitch. It is RoHS-compliant, moisture-sensitive level 1 (unlimited floor life), and marked "CPF". This ultra-small outline package enables high-density routing in portable, wearable, and miniaturized industrial electronics.
SN74LVC1G58DCKRE4 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- 74LVC
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Logic Type:
- Configurable Multiple Function
- Number of Circuits:
- 1
- Number of Inputs:
- 3
- Schmitt Trigger Input:
- No
- Output Type:
- Single-Ended
- Current - Output High, Low:
- 32mA, 32mA
- Voltage - Supply:
- 1.65V ~ 5.5V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SC-70-6
SN74LVC1G58DCKRE4 FAQ
1.How can I place an order for SN74LVC1G58DCKRE4 through Aetrix?
Please submit a Request for Quotation (RFQ) for SN74LVC1G58DCKRE4 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SN74LVC1G58DCKRE4 reliable?
The price and inventory of SN74LVC1G58DCKRE4 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SN74LVC1G58DCKRE4 is usually 5 days.
3.What payment methods are accepted for SN74LVC1G58DCKRE4?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SN74LVC1G58DCKRE4 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SN74LVC1G58DCKRE4?
SN74LVC1G58DCKRE4 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SN74LVC1G58DCKRE4 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SN74LVC1G58DCKRE4?
For technical support, including SN74LVC1G58DCKRE4 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SN74LVC1G58DCKRE4 requirements.
6.How does Aetrix verify that SN74LVC1G58DCKRE4 is sourced from the original manufacturer or authorized distributors?
All SN74LVC1G58DCKRE4 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SN74LVC1G58DCKRE4 meets industry standards.
7.What is the process for return or replacement of SN74LVC1G58DCKRE4?
All SN74LVC1G58DCKRE4 units undergo pre-shipment inspection (PSI). If there is an issue with SN74LVC1G58DCKRE4, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SN74LVC1G58DCKRE4 part is unused and in its original packaging.
Return procedure for SN74LVC1G58DCKRE4:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SN74LVC1G58DCKRE4 Tags

-
SN74LVC1G97DCKR
Texas Instruments

-
SN74LVC1G97DRLR
Texas Instruments

-
SN74LVC1G97DBVR
Texas Instruments

-
NC7SZ57P6X
onsemi

-
SN74LVC1G97DCKT
Texas Instruments

-
MC100EP05DTR2G
onsemi

-
MC100EP08DTR2G
onsemi

-
NB7L86AMNHTBG
onsemi

-
HMC722LP3E
Analog Devices Inc.

-
74LVC1G97GW,125
Nexperia USA Inc.

-
74LVC1G57GW,125
Nexperia USA Inc.

-
74LVC1G97GV,125
Nexperia USA Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
