Texas Instruments SN75DP128ARTQR

Overview

SN75DP128ARTQR from Texas Instruments is a DisplayPort 1:2 switch IC that routes one Dual-Mode DisplayPort input to either of two independent DisplayPort outputs, supporting data rates up to 2.7 Gbps per lane, operating across 0°C to 85°C, and packaged in a 56-pin 8×8 mm QFN. It enables dynamic display switching in docking stations and GPU add-in cards.

For engineers reviewing the SN75DP128ARTQR datasheet, SN75DP128ARTQR pinout, SN75DP128ARTQR application, or SN75DP128ARTQR equivalent, key selection criteria include its dual-mode DP switching logic, HPD/CAD signal routing capability, AUX channel I²C/DP mode support, output gain adjustment via DPVadj, and ESD robustness (12 kV on main link pins).

Technical Context

The SN75DP128ARTQR implements hardware-based 1:2 switching logic controlled by HPD_A/HPD_B inputs and a Priority pin, with automatic low-power entry when both HPD inputs are low. Its main link channels replicate input waveform amplitude and timing with <40 ps inter-pair skew and ≤35 ps peak-to-peak residual jitter at 2.7 Gbps.

It supports bidirectional AUX switching in both DisplayPort differential mode and TMDS-compatible I²C mode, dynamically optimized based on CAD pin state. The device integrates level-shifted HPD and CAD outputs referenced to VDD*1 (1.62–5.25 V), enabling compatibility with diverse source-side voltage domains.

Key Specifications

Pinout & Package

SN75DP128ARTQR is housed in a 56-pin QFN package (8 mm × 8 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per TI SLLS940 datasheet Rev. November 2008.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar DisplayPort 1:2 switching applications.

Compared with PI3DPX1202ZLEX and TS3DV642RSBR, SN75DP128ARTQR delivers purpose-built DisplayPort 1:2 switching with zero-firmware arbitration, native AUX mode selection, and ESD-hardened interfaces - making it optimal for cost-sensitive, standards-compliant docking and GPU expansion designs.

Availability

SN75DP128ARTQR is available at Aetrix Electronics and suitable for desktop docking stations, notebook GPU expansion enclosures, video capture systems, and industrial multi-source display controllers requiring stable component supply and long-term production continuity.

Supply support for SN75DP128ARTQR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity solutions, with decades of expertise in high-speed interface ICs and signal integrity engineering.

The SN75DP128ARTQR belongs to TI's DisplayPort interface product line, designed specifically for cost-effective, standards-compliant DP switching in space-constrained commercial computing systems - emphasizing ease of integration, low power, and robust hot-plug operation.

FAQ

What is the maximum supported data rate for SN75DP128ARTQR?

The SN75DP128ARTQR supports DisplayPort data rates up to 2.7 Gbps per lane, compliant with DisplayPort 1.1a specification. This enables HBR (High Bit Rate) mode operation across all four main link lanes, delivering up to 10.8 Gbps aggregate throughput. It does not support HBR2 (5.4 Gbps) or later revisions.

Does SN75DP128ARTQR require an external clock or reference oscillator?

No, SN75DP128ARTQR is a passive repeater-style switch and does not require an external clock. It operates synchronously with the incoming DisplayPort main link signal, replicating its timing and waveform without retiming or clock recovery circuitry - reducing BOM cost and layout complexity.

How does SN75DP128ARTQR handle Hot Plug Detect (HPD) arbitration between two displays?

SN75DP128ARTQR uses hardware logic: when only one HPD input (HPD_A or HPD_B) is asserted, that port is selected; when both are high, the Priority pin determines selection. It also implements tT2(HPD) timeout (170–400 ms) to detect unplug events and automatically switch ports, all without firmware involvement.

Can SN75DP128ARTQR be used in reverse - i.e., to combine two DP inputs into one output?

No, SN75DP128ARTQR is strictly a 1:2 unidirectional switch - one input to one of two outputs. It lacks multiplexer logic for input combining, has no contention protection between ML_IN lanes, and does not support bi-directional main link routing. Reverse use violates its signal flow architecture.

What is the function of the DPVadj pin on SN75DP128ARTQR?

The DPVadj pin on SN75DP128ARTQR sets main link output voltage swing via an external resistor to ground: 4.53 kΩ increases gain, 6.49 kΩ gives nominal swing, and 10 kΩ decreases swing. This allows board-level tuning to compensate for PCB trace loss or meet specific receiver input sensitivity requirements.