NXP Semiconductors SPC5673FF3MVR2
- Part No.:
- SPC5673FF3MVR2
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 416-BBGA
- Datasheet:
-
SPC5673FF3MVR2.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 416PBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SPC5673FF3MVR2 from NXP Semiconductors is a 32-bit Power Architecture® e200z7-based automotive microcontroller with 200 MHz core frequency, 3 MB on-chip flash, 192 KB SRAM (including 32 KB standby RAM), dual eTPU2 units (64 total channels), and 32-channel eMIOS - deployed in engine control units, transmission controllers, and chassis domain controllers.
For engineers reviewing the SPC5673FF3MVR2 datasheet, SPC5673FF3MVR2 pinout, SPC5673FF3MVR2 application, or SPC5673FF3MVR2 equivalent, key selection criteria include its 416-ball TEPBGA package (27 mm × 27 mm), -40 °C to 125 °C operating range, absence of External Bus Interface (EBI), and qualification for automotive AEC-Q100 Grade 1 applications.
Technical Context
The SPC5673FF3MVR2 implements a dual-issue e200z7 CPU core with VLE instruction encoding and SPE2 signal processing extensions, enabling efficient code density and DSP-capable real-time control. Its crossbar switch architecture allows concurrent access to flash, SRAM, and peripherals by multiple bus masters including two eDMA2 controllers (64- and 32-channel).
It integrates four FlexCAN modules, dual-channel FlexRay, three eSCI interfaces, four DSPI modules, four eQADC modules (64 analog inputs total), and Nexus IEEE-ISTO 5001 debug support - all synchronized via FMPLL clock generation and managed by SIU and INTC subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | e200z7 dual-issue 32-bit Power Architecture® core with VLE and SPE2 extensions |
| Max Core Frequency | 200 MHz nominal, supporting deterministic real-time execution for safety-critical control loops |
| Flash Memory | 3 MB on-chip C90 flash with read-while-program/erase capability and EEPROM emulation support |
| SRAM | 192 KB general-purpose SRAM, including 32 KB low-leakage standby RAM for wake-up retention |
| Package | 416-ball TEPBGA, 27 mm × 27 mm, Pb-free, no EBI interface |
| Operating Temperature | -40 °C to +125 °C ambient, qualified per AEC-Q100 Grade 1 for automotive powertrain applications |
| Analog Input Channels | 64-channel eQADC system with eight decimation filters and one absolute reference channel |
Pinout & Package
SPC5673FF3MVR2 uses a 416-ball TEPBGA package (27 mm × 27 mm, 0.8 mm ball pitch) with thermal pad exposed on underside. Pin functions follow MPC5674F/73F family muxing scheme; primary I/O groups include eMIOS (EMIOS0–EMIOS31), eTPU2 (ETPUA0–ETPUA31, ETPUB0–ETPUB31, ETPUC0–ETPUC31), FlexCAN/FlexRay transceivers, and analog input banks (ANA0–ANA39, ANB0–ANB23).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD / VSS | Power supply / ground | Dedicated core (1.2 V), I/O (3.3 V), analog (5 V), and high-voltage domains with separate decoupling requirements |
| ANA0–ANA39, ANB0–ANB23 | Analog input terminals | 64-channel eQADC input bank with programmable gain, filtering, and shared/specialized reference routing |
| EMIOS0–EMIOS31 | Unified timer I/O channels | 32-channel enhanced modular I/O system supporting PWM, modulus counting, and dual-edge capture for motor control timing |
| ETPUA0–ETPUA31, ETPUB0–ETPUB31, ETPUC0–ETPUC31 | eTPU2 time processor unit pins | Three independent eTPU2 blocks (A/B/C) providing 64 total channels for high-resolution waveform generation and capture (e.g., ignition, fuel injection) |
| CAN_A–CAN_D_TX/RX | FlexCAN differential transceiver I/O | Four independent CAN FD-capable interfaces with configurable bit rates up to 5 Mbps and built-in message RAM |
| FR_A_TX/FR_A_RX, FR_B_TX/FR_B_RX | FlexRay transceiver I/O | Dual-channel FlexRay controller supporting static/dynamic segments, 10 Mbps data rate, and fault-tolerant communication |
Key Features
| Feature | Design Value |
|---|---|
| VLE instruction encoding | Reduces flash footprint by up to 30% vs. pure 32-bit encoding - critical for memory-constrained automotive firmware |
| SPE2 signal processing extension | Hardware-accelerated single-precision floating-point and DSP operations for real-time observer algorithms and sensor fusion |
| eTPU2 with 64 channels | Offloads high-frequency timing-critical tasks (e.g., spark timing, injector pulse shaping) from main CPU, improving determinism |
| Boot Assist Module (BAM) | Enables serial bootload via CAN or SCI without external programmer - simplifies field firmware updates and calibration |
| Nexus Class 3+ debug interface | IEEE-ISTO 5001-compliant real-time trace, hardware breakpoints, and memory access for ISO 26262 ASIL-D development |
Applications
| Engine Control Unit (ECU) | Automatic Transmission Control Unit (TCU) |
|---|---|
Use Scenario: Real-time management of fuel injection timing, spark advance, air-fuel ratio, and knock detection in gasoline and diesel engines. IC Role / Device Role: Primary control MCU executing closed-loop combustion control algorithms with sub-microsecond timing precision. Use Value: eTPU2's 64-channel capability enables simultaneous control of 8+ injectors and 4+ ignition coils with <100 ns jitter - meeting Euro 6/China 6 emission compliance. | Use Scenario: Closed-loop hydraulic pressure control, shift scheduling, clutch engagement sequencing, and torque converter lockup in 8-speed automatic transmissions. IC Role / Device Role: Safety-aware transmission controller interfacing with CAN FD networks and managing real-time solenoid actuation. Use Value: Dual FlexCAN modules and 3 MB flash support multi-network diagnostics and over-the-air (OTA) software updates while maintaining ASIL-B functional safety integrity. |
| Chassis Domain Controller | Electric Power Steering (EPS) ECU |
Use Scenario: Integration of brake-by-wire, active suspension, and electronic stability control signals across distributed vehicle domains. IC Role / Device Role: High-integrity domain controller aggregating sensor data and coordinating actuator commands via FlexRay and CAN FD. Use Value: FlexRay dual-channel redundancy and eQADC's 64-channel sampling enable synchronized acquisition of 16+ wheel speed, steering angle, and lateral acceleration sensors at 10 kHz. | Use Scenario: Torque assist calculation, motor phase current regulation, and fault response (e.g., torque reduction on sensor failure) in column-assist and rack-assist EPS systems. IC Role / Device Role: Real-time motor control MCU with integrated ADC, PWM, and CAN communication for driver assistance systems. Use Value: eMIOS 32-channel PWM output supports 3-phase inverter gate driving with dead-time insertion and fault monitoring - eliminating need for external gate drivers. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SPC5674FK0MVR3 | 4 MB flash, 256 KB SRAM, 264 MHz max core frequency, same 416-ball TEPBGA package | Higher memory and performance margin for future-proofing or complex AUTOSAR Classic deployments | Select when requiring >3 MB flash for bootloader + application separation or additional diagnostic log storage |
| SPC5673FK0MVR2 | Identical flash/SRAM size, core frequency, package, and temperature grade; differs only in silicon revision and qualification flow (S vs M) | No functional difference; both qualified for automotive use but S-part has full AEC-Q100 automotive flow validation | Prefer SPC5673FF3MVR2 if sourcing requires documented automotive qualification path; otherwise functionally interchangeable |
Compared with SPC5673FF3MVR2, SPC5674FK0MVR3 offers higher flash capacity and clock headroom for scalable software architectures, while SPC5673FK0MVR2 provides identical functionality with alternate qualification documentation - making both viable alternatives depending on program certification and memory requirements.
Availability
SPC5673FF3MVR2 is available at Aetrix Electronics and suitable for engine control units, transmission control units, and chassis domain controllers requiring stable component supply, long-term automotive lifecycle support, and AEC-Q100-compliant traceability.
Supply support for SPC5673FF3MVR2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in Power Architecture® and S32 platform evolution.
The SPC5673F belongs to NXP's legacy SPC56xx automotive microcontroller family, designed specifically for high-reliability powertrain and chassis control applications demanding ASIL-B/C compliance and real-time deterministic performance.
FAQ
What is the maximum operating frequency of the SPC5673FF3MVR2 core?
The SPC5673FF3MVR2 features an e200z7 core rated for a nominal maximum frequency of 200 MHz. This is the guaranteed operational speed under full temperature and voltage range (-40 °C to +125 °C, VDD = 1.14–1.26 V). The device does not support frequency modulation (FM) modes beyond this rating, unlike higher-grade MPC5674F variants.
Does the SPC5673FF3MVR2 include an External Bus Interface (EBI)?
No, the SPC5673FF3MVR2 does not include an External Bus Interface. As confirmed in Table 2 of the MPC567xF Family Differences document, EBI is only available on 516-ball TEPBGA packages (e.g., SPC5674FK0MVY3), and the SPC5673FF3MVR2 uses a 416-ball TEPBGA package explicitly designated "no EBI" in NXP's ordering information.
How much flash and SRAM does the SPC5673FF3MVR2 provide?
The SPC5673FF3MVR2 integrates 3 MB of on-chip C90 flash memory and 192 KB of general-purpose SRAM. Of the SRAM, 32 KB is designated as standby RAM with retention during low-power stop modes - a key feature for fast wake-up in automotive body/chassis applications.
Is the SPC5673FF3MVR2 qualified for automotive applications?
Yes, the SPC5673FF3MVR2 is fully qualified for automotive use per AEC-Q100 Grade 1 (-40 °C to +125 °C) and supports ISO 26262 functional safety development up to ASIL-B. Its qualification status is indicated by the 'M' in the part number suffix, denoting full specification qualification for general market and automotive flow.
What debug interface does the SPC5673FF3MVR2 support?
The SPC5673FF3MVR2 supports the Nexus development interface (NDI) compliant with IEEE-ISTO 5001-2003/2008 Class 3+, providing real-time trace, hardware breakpoints, memory access, and run-control debugging - essential for ASIL-D tool qualification and complex automotive software validation.
SPC5673FF3MVR2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 416-BBGA
- Series:
- MPC56xx Qorivva
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z7
- Core Size:
- 32-Bit Single-Core
- Speed:
- 200MHz
- Connectivity:
- CANbus, SCI, SPI
- Peripherals:
- DMA, POR, PWM
- Number of I/O:
- 32
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 192K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.08V ~ 5.25V
- Data Converters:
- A/D 64x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5673FF3MVR2 FAQ
1.How can I place an order for SPC5673FF3MVR2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5673FF3MVR2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5673FF3MVR2 reliable?
The price and inventory of SPC5673FF3MVR2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5673FF3MVR2 is usually 5 days.
3.What payment methods are accepted for SPC5673FF3MVR2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5673FF3MVR2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5673FF3MVR2?
SPC5673FF3MVR2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5673FF3MVR2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5673FF3MVR2?
For technical support, including SPC5673FF3MVR2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5673FF3MVR2 requirements.
6.How does Aetrix verify that SPC5673FF3MVR2 is sourced from the original manufacturer or authorized distributors?
All SPC5673FF3MVR2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5673FF3MVR2 meets industry standards.
7.What is the process for return or replacement of SPC5673FF3MVR2?
All SPC5673FF3MVR2 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5673FF3MVR2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5673FF3MVR2 part is unused and in its original packaging.
Return procedure for SPC5673FF3MVR2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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