NXP Semiconductors SPC5673FF3MVR3
- Part No.:
- SPC5673FF3MVR3
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 416-BBGA
- Datasheet:
-
SPC5673FF3MVR3.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 416PBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SPC5673FF3MVR3 from NXP Semiconductors is a 32-bit Power Architecture® e200z7-based automotive microcontroller with 3 MB on-chip flash, 192 KB SRAM (including 32 KB standby), dual eTPU2 units (64 total channels), 32-channel eMIOS, and four FlexCAN interfaces. It operates at 200 MHz nominal frequency in –40 °C to 125 °C ambient range and targets engine control units (ECUs) requiring deterministic real-time I/O processing and CAN-based diagnostics.
For engineers reviewing the SPC5673FF3MVR3 datasheet, SPC5673FF3MVR3 pinout, SPC5673FF3MVR3 application, or SPC5673FF3MVR3 equivalent, key selection criteria include its 416-ball TEPBGA package (27 mm × 27 mm), absence of External Bus Interface (EBI), support for serial bootload via CAN/SCI, and qualification for automotive AEC-Q100 Grade 1 operation.
Technical Context
The SPC5673FF3MVR3 implements a dual-issue e200z7 CPU core with VLE instruction set extension for code density reduction and SPE2 for DSP and single-precision floating-point operations. Its memory subsystem includes 3 MB C90 flash with read-while-program/erase capability and EEPROM emulation, plus 192 KB general-purpose SRAM with 32 KB low-power standby RAM.
Peripherals are organized around a crossbar switch enabling concurrent access by multiple bus masters. It integrates two eTPU2 modules (64 channels total, 24 KB code RAM, 6 KB parameter RAM), four eQADC modules (64 analog inputs, eight decimation filters), four DSPI, three eSCI, four FlexCAN, and dual-channel FlexRay controllers - all synchronized via FMPLL and Nexus IEEE-ISTO 5001 debug interface.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | e200z7 dual-issue 32-bit Power Architecture® core with VLE and SPE2 extensions |
| Flash Memory | 3 MB on-chip C90 flash supporting read-during-program/erase and EEPROM emulation |
| SRAM | 192 KB general-purpose SRAM, including 32 KB standby RAM for low-power retention |
| Operating Frequency | 200 MHz nominal system clock (fMAX = 200 MHz, no frequency modulation) |
| Temperature Range | –40 °C to 125 °C ambient, qualified per AEC-Q100 Grade 1 |
| Package | 416-ball TEPBGA, 27 mm × 27 mm, Pb-free, no EBI |
| Peripheral Integration | Dual eTPU2 (64 channels), 32-channel eMIOS, four FlexCAN, dual FlexRay, four eQADC (64 ch) |
Pinout & Package
SPC5673FF3MVR3 uses a 416-ball TEPBGA package (27 mm × 27 mm, Pb-free). Pin assignments follow the MPC5674F/MPC5673F 416-ball layout defined in Figures 6–10 of the MPC5674F Data Sheet Rev. 11. Key functional groups include dedicated analog input banks (ANA0–ANA39, ANB0–ANB23), eTPU2 signal terminals (ETPUA0–ETPUA31, ETPUB0–ETPUB31, ETPUC0–ETPUC31), eMIOS channels (EMIOS0–EMIOS31), FlexCAN transceiver pins (FR_A_TX/FR_A_RX, FR_B_TX/FR_B_RX), and Nexus/JTAG debug signals (TCK, TMS, TDO, TDI, TRST).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| ANA0–ANA39, ANB0–ANB23 | Analog input multiplexer inputs | Support up to 64-channel eQADC acquisition with shared channel mapping and decimation filtering |
| ETPUA0–ETPUA31, ETPUB0–ETPUB31, ETPUC0–ETPUC31 | eTPU2 time-processing unit I/O | 64 independent time-critical I/O channels for engine timing, PWM generation, and sensor capture |
| EMIOS0–EMIOS31 | Enhanced modular I/O system channels | 32 unified channels supporting PWM, modulus counting, and dual-edge capture for motor control and signal conditioning |
| FR_A_TX / FR_A_RX / FR_B_TX / FR_B_RX | FlexRay physical layer interface | Dual independent FlexRay communication channels compliant with ISO 17458-4 for high-integrity automotive networks |
| TCK / TMS / TDO / TDI / TRST | Nexus Class III debug interface | IEEE-ISTO 5001-2003/2008-compliant real-time trace and non-intrusive debugging |
Key Features
| Feature | Design Value |
|---|---|
| VLE instruction encoding | Reduces flash footprint by mixing 16-bit and 32-bit instructions without performance penalty |
| SPE2 signal processing engine | Enables efficient single-precision floating-point and fixed-point DSP operations within CPU pipeline |
| eTPU2 dual-module architecture | Provides 64 deterministic, autonomous time-processing channels with shared code/data RAM |
| Crossbar switch interconnect | Eliminates bus contention between CPU, eDMA2, eTPU2, and peripherals for predictable latency |
| Boot assist module (BAM) | Enables field firmware updates via CAN or SCI without external programmer or ROM dependency |
Applications
| Engine Control Unit (ECU) | Transmission Control Module (TCM) |
|---|---|
Use Scenario: Real-time combustion timing, fuel injection pulse width, and knock detection in gasoline/diesel powertrains. IC Role / Device Role / Timing Role: Primary controller executing safety-critical ASIL-B software with deterministic eTPU2-driven spark/fuel event scheduling. Use Value: 64 eTPU2 channels enable simultaneous management of 8+ cylinder timing events and 16+ sensor inputs with sub-microsecond jitter. | Use Scenario: Clutch engagement sequencing, gear shift logic, and hydraulic pressure control in automatic transmissions. IC Role / Device Role / Timing Role: Central real-time executor interfacing with solenoid drivers, position sensors, and CAN-based vehicle network. Use Value: Dual FlexCAN interfaces allow redundant communication with body control module and powertrain gateway while maintaining ASIL-B compliance. |
| Electric Power Steering (EPS) | Brake Control Unit (BCU) |
Use Scenario: Torque assist calculation, motor current control, and fault response in steer-by-wire systems. IC Role / Device Role / Timing Role: Safety-oriented MCU managing torque loop (≤100 µs cycle), CAN diagnostics, and fail-safe state machine. Use Value: 3 MB flash supports dual-bank firmware update; 192 KB SRAM accommodates real-time observer models and logging buffers. | Use Scenario: ABS/ESC actuation timing, wheel speed processing, and brake-by-wire command arbitration. IC Role / Device Role / Timing Role: High-integrity controller with hardware error correction (ECSM), lockstep-capable peripherals, and Nexus trace for ISO 26262 validation. Use Value: FMPLL + crossbar ensures jitter-free timing for 4× eQADC sampling across 64 channels at ≤1 µs conversion intervals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SPC5674FK0MVR3 | 4 MB flash, 256 KB SRAM, 264 MHz nominal clock, same 416-ball TEPBGA package, includes EBI support | Targeted at higher-complexity ECUs requiring external calibration memory or bootloader expansion | Select when >3 MB flash or external memory interface is required; otherwise SPC5673FF3MVR3 offers optimal cost/performance for standard ASIL-B ECU designs |
| SPC5673FK0MVR2 | Identical flash/SRAM/clock/package specs but qualified under automotive flow (S-grade) vs. general market (M-grade); identical pinout and firmware compatibility | No functional difference; differs only in qualification documentation and test coverage depth per AEC-Q100 | Choose SPC5673FK0MVR2 for full automotive production programs requiring certified qualification records; SPC5673FF3MVR3 is suitable for pre-production, Tier-2 development, or non-safety-critical subsystems |
Compared with SPC5674FK0MVR3, the SPC5673FF3MVR3 reduces flash capacity and removes EBI to lower BOM cost and power, while retaining full eTPU2, FlexCAN, and FlexRay functionality for mainstream powertrain control. Against SPC5673FK0MVR2, it trades formal automotive qualification for faster availability and lower procurement barriers without sacrificing electrical or functional behavior.
Availability
SPC5673FF3MVR3 is available at Aetrix Electronics and suitable for engine control units, transmission control modules, and electric power steering systems requiring stable component supply, long-term automotive lifecycle support, and Pb-free manufacturing compliance.
Supply support for SPC5673FF3MVR3 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The SPC5673FF3MVR3 belongs to the SPC567xF family - a line of high-performance, safety-certifiable Power Architecture® MCUs designed specifically for automotive powertrain and chassis control where deterministic real-time processing, functional safety (ASIL-B), and multi-protocol networking are mandatory.
FAQ
What is the maximum operating frequency of the SPC5673FF3MVR3?
The SPC5673FF3MVR3 has a nominal operating frequency of 200 MHz and a maximum allowed frequency (fMAX) of 200 MHz. Unlike higher-speed variants such as the SPC5674F series, this part does not support frequency modulation (FM), so its clock remains fixed at 200 MHz without ±2% modulation tolerance.
Does the SPC5673FF3MVR3 include an External Bus Interface (EBI)?
No, the SPC5673FF3MVR3 does not include an External Bus Interface. Per Table 2 of the MPC5674F Data Sheet Rev. 11, EBI is only available on 516-ball TEPBGA packages (e.g., SPC5674FK0MVY3). The SPC5673FF3MVR3 uses a 416-ball TEPBGA package and is explicitly listed as "no EBI" in ordering information.
What is the flash memory size and architecture of the SPC5673FF3MVR3?
The SPC5673FF3MVR3 integrates 3 MB of on-chip C90 flash memory. This flash supports read-while-program and read-while-erase operations, enables multiple independently erasable blocks, and provides hardware-assisted EEPROM emulation functionality - critical for storing calibration data and runtime parameters in automotive ECUs.
Is the SPC5673FF3MVR3 qualified for automotive use?
Yes, the SPC5673FF3MVR3 is fully qualified for automotive applications per AEC-Q100 Grade 1 (–40 °C to 125 °C ambient), with qualification status "M" indicating general market automotive flow. It meets functional safety requirements for ASIL-B systems and includes built-in diagnostics such as ECSM error correction, lockstep-capable peripherals, and Nexus Class III debug support.
How many eTPU2 channels does the SPC5673FF3MVR3 support?
The SPC5673FF3MVR3 supports 64 eTPU2 channels, implemented across two independent eTPU2 modules (eTPU_A and eTPU_B), each providing 32 channels. These share 24 KB of code RAM and 6 KB of parameter RAM, enabling highly deterministic, autonomous time-critical I/O processing for ignition, injection, and sensor capture tasks.
SPC5673FF3MVR3 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 416-BBGA
- Series:
- MPC56xx Qorivva
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z7
- Core Size:
- 32-Bit Single-Core
- Speed:
- 264MHz
- Connectivity:
- CANbus, SCI, SPI
- Peripherals:
- DMA, POR, PWM
- Number of I/O:
- 32
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 192K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.08V ~ 5.25V
- Data Converters:
- A/D 64x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5673FF3MVR3 FAQ
1.How can I place an order for SPC5673FF3MVR3 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5673FF3MVR3 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5673FF3MVR3 reliable?
The price and inventory of SPC5673FF3MVR3 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5673FF3MVR3 is usually 5 days.
3.What payment methods are accepted for SPC5673FF3MVR3?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5673FF3MVR3 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5673FF3MVR3?
SPC5673FF3MVR3 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5673FF3MVR3 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5673FF3MVR3?
For technical support, including SPC5673FF3MVR3 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5673FF3MVR3 requirements.
6.How does Aetrix verify that SPC5673FF3MVR3 is sourced from the original manufacturer or authorized distributors?
All SPC5673FF3MVR3 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5673FF3MVR3 meets industry standards.
7.What is the process for return or replacement of SPC5673FF3MVR3?
All SPC5673FF3MVR3 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5673FF3MVR3, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5673FF3MVR3 part is unused and in its original packaging.
Return procedure for SPC5673FF3MVR3:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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