NXP Semiconductors SPC5673FF3MVY2

Overview

SPC5673FF3MVY2 from NXP Semiconductors is a 32-bit Power Architecture® e200z7-based automotive microcontroller with 3 MB on-chip flash, 192 KB SRAM (including 32 KB standby RAM), dual eTPU2 units (64 total channels), 32-channel eMIOS, and FlexCAN/FlexRay connectivity - designed for real-time engine control, transmission management, and chassis domain controllers.

For engineers reviewing the SPC5673FF3MVY2 datasheet, SPC5673FF3MVY2 pinout, SPC5673FF3MVY2 application, or SPC5673FF3MVY2 equivalent, key selection criteria include its 516-ball TEPBGA package with EBI support, -40°C to 125°C operating range, 200 MHz nominal core frequency, and integrated safety features including ECSM and Nexus debug per IEEE-ISTO 5001.

Technical Context

The SPC5673FF3MVY2 implements a dual-issue e200z7 CPU core with VLE and SPE2 extensions for code density and DSP acceleration, paired with a crossbar switch enabling concurrent access to flash, SRAM, and peripherals by multiple bus masters. Its FMPLL provides precise clock generation with frequency modulation support.

It integrates two eTPU2 modules sharing 24 KB code RAM and 6 KB parameter RAM, four eQADC modules supporting up to 64 analog inputs with decimation filters, and four DSPI interfaces - all coordinated via an enhanced INTC and SIU for deterministic real-time response in safety-critical powertrain systems.

Key Specifications

Pinout & Package

SPC5673FF3MVY2 uses a 516-ball TEPBGA package (27 mm × 27 mm, 0.8 mm ball pitch) with thermal pad and Pb-free finish. Pin assignments follow the MPC5674F/MPC5673F family layout for 516-ball variant, supporting External Bus Interface (EBI) signals including D_ADD[0:31], D_DAT[0:15], D_CS[0:3], D_OE, D_WE[0:3], D_RD_, D_ALE, D_TS, and D_BDIP.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar automotive microcontroller applications.

Compared with SPC5673FF3MVY2, the SPC5674FK0MVY3 offers higher memory capacity and clock speed for advanced calibration and safety logging, while the SPC5673FF3MVR2 trades EBI and package size for lower system cost - all three share identical peripheral IP blocks and safety architecture, enabling scalable platform design.

Availability

SPC5673FF3MVY2 is available at Aetrix Electronics and suitable for engine control units, transmission control modules, and chassis domain controllers requiring stable component supply across extended automotive production lifecycles.

Supply support for SPC5673FF3MVY2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in functional safety and real-time embedded systems.

The SPC5673F belongs to NXP's SPC56x automotive MCU family, engineered specifically for ASIL-B/C powertrain and chassis control applications demanding high computational throughput, deterministic timing, and integrated safety mechanisms.

FAQ

What is the maximum operating frequency of the SPC5673FF3MVY2 core?

The SPC5673FF3MVY2 operates at a nominal maximum frequency of 200 MHz, with the FMPLL supporting frequency modulation up to ±2% for EMI reduction. This 200 MHz rating is confirmed in Table 1 of the MPC5674F Data Sheet Rev. 11 for all SPC5673F orderable parts including SPC5673FF3MVY2, and applies to the e200z7 CPU core under full temperature and voltage conditions.

Does the SPC5673FF3MVY2 support external memory expansion?

Yes, the SPC5673FF3MVY2 supports external memory expansion via its External Bus Interface (EBI), which is enabled in the 516-ball TEPBGA package. The EBI includes full 32-bit address and 16-bit data buses, chip select lines, and control signals (D_OE, D_WE[0:3], D_RD_, D_ALE, D_TS) - as documented in Section 3.3 (516-ball TEPBGA pin assignments) and Table 2 of the MPC5674F Data Sheet.

What safety features are integrated into the SPC5673FF3MVY2?

The SPC5673FF3MVY2 integrates the Error Correction Status Module (ECSM) for ECC protection of critical memories, Nexus development interface compliant with IEEE-ISTO 5001-2003/2008 for runtime trace and fault analysis, and JTAG boundary scan (IEEE 1149.1). These features collectively support ISO 26262 ASIL-B development workflows and are explicitly listed in the "MPC5674F Blocks" section of the datasheet.

How much SRAM does the SPC5673FF3MVY2 provide, and how is it allocated?

The SPC5673FF3MVY2 provides 192 KB of on-chip general-purpose SRAM, including 32 KB of dedicated standby RAM for data retention during low-power stop modes. This allocation is specified in Table 2 ("MPC567xF Family Differences") of the MPC5674F Data Sheet, which confirms 192 KB SRAM for all MPC5673F variants, distinct from the 256 KB found in MPC5674F devices.

Is the SPC5673FF3MVY2 pin-compatible with other MPC567xF family members?

The SPC5673FF3MVY2 shares the same 516-ball TEPBGA mechanical footprint and ball map with SPC5674FK0MVY3 and SPC5674FF3MVY3, making it mechanically compatible. However, electrical compatibility depends on feature enablement: SPC5673FF3MVY2 lacks EBI functionality in some configurations per Table 2, whereas SPC5674F variants always enable EBI in 516-ball packages - verify signal muxing and peripheral enable bits in the SIU before substitution.