NXP Semiconductors SPC5673FK0MVY2
- Part No.:
- SPC5673FK0MVY2
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 516-BBGA
- Datasheet:
-
SPC5673FK0MVY2.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 516FPBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SPC5673FK0MVY2 from NXP Semiconductors is a 32-bit Power Architecture® e200z7-based automotive microcontroller with dual-issue CPU, 3 MB on-chip flash, 192 KB SRAM (including 32 KB standby), 47-channel eTPU2, 22-channel eMIOS, and 48-channel eQADC. It supports FlexCAN, DSPI, eSCI, FlexRay, and Nexus debug, targeting engine control units and transmission controllers.
For engineers reviewing the SPC5673FK0MVY2 datasheet, SPC5673FK0MVY2 pinout, SPC5673FK0MVY2 application, or SPC5673FK0MVY2 equivalent, this page delivers verified technical context, package mapping to 516-ball TEPBGA, real-world timing roles, functional alternatives, and supply-chain-ready availability details - all grounded in NXP's MPC567xF family documentation.
Technical Context
The SPC5673FK0MVY2 implements a dual-issue e200z7 core compliant with Power Architecture® embedded category, featuring 16 KB I-Cache and 16 KB D-Cache, VLE instruction encoding for code density reduction, and SPE2 extension for DSP and single-precision floating-point operations. Its crossbar switch enables concurrent access to flash, RAM, and peripherals by multiple bus masters.
It integrates two eTPU2 modules (totaling 47 channels), one with 26 channels and the other with 21 channels (excluding TCRCLK), 22-channel eMIOS with PWM and modulus counter capability, and dual eQADC modules (48 total analog inputs). The device includes FMPLL clock generation, SIU system integration, ECSM error correction, and boot assist via CAN/SCI serial loading.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | e200z7 dual-issue 32-bit Power Architecture® core with VLE and SPE2 support |
| Flash Memory | 3 MB on-chip flash supporting read-during-program/erase and EEPROM emulation |
| SRAM | 192 KB general-purpose SRAM, including 32 KB standby RAM for low-power retention |
| eTPU2 Channels | 47 total time-processing channels across two eTPU2 units (26 + 21, no TCRCLK on second) |
| eQADC Inputs | 48 analog input channels (24 per module), with decimation filters and absolute reference channel |
| Package & Pins | 516-ball TEPBGA (27 mm × 27 mm), Pb-free, with EBI interface enabled |
| Operating Temp | –40 °C to +125 °C ambient, qualified for automotive applications |
| Max Frequency | 200 MHz nominal system clock (200 MHz max speed, no frequency modulation) |
Pinout & Package
SPC5673FK0MVY2 is housed in a 516-ball TEPBGA package (27 mm × 27 mm, Pb-free), with external bus interface (EBI) enabled. Pin functions are multiplexed across four quadrants; key signal groups include 48 eQADC analog inputs (ANx, ANBx), 47 eTPU2 channels (ETPUA/B/Cx), 22 eMIOS channels (EMIOSx), FlexCAN/FlexRay transceivers (FR_A_, FR_B_), DSPI/SCK/SIN/SOUT, eSCI TX/RX, JTAG/Nexus debug (TMS/TCK/TDO/TDI), and EBI address/data/control lines (D_ADDx, D_DATx, D_CSx, D_OE, D_WEx).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D_ADD16–D_ADD30 | EBI Address Bus | 15-bit address lines for external memory mapping; required for calibration and development use |
| D_DAT0–D_DAT15 | EBI Data Bus | 16-bit bidirectional data path supporting burst transfers and external flash/ROM interfacing |
| D_CS0–D_CS3 | EBI Chip Select | Four independent chip selects enabling up to four external devices (e.g., sensor memory, calibration EEPROM) |
| D_OE / D_WE0–D_WE3 | EBI Control Signals | Output enable and four write-enable signals for fine-grained control of external memory writes |
| ETPUA0–ETPUA31 | eTPU2 Module A Terminals | 32 dedicated time-processing I/Os; SPC5673FK0MVY2 uses 26 active channels (A0–A25) |
| ETPUB0–ETPUB31 | eTPU2 Module B Terminals | 32-capable block; SPC5673FK0MVY2 configures 21 channels (B0–B20), excluding TCRCLK |
| ANA0–ANA39 / ANB0–ANB23 | Analog Input Multiplexer | 48 total analog inputs routed to dual eQADC modules; includes dedicated reference and bypass pins (BYPCA/B) |
| FR_A_TX / FR_A_RX | FlexRay Channel A Interface | Differential transceiver pair supporting deterministic, fault-tolerant automotive networking at up to 10 Mbps |
Key Features
| Feature | Design Value |
|---|---|
| VLE instruction encoding | Reduces firmware footprint by enabling mixed 16-/32-bit instructions without performance penalty |
| SPE2 signal processing engine | Accelerates motor control algorithms and sensor fusion with native single-precision FP and DSP ops |
| eTPU2 time-critical I/O | Offloads CPU from high-resolution timing tasks (e.g., ignition timing, fuel injection pulse shaping) |
| EBI with full address/data bus | Enables runtime calibration data storage, bootloader updates, and external sensor fusion memory expansion |
| Nexus Class III+ debug | Supports real-time trace, non-intrusive breakpoints, and hardware-assisted profiling per IEEE-ISTO 5001 |
| Automotive qualification | AEC-Q100 Grade 1 compliance ensures reliability in under-hood environments up to +125 °C |
Applications
| Engine Control Unit (ECU) | Automatic Transmission Control Module (TCM) |
|---|---|
|
Use Scenario: Real-time management of fuel injection timing, spark advance, air-fuel ratio, and knock detection using multi-sensor feedback. IC Role / Device Role / Timing Role: Primary controller executing closed-loop combustion control at ≤1 ms cycle intervals; eTPU2 handles cylinder-specific timing events with <100 ns resolution. Use Value: 47-channel eTPU2 and 48-channel eQADC enable simultaneous monitoring of 12+ cylinders and 8+ pressure/temperature sensors without CPU overhead. |
Use Scenario: Coordinated shift scheduling, torque converter lock-up control, and hydraulic pressure regulation across 8–10 gear ratios. IC Role / Device Role / Timing Role: Safety-critical actuator driver coordinating solenoid valve timing, clutch engagement sequencing, and CAN/FlexRay network synchronization. Use Value: Dual FlexCAN interfaces and FlexRay controller ensure deterministic communication with powertrain ECUs and body domain controllers at <50 µs latency. |
| Electric Power Steering (EPS) Controller | Brake-by-Wire Actuation Module |
|
Use Scenario: Sensor-fused torque assist calculation, motor current control, and road feel emulation in response to driver steering input. IC Role / Device Role / Timing Role: High-bandwidth servo controller running field-oriented control (FOC) at 20 kHz PWM with synchronized ADC sampling. Use Value: SPE2 acceleration and 22-channel eMIOS support precise 3-phase inverter gate drive with dead-time compensation and overcurrent protection. |
Use Scenario: Redundant actuation of electro-hydraulic brake valves with fail-operational integrity and ISO 26262 ASIL-D compliance. IC Role / Device Role / Timing Role: Dual-core lockstep-capable controller (via e200z7 + SIU safety monitors) managing dual independent brake circuits. Use Value: ECSM error correction, redundant eQADC paths, and Nexus trace enable end-to-end diagnostic coverage for brake pressure feedback loops. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SPC5674FK0MVY3 | 4 MB flash, 256 KB SRAM, 64-channel eTPU2, 64-channel eQADC, 264 MHz max clock | Higher memory and peripheral count for complex powertrain applications requiring larger calibration tables and more sensor inputs | Select when needing >3 MB flash or full 64-channel eTPU2 for multi-engine configurations |
| SPC5673FK0MVR2 | Same 3 MB flash/192 KB SRAM/eTPU2/eQADC specs but in 416-ball TEPBGA (23 mm × 23 mm), no EBI | Compact footprint for space-constrained modules where external memory expansion is unnecessary | Choose for cost-optimized ECU designs without calibration memory requirements or board area constraints |
Compared with SPC5673FK0MVY2, the SPC5674FK0MVY3 offers higher compute headroom and memory for next-gen powertrain software, while the SPC5673FK0MVR2 trades EBI and package size for lower BOM cost and thermal density - making each optimal for distinct vehicle architecture tiers.
Availability
SPC5673FK0MVY2 is available at Aetrix Electronics and suitable for engine control units, automatic transmission modules, and electric power steering systems requiring stable component supply across automotive production lifecycles.
Supply support for SPC5673FK0MVY2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in ASIL-certified microcontrollers.
The SPC5673FK0MVY2 belongs to NXP's SPC567xF family - engineered specifically for high-integrity automotive powertrain and chassis control, emphasizing real-time determinism, functional safety, and long-term supply stability.
FAQ
What is the maximum operating frequency of the SPC5673FK0MVY2?
The SPC5673FK0MVY2 operates at a nominal maximum frequency of 200 MHz, with no frequency modulation support. This fixed-speed operation ensures deterministic timing for safety-critical engine and transmission control loops, and is validated across the full –40 °C to +125 °C automotive temperature range.
Does the SPC5673FK0MVY2 include an external bus interface (EBI)?
Yes, the SPC5673FK0MVY2 includes a fully enabled external bus interface (EBI) in its 516-ball TEPBGA package, providing 15-bit address (D_ADD0–D_ADD30), 16-bit data (D_DAT0–D_DAT15), and dedicated control lines (D_CS0–D_CS3, D_OE, D_WE0–D_WE3) for external memory expansion used in calibration and bootloader applications.
How many eTPU2 channels does the SPC5673FK0MVY2 support?
The SPC5673FK0MVY2 supports 47 eTPU2 channels: 26 on eTPU2-A (channels A0–A25) and 21 on eTPU2-B (channels B0–B20), with TCRCLK not available on the B module. This configuration enables precise, offloaded timing for ignition, injection, and valve actuation in multi-cylinder engines.
What analog input capability does the SPC5673FK0MVY2 provide?
The SPC5673FK0MVY2 integrates dual eQADC modules supporting 48 total analog inputs - 24 per module - with built-in decimation filters, an absolute reference channel, and dedicated BYPCA/B bypass capacitors. This enables simultaneous high-accuracy acquisition of engine temperature, pressure, throttle position, and oxygen sensor signals.
Is the SPC5673FK0MVY2 qualified for automotive use?
Yes, the SPC5673FK0MVY2 is fully qualified for automotive applications per AEC-Q100 Grade 1 standards, operating reliably from –40 °C to +125 °C ambient. It includes ECC-protected memories, SIU-based safety monitors, and Nexus Class III+ debug - all aligned with ISO 26262 ASIL-B/D development requirements.
SPC5673FK0MVY2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 516-BBGA
- Series:
- MPC56xx Qorivva
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z7
- Core Size:
- 32-Bit Single-Core
- Speed:
- 200MHz
- Connectivity:
- CANbus, EBI/EMI, SCI, SPI
- Peripherals:
- DMA, POR, PWM
- Number of I/O:
- 32
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 192K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.08V ~ 5.25V
- Data Converters:
- A/D 64x12b
- Oscillator Type:
- External
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5673FK0MVY2 FAQ
1.How can I place an order for SPC5673FK0MVY2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5673FK0MVY2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5673FK0MVY2 reliable?
The price and inventory of SPC5673FK0MVY2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5673FK0MVY2 is usually 5 days.
3.What payment methods are accepted for SPC5673FK0MVY2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5673FK0MVY2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5673FK0MVY2?
SPC5673FK0MVY2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5673FK0MVY2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5673FK0MVY2?
For technical support, including SPC5673FK0MVY2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5673FK0MVY2 requirements.
6.How does Aetrix verify that SPC5673FK0MVY2 is sourced from the original manufacturer or authorized distributors?
All SPC5673FK0MVY2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5673FK0MVY2 meets industry standards.
7.What is the process for return or replacement of SPC5673FK0MVY2?
All SPC5673FK0MVY2 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5673FK0MVY2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5673FK0MVY2 part is unused and in its original packaging.
Return procedure for SPC5673FK0MVY2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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