NXP Semiconductors SPC5673KAVMM1R
- Part No.:
- SPC5673KAVMM1R
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 257-LFBGA
- Datasheet:
-
SPC5673KAVMM1R.pdf
- Description:
- IC MCU 32BIT 1MB FLASH 257MAPBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SPC5673KAVMM1R from NXP Semiconductors is a 32-bit Power Architecture® e200z7-based automotive microcontroller designed for high-reliability powertrain and chassis control. It features a dual-issue CPU core with 16 KB I-Cache/16 KB D-Cache, VLE instruction encoding, SPE2 DSP extension, 3 MB on-chip flash, 192 KB SRAM (including standby RAM), and integrated FlexCAN, eTPU2, eMIOS, and eQADC modules. It operates at 200 MHz nominal frequency across –40 °C to 125 °C.
For engineers reviewing the SPC5673KAVMM1R datasheet, SPC5673KAVMM1R pinout, SPC5673KAVMM1R application, or SPC5673KAVMM1R equivalent, key selection criteria include its 324-ball TEPBGA package, absence of External Bus Interface (EBI), 200 MHz clock capability, automotive AEC-Q100 qualification, and support for real-time motor control, transmission management, and brake-by-wire systems.
Technical Context
The SPC5673KAVMM1R implements a dual-issue e200z7 core compliant with Power Architecture® embedded category, featuring variable-length encoding (VLE) for reduced code footprint and Signal Processing Engine 2 (SPE2) for single-precision floating-point and DSP operations. Its memory subsystem includes 3 MB flash with read-while-program/erase capability and EEPROM emulation, plus 192 KB SRAM with 32 KB in standby mode.
Peripherals are organized via a crossbar switch enabling concurrent access by multiple bus masters. It integrates two eTPU2 units (totaling 47 channels), 22-channel eMIOS, 48-channel eQADC (with decimation filters), four DSPI modules, three eSCI interfaces, four FlexCAN controllers, and a dual-channel FlexRay controller - all optimized for deterministic timing in safety-critical automotive applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core | e200z7 dual-issue 32-bit Power Architecture® core with VLE and SPE2 extensions |
| Max Clock Frequency | 200 MHz nominal system clock; supports FMPLL-based frequency modulation |
| Flash Memory | 3 MB on-chip flash with read-during-program/erase and multi-block architecture for EEPROM emulation |
| SRAM | 192 KB general-purpose SRAM, including 32 KB battery-backed standby RAM |
| eTPU2 Channels | 47 total time-processing channels (26 + 21), shared code/data RAM, no TCRCLK on eTPU_B |
| eQADC Channels | 48 analog input channels with eight decimation filters and absolute reference channel |
| Package | 324-ball TEPBGA, 23 mm × 23 mm, Pb-free, industrial temperature range (–40 °C to 125 °C) |
| Automotive Qualification | AEC-Q100 qualified for automotive applications; no External Bus Interface (EBI) |
Pinout & Package
SPC5673KAVMM1R uses a 324-ball TEPBGA package (23 mm × 23 mm, Pb-free). Pin assignments follow the MPC5673F-specific layout defined in NXP document MPC5674F Rev. 11, Section 3.1. The device lacks EBI signals, distinguishing it from 516-ball variants.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD / VSS | Core power supply / ground | Dedicated 1.2 V core rails with multiple VDD/VSS pairs for noise suppression and current distribution |
| VDDA_A0 / VSSA_A1 | Analog supply / ground | Independent 5 V analog domain for ADC reference stability and low-noise operation |
| ANA0–ANA23, ANB0–ANB23 | Analog input channels | 48-channel eQADC input mapping; grouped into two banks (A/B) with shared and dedicated channels |
| EMIOS0–EMIOS31 | Modular I/O signal terminals | 22-channel enhanced modular I/O system supporting PWM, modulus counting, and dual-edge capture |
| ETPUA0–ETPUA31, ETPUB0–ETPUB21 | eTPU2 functional pins | 47 time-processing unit I/Os; includes TCRCLKA (on eTPU_A only), ENGCLK, and dedicated event inputs/outputs |
| FR_A_TX / FR_A_RX | FlexRay physical layer interface | Dual-channel FlexRay transceiver pins supporting 10 Mbit/s deterministic communication for x-by-wire systems |
| CAN0–CAN3_TX / CAN0–CAN3_RX | FlexCAN message routing | Four independent CAN 2.0B controllers with configurable message buffers and loopback modes |
| RESET / BOOT_RDY | System initialization control | Asynchronous reset input and boot-ready handshake signal for serial bootloader synchronization |
Key Features
| Feature | Design Value |
|---|---|
| VLE instruction encoding | Reduces firmware memory footprint by up to 30% vs. pure 32-bit encoding, critical for flash-constrained automotive ECUs |
| SPE2 signal processing engine | Enables real-time execution of motor control algorithms (FOC, SVM) and sensor fusion without external DSP |
| eTPU2 with shared RAM | Offloads precise timing-critical tasks (e.g., ignition timing, fuel injection) from main CPU, improving determinism and latency predictability |
| Read-while-program/erase flash | Allows seamless firmware updates and data logging during runtime without CPU stall or system interruption |
| Integrated FlexRay + FlexCAN | Supports mixed-criticality networks: FlexRay for high-integrity chassis control, CAN for body and infotainment domains |
| 32 KB standby SRAM | Preserves calibration data, fault logs, and security keys during deep sleep or battery disconnect events |
Applications
| Engine Control Unit (ECU) | Transmission Control Module (TCM) |
|---|---|
Use Scenario: Real-time combustion timing, air-fuel ratio calculation, knock detection, and OBD-II diagnostics in gasoline/diesel engines. IC Role / Device Role / Timing Role: Primary compute engine executing ASAM-compliant control laws with sub-microsecond interrupt response and deterministic eTPU2 waveform generation. Use Value: SPE2 acceleration enables fast PI/PID loop closure; 3 MB flash accommodates complex calibration tables and diagnostic software stacks. | Use Scenario: Clutch actuation sequencing, gear shift scheduling, torque converter lockup control, and adaptive learning in automatic/DSG transmissions. IC Role / Device Role / Timing Role: Safety-aware controller managing hydraulic solenoid drivers and position sensors with ISO 26262 ASIL-B decomposition support. Use Value: Dual eTPU2 units generate synchronized PWM for proportional solenoids; eQADC decimation filters suppress mechanical vibration noise in position feedback. |
| Brake-by-Wire System | Electric Power Steering (EPS) |
Use Scenario: Redundant braking actuation, pressure monitoring, fail-operational fallback logic, and vehicle dynamics coordination in steer-by-wire and brake-by-wire architectures. IC Role / Device Role / Timing Role: High-integrity controller interfacing with dual-redundant pressure sensors, motor drivers, and FlexRay backbone for cross-domain arbitration. Use Value: FlexRay interface ensures <100 µs end-to-end latency; ECC-protected SRAM and flash meet ASIL-D requirements for fault containment. | Use Scenario: Torque assist computation, road feel emulation, steering angle correction, and collision avoidance integration in column- or rack-mounted EPS systems. IC Role / Device Role / Timing Role: Real-time motor control unit coordinating torque sensor, resolver feedback, and three-phase inverter gate drivers. Use Value: eMIOS generates dead-time-compensated 3-phase PWM; SPE2 executes FOC inner-loop at >20 kHz without CPU load. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SPC5673FF3MVV2 | Same 324-ball TEPBGA package, identical 200 MHz speed grade and –40 °C to 125 °C rating; SnPb finish instead of Pb-free | No EBI; same peripheral set (47 eTPU2, 48 eQADC, 4 FlexCAN); differs only in RoHS compliance and solder finish | Select when legacy assembly processes require SnPb reflow or when Pb-free qualification is not mandated |
| SPC5674FK0MVR3 | 416-ball TEPBGA, 264 MHz nominal speed, 4 MB flash, 256 KB SRAM, adds EBI support; otherwise identical peripheral architecture | Enables external memory expansion for larger calibration datasets or HMI overlays; higher clock enables faster control loops | Choose for next-generation platforms requiring higher performance headroom or external memory interfacing |
Compared with SPC5673KAVMM1R, SPC5673FF3MVV2 offers identical functionality with SnPb packaging for legacy manufacturing, while SPC5674FK0MVR3 delivers +64 MHz clock, +1 MB flash, and EBI capability - making it suitable for scalable platform designs where future feature growth is anticipated.
Availability
SPC5673KAVMM1R is available at Aetrix Electronics and suitable for engine control units, transmission control modules, brake-by-wire systems, and electric power steering applications requiring stable component supply, long-term automotive lifecycle support, and AEC-Q100-compliant sourcing.
Supply support for SPC5673KAVMM1R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT markets, with deep expertise in safety-critical microcontrollers and radar processing.
The SPC5673KAVMM1R belongs to NXP's SPC567xF family - engineered specifically for ASIL-B/C automotive powertrain and chassis control, emphasizing real-time determinism, functional safety, and integration of timing-critical peripherals like eTPU2 and FlexRay.
FAQ
What is the maximum operating frequency of the SPC5673KAVMM1R?
The SPC5673KAVMM1R operates at a nominal maximum frequency of 200 MHz, with the FMPLL supporting frequency modulation for EMI reduction. This speed grade is confirmed in NXP's MPC5674F datasheet Rev. 11, Table 1 (Orderable Part Numbers), and applies across the full –40 °C to 125 °C ambient temperature range. The SPC5673KAVMM1R does not support the 264 MHz speed grade found in MPC5674F variants.
Does the SPC5673KAVMM1R include an External Bus Interface (EBI)?
No, the SPC5673KAVMM1R does not include an External Bus Interface. As documented in Table 2 ("MPC567xF Family Differences") of the MPC5674F datasheet Rev. 11, EBI is only available on 516-ball TEPBGA packages (e.g., SPC5674FK0MVY3) and is explicitly excluded from all 324-ball and 416-ball variants, including the SPC5673KAVMM1R. This simplifies PCB layout and reduces pin count for cost-sensitive ECU designs.
How many eTPU2 channels does the SPC5673KAVMM1R support?
The SPC5673KAVMM1R supports 47 eTPU2 channels: 32 on eTPU_A and 15 on eTPU_B (with no TCRCLK input on eTPU_B, per Table 2 of the MPC5674F datasheet Rev. 11). This configuration matches the MPC5673F derivative specification and is distinct from the 64-channel capability of MPC5674F devices. The shared 24 KB code RAM and 6 KB parameter RAM enable coordinated waveform generation across both units.
What is the flash and SRAM capacity of the SPC5673KAVMM1R?
The SPC5673KAVMM1R integrates 3 MB of on-chip C90 flash memory with read-while-program/erase capability and EEPROM emulation support, plus 192 KB of general-purpose SRAM - including 32 KB of battery-backed standby RAM. These values are specified in Table 2 ("MPC567xF Family Differences") of the MPC5674F datasheet Rev. 11 and distinguish the SPC5673F series from the 4 MB flash / 256 KB SRAM of MPC5674F devices.
Which package type and ball count does the SPC5673KAVMM1R use?
The SPC5673KAVMM1R uses a 324-ball TEPBGA package measuring 23 mm × 23 mm with Pb-free finish, as confirmed in Table 1 ("Orderable Part Numbers") and Section 5.1 ("324-Pin Package") of the MPC5674F datasheet Rev. 11. The "VZ" package identifier in the part number decoding (per Figure 1) maps to 324-ball Pb-free, and the "R" suffix indicates tape-and-reel packaging.
SPC5673KAVMM1R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 257-LFBGA
- Series:
- MPC56xx Qorivva
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z7d
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 150MHz
- Connectivity:
- CANbus, EBI/EMI, Ethernet, FlexRay, I2C, LINbus, SPI
- Peripherals:
- DMA, POR, PWM, WDT
- Number of I/O:
- -
- Program Memory Size:
- 1MB (1M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- 64K x 8
- RAM Size:
- 256K x 8
- Voltage - Supply (Vcc/Vdd):
- 1.14V ~ 5.5V
- Data Converters:
- A/D 22x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 105°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5673KAVMM1R FAQ
1.How can I place an order for SPC5673KAVMM1R through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5673KAVMM1R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5673KAVMM1R reliable?
The price and inventory of SPC5673KAVMM1R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5673KAVMM1R is usually 5 days.
3.What payment methods are accepted for SPC5673KAVMM1R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5673KAVMM1R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5673KAVMM1R?
SPC5673KAVMM1R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5673KAVMM1R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5673KAVMM1R?
For technical support, including SPC5673KAVMM1R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5673KAVMM1R requirements.
6.How does Aetrix verify that SPC5673KAVMM1R is sourced from the original manufacturer or authorized distributors?
All SPC5673KAVMM1R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5673KAVMM1R meets industry standards.
7.What is the process for return or replacement of SPC5673KAVMM1R?
All SPC5673KAVMM1R units undergo pre-shipment inspection (PSI). If there is an issue with SPC5673KAVMM1R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5673KAVMM1R part is unused and in its original packaging.
Return procedure for SPC5673KAVMM1R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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