NXP Semiconductors SPC5746CK1AMKU2
- Part No.:
- SPC5746CK1AMKU2
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 176-LQFP Exposed Pad
- Datasheet:
-
SPC5746CK1AMKU2.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 176LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:1,821
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SPC5746CK1AMKU2 from NXP Semiconductors is a dual-core automotive microcontroller featuring a 160 MHz e200z4 CPU and an 80 MHz e200z2 CPU, 3 MB on-chip flash, 384 KB SRAM with end-to-end ECC, and integrated FlexCAN FD (8 channels), Ethernet AVB/1588, and dual-channel FlexRay. It targets ASIL-B safety-critical powertrain and chassis control systems.
For engineers reviewing the SPC5746CK1AMKU2 datasheet, SPC5746CK1AMKU2 pinout, SPC5746CK1AMKU2 application, or SPC5746CK1AMKU2 equivalent, key selection criteria include dual-core deterministic timing, hardware security module (HSMv2), functional safety certification, and support for high-bandwidth automotive networks including CAN FD, FlexRay, and time-sensitive Ethernet.
Technical Context
The SPC5746CK1AMKU2 implements a tightly coupled dual-core architecture with crossbar switch interconnect enabling concurrent access to flash, RAM, and peripherals by both e200z4 and e200z2 cores. Its memory subsystem includes triple-ported 3 MB flash with page buffers and 384 KB SRAM distributed across three ports, all protected by SECDED ECC for bus transactions.
It integrates a comprehensive automotive I/O suite: eight FlexCAN3 modules with CAN FD support, dual-channel FlexRay 2.1, 10/100 Ethernet with AVB, 16 LINFlexD interfaces, four DSPI, four I²C, and two ADCs (10-bit and 12-bit). Clocking is managed via FMPLL, multiple oscillators (FXOSC, SXOSC, FIRC, SIRC), and RTC with CMU monitoring.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 160 MHz e200z4 + 80 MHz e200z2, supporting VLE for code density and single-precision floating-point operations |
| Flash Memory | 3 MB on-chip flash with triple-port controller, EEE support, and SECDED ECC protection for program/erase cycles |
| SRAM | 384 KB on-chip SRAM across three independent ports, all protected by end-to-end ECC |
| Automotive Interfaces | 8 × FlexCAN3 (CAN FD capable), dual-channel FlexRay 2.1, 10/100 Ethernet with AVB, IEEE 1588, MII/RMII |
| Analog Peripherals | Two ADCs (10-bit with 68 ch, 12-bit with 31 ch), three analog comparators, Cross Trigger Unit for synchronized sampling |
| Safety & Security | ISO 26262 ASIL-B certified; HSMv2 with PASS lifecycle management; FCCU fault collection; SMPU with 32 region descriptors |
| Package & Temperature | 176-pin LQFP-EP (KU package); qualified for –40°C to +125°C ambient operation (Grade M) |
Pinout & Package
SPC5746CK1AMKU2 is housed in a 176-pin Low-Profile Quad Flat Package with Exposed Pad (LQFP-EP), optimized for thermal dissipation in automotive engine control units and transmission controllers. Pin assignment follows NXP's standardized MPC5746C signal multiplexing scheme with configurable I/O domains for CAN, LIN, Ethernet, and general-purpose functions.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage IO supply rails | Independent 3.3 V or 5 V supplies for I/O banks; supports mixed-voltage operation and isolation of analog/digital domains |
| VDD_LV | Core logic supply | 1.2–1.32 V regulated core voltage; monitored by HVD_LV_cold and POR_LV for safe startup and brownout recovery |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; enables precise clock generation for real-time control loops and communication timing |
| SXOSC_IN / SXOSC_OUT | 32 kHz real-time clock oscillator | Drives RTC/API and low-power wake-up timers; critical for battery-backed timekeeping and sleep-mode scheduling |
| FMPLL_REFCLK | PLL reference input | Accepts FIRC (16 MHz), SXOSC (32 kHz), or FXOSC output; configures frequency-modulated PLL for CPU/peripheral clock domains |
| CAN0_TX / CAN0_RX | FlexCAN0 differential transceiver interface | Direct connection to external CAN PHY; supports ISO 11898-1 CAN FD up to 5 Mbps with programmable bit timing |
| ETH_MDIO / ETH_MDC | IEEE 802.3 management interface | Configures Ethernet PHY registers via SMI; required for AVB stream reservation and 1588 timestamp synchronization |
| JTAG_TCK / JTAG_TMS / JTAG_TDI / JTAG_TDO | Nexus Class 3+ debug interface | Enables real-time trace, non-intrusive debugging, and safety-critical software validation per IEEE-ISTO 5001-2008 |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core deterministic execution | Independent e200z4 and e200z2 cores with dedicated caches (8 KB i-cache / 4 KB d-cache) enable partitioned safety-critical and non-safety tasks without interference |
| End-to-end ECC protection | SECDED coverage across all bus masters, flash, SRAM, and peripheral interfaces ensures data integrity in harsh automotive environments |
| Hardware Security Module v2 (HSMv2) | Offloads cryptographic operations (AES-128/256, SHA-256, RSA-2048) and enforces secure boot, key provisioning, and life-cycle state transitions |
| Functional Safety Compliance | ASIL-B certified per ISO 26262:2018; includes FCCU fault collector, SMPU memory protection, and diagnostic coverage for clock, voltage, and memory subsystems |
| Automotive network convergence | Simultaneous support for CAN FD (8 channels), FlexRay (dual-channel), LIN (16 modules), and Ethernet AVB enables unified domain controller architectures |
Applications
| Powertrain Control Unit (PCU) | Electric Power Steering (EPS) |
|---|---|
Use Scenario: Real-time closed-loop control of gasoline/diesel engine combustion, turbocharger actuation, and exhaust gas recirculation using sensor fusion and model-based algorithms. IC Role / Device Role / Timing Role: Primary controller executing ASIL-B safety-critical torque calculation, fuel injection timing, and knock detection with sub-microsecond jitter tolerance. Use Value: Dual-core deterministic timing ensures guaranteed response to crank/cam signals; 3 MB flash stores complex calibration maps; FlexCAN FD enables high-speed ECU diagnostics and OTA updates. |
Use Scenario: High-bandwidth motor position, torque, and temperature feedback loop for assist torque generation and road feel emulation in steer-by-wire systems. IC Role / Device Role / Timing Role: Safety-certified host MCU managing motor control (FOC), sensor processing (resolver, Hall), and fail-safe torque limiting with dual-lockstep monitoring. Use Value: HSMv2 secures firmware updates; 8 FlexCAN FD channels handle multi-sensor data aggregation; Ethernet AVB synchronizes with ADAS domain for lane-centering coordination. |
| Brake-by-Wire Controller | Vehicle Domain Controller |
Use Scenario: Redundant hydraulic pressure modulation and wheel-speed-based ABS/EBD control under extreme thermal and EMI conditions. IC Role / Device Role / Timing Role: ASIL-D decomposed controller where SPC5746CK1AMKU2 handles non-fail-safe functions (diagnostics, communication) while supporting dual-lockstep monitoring paths. Use Value: SMPU enforces strict memory partitioning between safety and non-safety partitions; FCCU collects transient faults for root-cause analysis; 384 KB ECC SRAM buffers sensor history for predictive braking. |
Use Scenario: Centralized vehicle computing platform consolidating body, chassis, and infotainment functions with time-synchronized communication across domains. IC Role / Device Role / Timing Role: High-integration gateway MCU routing CAN FD, FlexRay, and Ethernet traffic while performing real-time arbitration and security policy enforcement. Use Value: Crossbar switch enables concurrent DMA transfers from 8 CAN FD controllers to Ethernet buffers; fractional clock dividers synchronize audio/video streams with SAI interfaces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5746C-MJ | Same core, flash, and peripheral set but in 256-pin MAPBGA package; higher pin count enables more CAN/LIN channels and larger memory expansion options | Preferred for space-constrained PCB layouts requiring finer pitch and improved thermal performance over LQFP-EP | Select when board area is limited and thermal design allows BGA reflow; requires X-ray inspection for solder joint reliability |
| SPC574SCK1AMKU2 | Derivative with identical package and pinout but reduced feature set: 2 MB flash, no FlexRay, no Ethernet, and only 6 FlexCAN FD channels | Targeted at cost-sensitive chassis modules (e.g., seat control, lighting) where full MPC5746C capability is unnecessary | Choose for non-safety-critical or lower-complexity applications where CAN FD and LIN suffice; avoids over-specification and licensing costs |
Compared with MPC5746C-MJ and SPC574SCK1AMKU2, the SPC5746CK1AMKU2 uniquely balances high integration (FlexRay + Ethernet + 8 CAN FD) with LQFP-EP manufacturability and ASIL-B certification-making it optimal for mid-tier powertrain and steering ECUs where BGA complexity is undesirable but full networking capability is mandatory.
Availability
SPC5746CK1AMKU2 is available at Aetrix Electronics and suitable for automotive powertrain control, electric power steering, brake-by-wire systems, and vehicle domain controllers requiring stable component supply, long-term lifecycle assurance, and automotive-grade traceability.
Supply support for SPC5746CK1AMKU2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in functional safety and automotive-grade microcontrollers.
The SPC5746CK1AMKU2 belongs to the SPC574x family of automotive MCUs designed specifically for ASIL-B powertrain and chassis control, emphasizing deterministic dual-core execution, hardware security, and multi-protocol automotive networking convergence.
FAQ
What is the maximum operating frequency of the SPC5746CK1AMKU2's primary CPU core?
The SPC5746CK1AMKU2 features a 160 MHz e200z4 core as its primary CPU, confirmed in the official NXP datasheet Rev. 6 (November 2018), Table 1 "MPC5746C Family Comparison". This frequency is validated across the full –40°C to +125°C ambient temperature range and supported by the FMPLL with appropriate oscillator inputs (FXOSC or FIRC). The secondary e200z2 core operates at 80 MHz.
Does the SPC5746CK1AMKU2 support CAN FD, and how many channels are available?
Yes, the SPC5746CK1AMKU2 supports CAN FD on all eight FlexCAN3 modules, as explicitly stated in the datasheet block diagram (Figure 1) and Table 1. Each channel is independently configurable for classic CAN or CAN FD (up to 5 Mbps), with dedicated message RAM and flexible bit timing registers-enabling high-throughput diagnostics and OTA firmware updates in modern E/E architectures.
What safety certifications apply to the SPC5746CK1AMKU2?
The SPC5746CK1AMKU2 is certified to ISO 26262 ASIL-B for specific safety mechanisms, including ECC memory protection, SMPU, FCCU fault collection, and clock/voltage monitoring. This certification is documented in Section 2.11 "Functional Safety" of the datasheet and applies to the full SPC5746C family, including the SPC5746CK1AMKU2 variant with KU (176 LQFP-EP) packaging.
Is the SPC5746CK1AMKU2 pin-compatible with other members of the MPC5746C family?
No-the SPC5746CK1AMKU2 uses the 176-pin LQFP-EP (KU) package, which is not pin-compatible with the 256-pin MAPBGA (MJ) or 324-pin MAPBGA (MN) variants of the MPC5746C. While signal functionality is consistent across packages, pin assignments differ significantly due to I/O multiplexing and package-specific ball/pad mapping, requiring separate PCB designs for each package option.
What is the role of the Hardware Security Module (HSMv2) in the SPC5746CK1AMKU2?
The HSMv2 in the SPC5746CK1AMKU2 provides dedicated cryptographic acceleration (AES-128/256, SHA-256, RSA-2048), secure boot verification, key provisioning, and lifecycle state management via the Password and Device Security (PASS) subsystem. It operates independently of the main CPUs to ensure confidentiality and integrity of firmware updates and secure communications in automotive telematics and OTA applications.
SPC5746CK1AMKU2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 176-LQFP Exposed Pad
- Series:
- MPC57xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz/160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 129
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 80x10b, 64x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5746CK1AMKU2 FAQ
1.How can I place an order for SPC5746CK1AMKU2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5746CK1AMKU2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5746CK1AMKU2 reliable?
The price and inventory of SPC5746CK1AMKU2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5746CK1AMKU2 is usually 5 days.
3.What payment methods are accepted for SPC5746CK1AMKU2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5746CK1AMKU2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5746CK1AMKU2?
SPC5746CK1AMKU2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5746CK1AMKU2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5746CK1AMKU2?
For technical support, including SPC5746CK1AMKU2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5746CK1AMKU2 requirements.
6.How does Aetrix verify that SPC5746CK1AMKU2 is sourced from the original manufacturer or authorized distributors?
All SPC5746CK1AMKU2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5746CK1AMKU2 meets industry standards.
7.What is the process for return or replacement of SPC5746CK1AMKU2?
All SPC5746CK1AMKU2 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5746CK1AMKU2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5746CK1AMKU2 part is unused and in its original packaging.
Return procedure for SPC5746CK1AMKU2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SPC5746CK1AMKU2 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

