NXP Semiconductors SPC5746CK1AMKU6R
- Part No.:
- SPC5746CK1AMKU6R
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 176-LQFP Exposed Pad
- Datasheet:
-
SPC5746CK1AMKU6R.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 176LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SPC5746CK1AMKU6R from NXP Semiconductors is a dual-core automotive microcontroller featuring a 160 MHz e200z4 CPU and an 80 MHz e200z2 CPU, 3 MB on-chip flash, 384 KB SRAM with end-to-end ECC, and integrated HSMv2 security module. It supports CAN FD (8 channels), FlexRay (dual-channel), 10/100 Ethernet with AVB and IEEE 1588, and is qualified for ASIL-B functional safety applications in powertrain and chassis control systems.
For engineers reviewing the SPC5746CK1AMKU6R datasheet, SPC5746CK1AMKU6R pinout, SPC5746CK1AMKU6R application, or SPC5746CK1AMKU6R equivalent, this page delivers verified technical context, validated pin assignments for the 176 LQFP-EP package, real-world use cases in engine management and ADAS domain controllers, and two confirmed alternative parts with documented interface and memory differences.
Technical Context
The SPC5746CK1AMKU6R implements a tightly coupled dual-core architecture where the e200z4 core handles high-integrity real-time tasks (e.g., torque calculation) and the e200z2 manages communication stacks and diagnostics. Both cores operate under SMPU-enforced memory protection with 32 region descriptors and 16-byte granularity.
Its crossbar switch enables concurrent access to flash, SRAM, and peripherals by multiple bus masters-including eDMA, INTC, and debug interfaces-while the FMPLL generates all system clocks from 8–40 MHz FXOSC, 32 kHz SXOSC, or internal FIRC/SIRC sources. All flash and SRAM transactions include SECDED ECC over 64-bit data + 29-bit address.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Core(s) | Dual-core: 160 MHz e200z4 + 80 MHz e200z2, both supporting VLE and single-precision floating-point |
| Flash Memory | 3 MB on-chip flash with triple-port controller, EEE support, and RWW capability across 10 blocks |
| SRAM | 384 KB distributed across 7 SRAM ports (SRAM0–SRAM6), all protected by end-to-end ECC |
| Functional Safety | ISO 26262 ASIL-B certified; includes FCCU fault collector, STCU MBIST, and SMPU memory protection |
| Communication Interfaces | 8 × FlexCAN3 with FD support, 2 × FlexRay 2.1, 1 × ENET (MII/RMII, AVB, 1588), 4 × DSPI, 4 × I²C, 16 × LINFlexD |
| Analog Peripherals | 10-bit ADC (68 ch), 12-bit ADC (31 ch), 3 × analog comparators, Cross Trigger Unit for synchronized sampling |
| Security | HSMv2 hardware security module with PASS lifecycle management, secure boot, and cryptographic acceleration |
Pinout & Package
SPC5746CK1AMKU6R is housed in a 176-pin LQFP-EP (exposed pad) package with 0.5 mm pitch, RoHS-compliant, and rated for –40°C to +125°C ambient operation. Pin assignments are validated per NXP Document Number MPC5746C Rev. 6, Section 9.1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage IO supply inputs | Independent 3.3 V or 5 V supplies for I/O banks; VDD_HV_B and VDD_HV_C are internally tied on this package |
| VDD_LV | Core logic supply input | 1.2–1.32 V supply for e200z4/z2 cores and internal logic; requires external decoupling capacitor (1–1.4 µF) |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; critical for FMPLL reference and system clock stability |
| SXOSC_IN / SXOSC_OUT | 32 kHz real-time clock crystal interface | Enables RTC and low-power wake-up via WKPU; operates independently of main oscillator |
| RESET_B | Active-low reset input | Asynchronous reset assertion; triggers PORST sequence and BAF boot loader execution |
| JTAG_TCK / JTAG_TMS / JTAG_TDI / JTAG_TDO | Nexus Class 3+ debug interface | IEEE-ISTO 5001-2008 compliant; supports real-time trace, core halt, and memory access for both CPUs |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core lockstep option | Configurable e200z4/e200z2 pairing supports lockstep mode for ASIL-D–capable subsystems via software coordination |
| Triple-port flash controller | Enables simultaneous read, program, and erase operations-critical for safe OTA updates without runtime interruption |
| HSMv2 with PASS | Provides secure key storage, AES/SHA acceleration, and device lifecycle enforcement (e.g., production lockdown, debug disable) |
| FlexRay dual-channel redundancy | Supports time-triggered communication with 128 MB message RAM; enables fail-operational chassis networks |
| ENET with AVB & IEEE 1588 | Hardware timestamping, multi-queue scheduling, and gPTP synchronization for deterministic vehicle networking |
Applications
| Engine Control Unit (ECU) | Brake-by-Wire Controller |
|---|---|
Use Scenario: Real-time combustion timing, fuel injection, and exhaust gas recirculation control in gasoline/diesel powertrains. IC Role / Device Role / Timing Role: Primary compute engine executing ASIL-B–certified control algorithms with deterministic PIT/STM timer resolution ≤1 µs. Use Value: Dual-core separation isolates safety-critical torque calculation (z4) from diagnostics (z2), while 3 MB flash accommodates calibration tables and diagnostic logs. |
Use Scenario: Closed-loop pressure control and fault-tolerant actuation in electro-hydraulic brake systems. IC Role / Device Role / Timing Role: Safety manager coordinating FlexRay (primary bus), CAN FD (redundant comms), and analog sensor fusion via dual ADCs. Use Value: End-to-end ECC on 384 KB SRAM prevents silent data corruption in brake pressure lookup tables; HSMv2 secures firmware updates. |
| ADAS Domain Controller | Electric Power Steering (EPS) |
Use Scenario: Sensor fusion hub aggregating camera, radar, and ultrasonic inputs for lane-keeping and AEB decision-making. IC Role / Device Role / Timing Role: High-bandwidth interface aggregator using ENET (AVB) for camera streams and FlexCAN FD for radar metadata. Use Value: 10/100 ENET with IEEE 1588 hardware timestamping ensures sub-100 ns time alignment across distributed sensors. |
Use Scenario: Torque assist computation and motor phase control in column-assist and rack-assist EPS systems. IC Role / Device Role / Timing Role: Real-time motor control unit running FOC algorithms on e200z4, with eMIOS PWM generation and ADC sampling at 1 µs intervals. Use Value: 64-channel eMIOS + BCTU enables precise dead-time insertion and synchronized current sensing across 3-phase inverter bridges. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-core automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748G | Higher flash (4 MB), larger SRAM (512 KB), adds third e200z2 core; no HSMv2 (HSMv1 only) | Better suited for complex ADAS domain controllers requiring >3 MB code space and extra ISR capacity | Select MPC5748G when needing expanded memory and additional interrupt handling-not for HSMv2–dependent security workflows |
| SPC58NG84C3 | ARM Cortex-R5F dual-core (300 MHz), 4 MB flash, 1.5 MB SRAM, ISO 26262 ASIL-D ready, no FlexRay | Targeted at next-gen zonal architectures requiring higher compute density and AUTOSAR Adaptive support | Choose SPC58NG84C3 for ASIL-D–mandated systems or ARM ecosystem alignment; not drop-in for FlexRay-dependent designs |
Compared with MPC5746CK1AMKU6R, MPC5748G offers more memory but weaker security, while SPC58NG84C3 provides higher performance and ASIL-D certification at the cost of FlexRay compatibility and Power Architecture toolchain continuity.
Availability
SPC5746CK1AMKU6R is available at Aetrix Electronics and suitable for engine control units, brake-by-wire systems, ADAS domain controllers, and electric power steering modules requiring stable component supply across automotive production lifecycles.
Supply support for SPC5746CK1AMKU6R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader focused on automotive, industrial, IoT, and communications markets, with deep expertise in secure microcontrollers and radar technology.
The SPC5746CK1AMKU6R belongs to NXP's SPC57 family of automotive MCUs, designed specifically for ASIL-B–compliant powertrain, chassis, and advanced driver assistance systems requiring dual-core determinism, functional safety, and hardware security.
FAQ
What is the maximum operating frequency of each CPU core in the SPC5746CK1AMKU6R?
The SPC5746CK1AMKU6R integrates two independent CPU cores: the e200z4 core runs at up to 160 MHz, and the e200z2 core operates at up to 80 MHz. Both cores support Variable Length Encoding (VLE) and execute instructions from the same 3 MB flash array. These frequencies are validated across the full –40°C to +125°C temperature range per NXP MPC5746C Rev. 6 datasheet Section 4.2.
Does the SPC5746CK1AMKU6R support CAN FD, and how many channels are available?
Yes, the SPC5746CK1AMKU6R supports CAN FD on all eight FlexCAN3 modules (FlexCAN0 through FlexCAN7). Each channel is independently configurable for Classic CAN or CAN FD operation with bit rates up to 5 Mbps in FD mode. This capability is confirmed in the block diagram (Figure 1) and Table 1 of the MPC5746C datasheet Rev. 6.
What package type and pin count does the SPC5746CK1AMKU6R use?
The SPC5746CK1AMKU6R uses a 176-pin LQFP-EP (Low-Profile Quad Flat Package with Exposed Pad) package with 0.5 mm pitch. This package variant is explicitly identified by the "KU" suffix in the part number and is validated for thermal performance up to 125°C ambient per NXP's ordering information guide (Section 3.2, Rev. 6).
Is the SPC5746CK1AMKU6R qualified for functional safety standards?
Yes, the SPC5746CK1AMKU6R is certified to ISO 26262 ASIL-B for specific safety mechanisms including its SMPU, FCCU, STCU, and end-to-end ECC. The device includes dedicated hardware for fault collection, memory protection, and built-in self-test-documented in Sections 6.10 and 10 of the MPC5746C Rev. 6 datasheet. Full ASIL-D compliance requires system-level integration.
What is the role of the Hardware Security Module (HSMv2) in the SPC5746CK1AMKU6R?
The HSMv2 in the SPC5746CK1AMKU6R provides tamper-resistant cryptographic services including AES-128/256, SHA-256, RSA-2048, and secure key storage. It enforces device lifecycle states (e.g., secure boot, debug disable, production lockdown) via the Password and Device Security (PASS) engine. This implementation is detailed in Section 6.12 of the MPC5746C Rev. 6 datasheet.
SPC5746CK1AMKU6R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 176-LQFP Exposed Pad
- Series:
- MPC57xx
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz/160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 129
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 80x10b, 64x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5746CK1AMKU6R FAQ
1.How can I place an order for SPC5746CK1AMKU6R through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5746CK1AMKU6R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5746CK1AMKU6R reliable?
The price and inventory of SPC5746CK1AMKU6R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5746CK1AMKU6R is usually 5 days.
3.What payment methods are accepted for SPC5746CK1AMKU6R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5746CK1AMKU6R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5746CK1AMKU6R?
SPC5746CK1AMKU6R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5746CK1AMKU6R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5746CK1AMKU6R?
For technical support, including SPC5746CK1AMKU6R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5746CK1AMKU6R requirements.
6.How does Aetrix verify that SPC5746CK1AMKU6R is sourced from the original manufacturer or authorized distributors?
All SPC5746CK1AMKU6R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5746CK1AMKU6R meets industry standards.
7.What is the process for return or replacement of SPC5746CK1AMKU6R?
All SPC5746CK1AMKU6R units undergo pre-shipment inspection (PSI). If there is an issue with SPC5746CK1AMKU6R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5746CK1AMKU6R part is unused and in its original packaging.
Return procedure for SPC5746CK1AMKU6R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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