NXP Semiconductors SPC5746CK1MKU2
- Part No.:
- SPC5746CK1MKU2
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 176-LQFP Exposed Pad
- Datasheet:
-
SPC5746CK1MKU2.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 176LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SPC5746CK1MKU2 from NXP Semiconductors is a dual-core automotive microcontroller featuring a 160 MHz e200z4 CPU and an 80 MHz e200z2 CPU, 3 MB on-chip flash, 384 KB SRAM with end-to-end ECC, and integrated FlexCAN FD (8 channels), Ethernet AVB/1588, and dual-channel FlexRay. It targets ASIL-B safety-critical powertrain and chassis control units.
For engineers reviewing the SPC5746CK1MKU2 datasheet, SPC5746CK1MKU2 pinout, SPC5746CK1MKU2 application, or SPC5746CK1MKU2 equivalent, key selection criteria include dual-core deterministic timing, hardware security module (HSMv2), functional safety certification, and support for high-bandwidth automotive networks including CAN FD, FlexRay, and Ethernet AVB.
Technical Context
The SPC5746CK1MKU2 implements a crossbar switch architecture enabling concurrent access to flash, SRAM, and peripherals by multiple bus masters-including both e200z4 and e200z2 cores, eDMA, and ENET. Its System Memory Protection Unit (SMPU) provides 32 region descriptors with 16-byte granularity for memory partitioning across safety domains.
Timing integrity is enforced via three independent clock domains: FXOSC (8–40 MHz), SXOSC (32 kHz), and FIRC (16 MHz), all feeding into a frequency-modulated PLL (FMPLL) and monitored by a Clock Monitor Unit (CMU). Real-time determinism is enhanced by 64 eMIOS channels, 16 PIT timers, and two STM modules with synchronized trigger routing through the Cross Trigger Unit.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 160 MHz e200z4 + 80 MHz e200z2, both supporting VLE and single-precision floating-point |
| Flash Memory | 3 MB on-chip flash with triple-port controller, ECC protection, and RWW capability for background programming |
| SRAM | 384 KB distributed across three RAM ports, all protected by end-to-end SECDED ECC |
| Automotive Interfaces | 8 × FlexCAN FD, 16 × LINFlexD, 4 × DSPI, 4 × I²C, dual-channel FlexRay 2.1, and 10/100 Ethernet with AVB/IEEE 1588 |
| Safety & Security | ISO 26262 ASIL-B certified; HSMv2 with PASS lifecycle management; FCCU fault collection; SMPU with 32 regions |
| Analog Peripherals | Two ADCs (10-bit + 12-bit), three analog comparators, and Cross Trigger Unit for timer-synchronized conversions |
| Package | 176-pin LQFP-EP (KU package), lead-free, RoHS-compliant, rated for –40°C to +125°C ambient |
Pinout & Package
SPC5746CK1MKU2 is housed in a 176-pin LQFP-EP (exposed pad) package with 0.5 mm pitch, optimized for automotive thermal and EMI performance. The exposed pad must be soldered to PCB ground for thermal dissipation and noise immunity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / B / C | High-voltage I/O supply rails | Independent 3.3 V or 5.0 V supplies for I/O banks; enable mixed-voltage interfacing with sensors, transceivers, and legacy ECUs |
| VDD_LV | Core logic supply | 1.2–1.32 V regulated input for e200z4/z2 cores and internal logic; requires low-ESR decoupling per NXP layout guidelines |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; critical for FMPLL reference and system clock stability in engine control applications |
| SXOSC_IN / SXOSC_OUT | 32 kHz real-time clock crystal | Enables RTC operation during stop modes; used for wake-up timing and low-power scheduling in body control modules |
| ENET_MDC / MDIO | IEEE 802.3 management interface | Configures Ethernet PHY registers; required for AVB stream reservation and time-synchronization setup in gateway designs |
| FLEXRAY_CHA_TX / RX | FlexRay Channel A differential pair | Complies with FlexRay 2.1 physical layer; supports deterministic 10 Mbps communication for brake-by-wire and steer-by-wire systems |
| CAN0_TX / CAN0_RX | FlexCAN FD Channel 0 differential pair | Supports CAN FD up to 5 Mbps data phase; enables high-throughput firmware updates and diagnostic logging in modern ECUs |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core lockstep option | Configurable e200z4/e200z2 pairing enables asymmetric processing or lockstep execution for ASIL-D decomposition |
| HSMv2 with PASS | Hardware Security Module v2 supports secure boot, cryptographic acceleration (AES-128/256, SHA-256), and device lifecycle management |
| End-to-end ECC | SECDED protection across all bus transactions-flash, SRAM, peripherals-ensuring data integrity in radiation-prone environments |
| Multi-domain I/O configuration | Configurable I/O voltage domains allow simultaneous 3.3 V CAN FD, 5 V LIN, and 1.8 V sensor interfaces without level shifters |
| ENET with AVB & IEEE 1588 | Hardware timestamping, multi-queue buffering, and gPTP synchronization enable time-critical audio/video streaming and OTA update orchestration |
Applications
| Powertrain Control Unit | Advanced Driver Assistance System (ADAS) Gateway |
|---|---|
Use Scenario: Real-time combustion timing, torque calculation, and emissions control in gasoline/diesel engines. IC Role / Device Role / Timing Role: Primary MCU executing ASIL-B safety-critical control loops with deterministic response under 10 µs jitter. Use Value: Dual-core architecture isolates safety-critical functions (e200z4) from diagnostics and communication (e200z2), while 8 FlexCAN FD channels handle actuator feedback and OBD-II reporting. |
Use Scenario: Aggregating radar, camera, and ultrasonic sensor data for fusion and decision-making in Level 2+ ADAS. IC Role / Device Role / Timing Role: Central gateway processor managing time-synchronized data ingestion via FlexRay and CAN FD, and forwarding to domain controllers over Ethernet AVB. Use Value: IEEE 1588 hardware timestamping and multi-queue ENET ensure sub-microsecond time alignment across heterogeneous sensor inputs, critical for sensor fusion accuracy. |
| Electric Vehicle Battery Management System | Chassis Domain Controller |
Use Scenario: Cell voltage monitoring, thermal management, and SOC/SOH estimation across 100+ battery cells. IC Role / Device Role / Timing Role: Safety-certified host controller interfacing with analog front-ends via 12-bit ADC and SPI, executing ISO 26262-compliant BMS algorithms. Use Value: 384 KB ECC-protected SRAM stores calibration tables and fault logs; HSMv2 secures firmware updates and cryptographic key storage for over-the-air reprogramming. |
Use Scenario: Coordinating braking, steering, and suspension actuators in x-by-wire architectures. IC Role / Device Role / Timing Role: Deterministic real-time controller with dual FlexRay channels for fail-operational redundancy and 16 eMIOS channels for PWM generation and capture. Use Value: SMPU-enforced memory isolation prevents software faults in one subsystem (e.g., suspension) from compromising brake control execution in adjacent safety partitions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748G | Higher flash (4 MB), larger SRAM (512 KB), adds USB OTG and additional ADC channels; same dual-core e200z4/z2 architecture and safety features | Better suited for complex ADAS domain controllers requiring large code footprint and USB-based debugging or diagnostics | Select MPC5748G when >3 MB flash or USB connectivity is required; SPC5746CK1MKU2 remains optimal for cost-sensitive powertrain ECUs with proven 3 MB allocation. |
| SPC58EC80E5 | Next-generation S32K-compatible core (e200z7), higher clock (200 MHz), Arm TrustZone security, but no FlexRay and reduced CAN FD count (6 vs 8) | Targets newer vehicle platforms migrating to S32K ecosystem; lacks FlexRay needed for legacy chassis systems | Choose SPC5746CK1MKU2 for FlexRay-dependent applications (e.g., brake-by-wire); SPC58EC80E5 fits future-proof designs prioritizing Arm toolchain and TrustZone over FlexRay. |
Compared with MPC5748G and SPC58EC80E5, the SPC5746CK1MKU2 delivers optimal balance of FlexRay support, 8-channel CAN FD bandwidth, and ASIL-B certification in a mature, production-proven 176-LQFP package-making it the preferred choice for cost-constrained, FlexRay-reliant automotive control units where USB or Arm migration are not required.
Availability
SPC5746CK1MKU2 is available at Aetrix Electronics and suitable for powertrain control, ADAS gateways, and electric vehicle battery management systems requiring stable component supply, long-term automotive qualification, and full traceability.
Supply support for SPC5746CK1MKU2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in functional safety and automotive-grade reliability.
The SPC5746CK1MKU2 belongs to NXP's SPC57 family of Power Architecture® microcontrollers, designed specifically for ASIL-B automotive control applications demanding high computational throughput, robust communication, and hardware-enforced safety mechanisms.
FAQ
What is the operating temperature range for the SPC5746CK1MKU2?
The SPC5746CK1MKU2 is qualified for automotive operation from –40°C to +125°C ambient temperature (Ta), with junction temperature (Tj) rated up to 150°C. This rating complies with AEC-Q100 Grade 1 requirements and supports deployment in under-hood powertrain and chassis control modules where thermal stress is significant. The 176-LQFP-EP package includes an exposed thermal pad to facilitate heat dissipation within this envelope.
Does the SPC5746CK1MKU2 support CAN FD, and how many channels are available?
Yes, the SPC5746CK1MKU2 integrates eight FlexCAN3 modules, all supporting CAN FD protocol with data rates up to 5 Mbps in the data phase. Each channel operates independently with configurable bit timing, message buffers, and error counters. This enables high-bandwidth communication for firmware updates, diagnostic logging, and real-time actuator feedback in modern ECU architectures without requiring external CAN FD transceivers.
Is the SPC5746CK1MKU2 ISO 26262 ASIL-B certified, and what safety features does it include?
Yes, the SPC5746CK1MKU2 is certified to ISO 26262 ASIL-B for specific safety mechanisms. It includes end-to-end ECC on all memory and bus transactions, a Fault Collection and Control Unit (FCCU), System Memory Protection Unit (SMPU) with 32 regions, hardware watchdog timers (SWT/STM/PIT), and lockstep-capable dual-core configuration. These features collectively support safety goals in powertrain and chassis applications, with documentation provided in NXP's Functional Safety Manual for MPC5746C.
What debug interfaces does the SPC5746CK1MKU2 support, and are they production-accessible?
The SPC5746CK1MKU2 supports IEEE 1149.1 JTAG and IEEE 1149.7 cJTAG for boundary scan and debug, plus Nexus Class 3+ trace for both e200z4 and e200z2 cores. All debug interfaces remain accessible in production devices and are compatible with standard tools including Lauterbach TRACE32 and PLS UDE. Debug authentication and access control can be configured via the Password and Device Security (PASS) module to prevent unauthorized firmware extraction.
What is the flash memory architecture of the SPC5746CK1MKU2, and does it support read-while-write (RWW)?
The SPC5746CK1MKU2 contains 3 MB of on-chip flash organized into ten 256 KB blocks, with dedicated RWW partitions in the data flash region (e.g., 0x00FC0000–0x00FFFFFF). The triple-port flash memory controller allows concurrent read, program, and erase operations-enabling background firmware updates without halting application execution. All flash accesses are protected by SECDED ECC, and the Boot Assist Flash (BAF) module supports in-system programming via SCI or CAN.
SPC5746CK1MKU2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 176-LQFP Exposed Pad
- Series:
- MPC57xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz/160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 129
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 80x10b, 64x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5746CK1MKU2 FAQ
1.How can I place an order for SPC5746CK1MKU2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5746CK1MKU2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5746CK1MKU2 reliable?
The price and inventory of SPC5746CK1MKU2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5746CK1MKU2 is usually 5 days.
3.What payment methods are accepted for SPC5746CK1MKU2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5746CK1MKU2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5746CK1MKU2?
SPC5746CK1MKU2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5746CK1MKU2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5746CK1MKU2?
For technical support, including SPC5746CK1MKU2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5746CK1MKU2 requirements.
6.How does Aetrix verify that SPC5746CK1MKU2 is sourced from the original manufacturer or authorized distributors?
All SPC5746CK1MKU2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5746CK1MKU2 meets industry standards.
7.What is the process for return or replacement of SPC5746CK1MKU2?
All SPC5746CK1MKU2 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5746CK1MKU2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5746CK1MKU2 part is unused and in its original packaging.
Return procedure for SPC5746CK1MKU2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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