NXP Semiconductors SPC5746CK1MMJ6

Overview

SPC5746CK1MMJ6 from NXP Semiconductors is a dual-core automotive microcontroller featuring a 160 MHz e200z4 CPU and an 80 MHz e200z2 CPU, 3 MB on-chip flash, 384 KB SRAM with end-to-end ECC, and integrated HSMv2 security module. It supports CAN FD (8 channels), FlexRay (dual-channel), 10/100 Ethernet with AVB and IEEE 1588, and is certified to ISO 26262 ASIL-B for safety-critical powertrain and chassis control applications.

For engineers reviewing the SPC5746CK1MMJ6 datasheet, SPC5746CK1MMJ6 pinout, SPC5746CK1MMJ6 application, or SPC5746CK1MMJ6 equivalent, this page delivers verified technical context, validated pin assignments for the 256-pin MAPBGA package, real-world use cases in engine control and ADAS domain controllers, and two confirmed alternative parts with documented functional and packaging differences.

Technical Context

The SPC5746CK1MMJ6 implements a tightly coupled dual-CPU architecture: the high-performance e200z4 core handles real-time deterministic tasks like torque calculation and safety monitoring, while the e200z2 core manages communication stacks and diagnostics. Both cores share access to memory and peripherals via a crossbar switch with SMPU-enforced memory protection across 32 regions.

Its clock system integrates FMPLL, multiple oscillators (FXOSC 8–40 MHz, SXOSC 32 kHz, FIRC 16 MHz, SIRC 128 kHz), and a Clock Monitor Unit (CMU) for fail-safe timing supervision. All bus masters-including CPUs, DMA, and peripherals-generate SECDED codes covering 64-bit data and 29-bit addresses, ensuring full end-to-end ECC integrity across flash, SRAM, and interconnects.

Key Specifications

Pinout & Package

SPC5746CK1MMJ6 is housed in a 256-pin MAPBGA (package code MJ) with 15 mm × 15 mm body size and 0.8 mm ball pitch. The package supports configurable I/O domains for FlexCAN, LINFlexD, Ethernet, and general-purpose GPIO, with dedicated power/ground ball arrays for noise isolation and thermal dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-core automotive microcontroller applications.

Compared with SPC5746CK1MMJ6, MPC5746C-K1MJ6 offers identical functionality with identical qualification, while SPC574SCK1MMJ6 trades security, networking, and memory capacity for lower BOM cost - making it suitable only for non-networked, non-security-critical automotive modules.

Availability

SPC5746CK1MMJ6 is available at Aetrix Electronics and suitable for engine control units, brake-by-wire systems, and ADAS domain controllers requiring stable component supply, long-term automotive lifecycle support, and guaranteed traceable sourcing.

Supply support for SPC5746CK1MMJ6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in functional safety and automotive-grade reliability.

The SPC5746CK1MMJ6 belongs to NXP's SPC574x family of Power Architecture® microcontrollers, designed specifically for ASIL-B/C automotive powertrain, chassis, and advanced driver assistance systems requiring deterministic dual-core processing and hardware security.

FAQ

What is the maximum operating frequency of each CPU core in the SPC5746CK1MMJ6?

The SPC5746CK1MMJ6 integrates two independent CPU cores: the e200z4 core operates at up to 160 MHz, and the e200z2 core runs at up to 80 MHz. Both cores support Variable Length Encoding (VLE) to reduce code footprint. These frequencies are validated across the full automotive temperature range (-40°C to +125°C) and are sustained under worst-case voltage and process corners per NXP's Rev. 6 datasheet.

Does the SPC5746CK1MMJ6 support CAN FD, and how many channels are available?

Yes, the SPC5746CK1MMJ6 supports CAN FD on all eight FlexCAN3 modules. Each channel is independently configurable for classic CAN or CAN FD operation with bit rates up to 5 Mbps in FD mode. This capability is confirmed in the "Communication" section of the official datasheet and is enabled by hardware-level message filtering and RAM-based message buffers.

What package type and pin count does the SPC5746CK1MMJ6 use?

The SPC5746CK1MMJ6 uses a 256-ball MAPBGA package (package code MJ), measuring 15 mm × 15 mm with 0.8 mm ball pitch. It is qualified for automotive applications with MSL3 moisture sensitivity level and operates over -40°C to +125°C ambient temperature. Pinout details are documented in Section 9 ("Pinouts") of the MPC5746C datasheet Rev. 6.

Is the SPC5746CK1MMJ6 ISO 26262 ASIL-B certified, and what safety features does it include?

Yes, the SPC5746CK1MMJ6 is certified to ISO 26262 ASIL-B for safety-related automotive applications. Key safety features include end-to-end ECC on all memory and buses, System Memory Protection Unit (SMPU) with 32 region descriptors, Fault Collection and Control Unit (FCCU), Clock Monitor Unit (CMU), and hardware watchdog timers (SWT/STM). These are implemented in silicon and validated per NXP's safety manual.

What is the role of the Hardware Security Module (HSMv2) in the SPC5746CK1MMJ6?

The HSMv2 in the SPC5746CK1MMJ6 provides dedicated cryptographic acceleration (AES-128/256, SHA-256, RSA), secure boot verification, key provisioning, and life-cycle state management via Password and Device Security (PASS). It operates independently from the main cores and is used to enforce secure OTA updates, SecOC message authentication, and tamper-resistant key storage - all required for AUTOSAR-compliant secure gateways and domain controllers.