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NXP Semiconductors SPC5746CSK1MMH6
- Part No.:
- SPC5746CSK1MMH6
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 100-LFBGA
- Datasheet:
-
SPC5746CSK1MMH6.pdf
- Description:
- IC MCU 32BIT 3MB FLASH 100MAPBGA
- Quantity:
- Payment:
- Shipping:
Inventory:3,283
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Product details
Overview
SPC5746CSK1MMH6 from NXP Semiconductors is a dual-core automotive microcontroller featuring a 160 MHz e200z4 CPU and an 80 MHz e200z2 CPU, 3 MB on-chip flash, 384 KB SRAM with end-to-end ECC, and integrated HSMv2 security module. It supports CAN FD across eight FlexCAN controllers, Ethernet (10/100 with AVB, IEEE 1588), and dual-channel FlexRay - deployed in engine control units, transmission control modules, and ADAS domain controllers.
For engineers reviewing the SPC5746CSK1MMH6 datasheet, SPC5746CSK1MMH6 pinout, SPC5746CSK1MMH6 application, or SPC5746CSK1MMH6 equivalent, key selection considerations include ASIL-B functional safety compliance, dual-core deterministic real-time execution, flash memory partitioning for RWW operation, and hardware-accelerated cryptographic services via HSMv2.
Technical Context
The SPC5746CSK1MMH6 implements a crossbar switch architecture enabling concurrent access to flash, SRAM, and peripherals by multiple bus masters including both CPUs and the 32-channel eDMA. Its memory subsystem includes triple-port flash memory controller with three page buffers and SMPU with 32 region descriptors for fine-grained memory protection.
Timing infrastructure integrates FMPLL with frequency modulation, RTC, CMU clock monitoring, and multiple oscillators (FXOSC 8–40 MHz, SXOSC 32 kHz, FIRC 16 MHz, SIRC 128 kHz). Safety-critical functions are supported by FCCU fault collection, SWT watchdogs, and ISO 26262 ASIL-B-certifiable subsystems including ADCs, comparators, and eMIOS timers.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Dual-core: 160 MHz e200z4 + 80 MHz e200z2 with VLE encoding and single-precision FPU on z4 |
| Flash Memory | 3 MB on-chip flash with ECC, triple-port controller, and RWW capability across 12 blocks |
| SRAM | 384 KB distributed across 7 SRAM banks (SRAM0–SRAM6), all protected by ECC |
| Functional Safety | ISO 26262 ASIL-B compliant; includes FCCU, SWT, STM, PIT, and SMPU for fault detection and isolation |
| Communication Interfaces | 8 × FlexCAN3 (CAN FD capable), 4 × DSPI, 4 × SPI, 16 × LINFlexD, 4 × I²C, ENET (MII/RMII + AVB + IEEE 1588), dual FlexRay |
| Analog Peripherals | Two ADCs (10-bit with 68 channels, 12-bit with 31 channels), 3 analog comparators, Cross Trigger Unit for synchronized sampling |
| Security | HSMv2 hardware security module with cryptographic acceleration, PASS life-cycle management, and secure boot via BAF |
Pinout & Package
SPC5746CSK1MMH6 is housed in a 256-pin MAPBGA package (package code MJ) with 0.8 mm pitch, thermal pad, and 17 × 17 mm body size. Pin assignments follow the MPC5746C family pinout specification per Rev. 6 datasheet Section 9.1.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage IO supply rails | Independent 3.3 V or 5 V supplies for I/O domains; support mixed-voltage operation |
| VDD_LV | Core logic supply | 1.2–1.32 V regulated core voltage for e200z4/z2 execution and cache operation |
| VDD_HV_FLA | Flash memory supply | 3.3 V supply for embedded flash; internally regulated when VDD_HV_A = 5 V; tied to VDD_HV_A when 3.3 V |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal for primary clock source with FMPLL input |
| SXOSC_IN / SXOSC_OUT | 32 kHz crystal interface | Provides low-power clock source for RTC and wake-up from standby modes |
| JTAG_TCK / JTAG_TMS / JTAG_TDI / JTAG_TDO / JTAG_TRST | Nexus Class 3+ debug interface | IEEE-ISTO 5001-2008 compliant debug port supporting both e200z4 and e200z2 cores |
| FLEXCAN0_TX / FLEXCAN0_RX | First CAN FD transceiver pair | Differential signaling pins for CAN FD communication at up to 5 Mbps; integrated termination and filtering |
| ENET_MDC / ENET_MDIO / ENET_TXD[0:3] / ENET_RXD[0:3] | Ethernet physical layer interface | MII/RMII-compliant signals supporting 10/100 Mbps, AVB time-synchronization, and IEEE 1588 timestamping |
Key Features
| Feature | Design Value |
|---|---|
| Dual-core deterministic execution | Independent e200z4 (160 MHz) and e200z2 (80 MHz) cores enable safety-critical task segregation and real-time response guarantees |
| End-to-end ECC protection | SECDED applied to all 64-bit data + 29-bit address transactions across flash, SRAM, and interconnect - prevents silent data corruption |
| Hardware Security Module v2 (HSMv2) | Offloads AES-128/256, SHA-256, RSA-2048, and ECDSA operations; supports secure boot, key provisioning, and anti-tamper lifecycle management |
| Configurable I/O domains | Per-pin voltage domain assignment enables simultaneous 3.3 V and 5 V interfaces (e.g., FlexCAN, LINFlexD, Ethernet PHY) without level shifters |
| Multi-queue Ethernet complex | Hardware-accelerated AVB traffic shaping, IEEE 1588 timestamping, and priority-based queue management for deterministic network latency |
| Boot Assist Flash (BAF) | Enables field firmware updates via SCI serial link without external programmer; supports encrypted image loading and signature verification |
Applications
| Engine Control Unit (ECU) | Transmission Control Module (TCM) |
|---|---|
Use Scenario: Real-time combustion timing, fuel injection pulse width, and knock detection in gasoline/diesel powertrains. IC Role / Device Role / Timing Role: Primary MCU executing ASIL-B control algorithms with dual-core lockstep supervision and fault-tolerant ADC sampling. Use Value: 160 MHz e200z4 delivers sub-1 µs interrupt latency for spark/fuel actuation; ECC-protected 3 MB flash ensures reliable storage of calibration maps and diagnostics. |
Use Scenario: Gearshift scheduling, clutch pressure control, and torque converter lockup management in 8-speed automatic transmissions. IC Role / Device Role / Timing Role: Dual-core coordination between high-frequency PWM generation (e200z4) and state-machine sequencing (e200z2) with shared SRAM coherency. Use Value: 384 KB ECC SRAM enables real-time buffer storage for 100+ sensor inputs; 8 FlexCAN FD channels support multi-node CAN FD backbone with >2 Mbps payload throughput. |
| ADAS Domain Controller | Electric Power Steering (EPS) |
Use Scenario: Sensor fusion hub aggregating camera, radar, and ultrasonic data for lane-keeping and emergency braking decisions. IC Role / Device Role / Timing Role: Central processing node managing time-synchronized data ingestion via Ethernet AVB and CAN FD, with HSMv2 securing OTA update payloads. Use Value: ENET complex with IEEE 1588 timestamping aligns sensor timestamps within ±100 ns; dual FlexRay supports legacy radar synchronization while CAN FD handles actuator commands. |
Use Scenario: Torque assist calculation, motor phase current regulation, and steering angle feedback correction in column-assist EPS systems. IC Role / Device Role / Timing Role: Safety-critical controller executing ASIL-C decomposition via dual-core monitoring, with eMIOS generating precise 20 kHz PWM for 3-phase inverter gate drivers. Use Value: 64-channel eMIOS provides dedicated timer resources for independent motor phase control; FCCU detects voltage/current faults and triggers safe shutdown within <50 µs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748G | Higher RAM (512 KB), additional 2x FlexCAN, no HSMv2; uses same e200z4/z2 cores and pin-compatible 256 BGA package | Targeted at non-security-critical ADAS vision processing where larger buffer space outweighs cryptographic needs | Select MPC5748G only if HSMv2 is not required and additional CAN/FlexRay bandwidth is needed for sensor aggregation |
| SPC5777M | Tri-core (e200z7 + dual e200z4), 4 MB flash, 512 KB SRAM, HSMv2+, ASIL-D ready; 324 BGA package (not pin-compatible) | Designed for zonal E/E architectures requiring higher compute density and full ASIL-D decomposition | Choose SPC5777M only when migrating to next-gen chassis domain controllers needing >2× CPU performance and formal ASIL-D certification evidence |
Compared with MPC5748G and SPC5777M, the SPC5746CSK1MMH6 uniquely balances ASIL-B safety, HSMv2 security, and CAN FD/Ethernet connectivity in a cost-optimized 256 BGA footprint - making it the preferred choice for Tier-1 powertrain and chassis modules requiring field-proven qualification and production longevity.
Availability
SPC5746CSK1MMH6 is available at Aetrix Electronics and suitable for engine control units, transmission control modules, and ADAS domain controllers requiring stable component supply across extended automotive product lifecycles.
Supply support for SPC5746CSK1MMH6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in functional safety and automotive-grade microcontrollers.
The SPC5746CSK1MMH6 belongs to NXP's SPC57 family of automotive MCUs, designed specifically for ASIL-B powertrain and chassis control applications requiring dual-core determinism, hardware security, and multi-protocol vehicle networking.
FAQ
What is the operating temperature range for the SPC5746CSK1MMH6?
The SPC5746CSK1MMH6 is qualified for ambient temperatures from –40 °C to +125 °C (Ta), with junction temperature rated up to +150 °C. This rating complies with AEC-Q100 Grade 1 requirements and supports deployment in under-hood engine control and transmission applications where thermal stress is critical. The device maintains full functionality and electrical specifications across this range when operated within recommended supply voltages and cooling conditions specified in the datasheet.
Does the SPC5746CSK1MMH6 support CAN FD, and how many instances are available?
Yes, the SPC5746CSK1MMH6 supports CAN FD across all eight FlexCAN3 modules (FlexCAN0 through FlexCAN7), each configurable for classical CAN or CAN FD operation up to 5 Mbps. These controllers implement ISO 11898-1:2015 and support flexible data-rate arbitration, CRC enhancements, and payload lengths up to 64 bytes - essential for high-bandwidth powertrain diagnostics and software updates. The SPC5746CSK1MMH6 datasheet confirms CAN FD capability is enabled on all eight instances in the MPC5746C family.
What security features does the SPC5746CSK1MMH6 include beyond HSMv2?
Beyond the Hardware Security Module v2 (HSMv2), the SPC5746CSK1MMH6 integrates Password and Device Security (PASS) for advanced life-cycle management, Boot Assist Flash (BAF) with secure serial programming, and cryptographic key provisioning via one-time programmable fuses. It also supports secure debug authentication, memory encryption keys stored in protected registers, and tamper-detection circuitry monitored by the Fault Collection and Control Unit (FCCU). All security functions are documented in the SPC5746CSK1MMH6 reference manual and validated per EVITA Medium profile.
Is the SPC5746CSK1MMH6 pin-compatible with other MPC5746x variants?
Yes, the SPC5746CSK1MMH6 shares identical pinout and package (256-pin MAPBGA, MJ code) with all MPC5746B/C variants in the same package option, including MPC5746BK0MJ6 and MPC5746CK0MJ6. Pin compatibility extends to power, ground, clock, reset, JTAG, and peripheral signal assignments per datasheet Section 9.1. However, feature enablement (e.g., HSM, CAN FD, FlexRay) depends on mask revision and configuration fuses - not physical pin mapping.
What development tools are officially supported for the SPC5746CSK1MMH6?
NXP officially supports the SPC5746CSK1MMH6 with S32 Design Studio IDE (v3.5+), S32 Configuration Tool, and MPC5746C Reference Manual (Rev. 7). Hardware tools include the S32K144EVB-Q100 evaluation board (for software prototyping), standalone MPC5746C development kits with JTAG/Nexus debug probes, and PE Micro Cyclone FX programmers. AUTOSAR 4.3+ and SafeRTOS BSPs are available through NXP's S32 Software Development Kit.
SPC5746CSK1MMH6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 100-LFBGA
- Series:
- MPC57xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz/160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- -
- Program Memory Size:
- 3MB (3M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 80x10b, 64x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5746CSK1MMH6 FAQ
1.How can I place an order for SPC5746CSK1MMH6 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5746CSK1MMH6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5746CSK1MMH6 reliable?
The price and inventory of SPC5746CSK1MMH6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5746CSK1MMH6 is usually 5 days.
3.What payment methods are accepted for SPC5746CSK1MMH6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5746CSK1MMH6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5746CSK1MMH6?
SPC5746CSK1MMH6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5746CSK1MMH6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5746CSK1MMH6?
For technical support, including SPC5746CSK1MMH6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5746CSK1MMH6 requirements.
6.How does Aetrix verify that SPC5746CSK1MMH6 is sourced from the original manufacturer or authorized distributors?
All SPC5746CSK1MMH6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5746CSK1MMH6 meets industry standards.
7.What is the process for return or replacement of SPC5746CSK1MMH6?
All SPC5746CSK1MMH6 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5746CSK1MMH6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5746CSK1MMH6 part is unused and in its original packaging.
Return procedure for SPC5746CSK1MMH6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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