My Inquiry
My Account
NXP Semiconductors SPC5747CBK0AMKU6
- Part No.:
- SPC5747CBK0AMKU6
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 176-LQFP Exposed Pad
- Datasheet:
-
SPC5747CBK0AMKU6.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 176LQFP
- Quantity:
- Payment:
- Shipping:
Inventory:3,187
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SPC5747CBK0AMKU6 from NXP Semiconductors is an automotive-qualified Power Architecture® 32-bit microcontroller featuring dual e200Z4 cores (160 MHz) and one e200Z2 core (80 MHz), 4 MB on-chip flash, 512 KB SRAM with end-to-end ECC, and integrated FlexCAN3 with FD support. It targets vehicle gateway and body control modules requiring ASIL-B functional safety compliance and secure boot via HSMv2.
For engineers reviewing the SPC5747CBK0AMKU6 datasheet, SPC5747CBK0AMKU6 pinout, SPC5747CBK0AMKU6 application, or SPC5747CBK0AMKU6 equivalent, this part delivers deterministic real-time execution across three CPU cores, hardware memory protection (SMPU), 96-channel eMIOS timer I/O, and dual Ethernet interfaces - all in a 176-pin LQFP-EP package rated for –40°C to +125°C operation.
Technical Context
The SPC5747CBK0AMKU6 implements a multi-core architecture with two high-performance e200Z4 CPUs (dual-issue, single-precision FPU, VLE encoding) and one e200Z2 CPU (single-issue, VLE), all sharing coherent bus infrastructure with triple-port flash controller and three RAM ports. Its clock system integrates FMPLL, 8–40 MHz FXOSC, 32 kHz SXOSC, and 16 MHz FIRC for flexible domain-specific frequency synthesis.
Functional safety is embedded at silicon level: end-to-end ECC covers all bus masters (64-bit data + 29-bit address), SMPUs provide 12-region protection per unit, FCCU collects faults, and HSMv2 enables secure boot, key management, and cryptographic acceleration. The device supports ISO 26262 ASIL-B certification for safety-critical subsystems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Configuration | 2× e200Z4 @ 160 MHz + 1× e200Z2 @ 80 MHz - enables parallel real-time task partitioning with hardware isolation |
| Flash Memory | 4 MB on-chip flash with 3-port controller - supports concurrent read/program/erase for zero-latency firmware updates |
| SRAM | 512 KB on-chip SRAM across three ports with ECC - provides fault-tolerant data storage for safety-critical variables |
| FlexCAN Interfaces | 8 CAN FD-capable controllers - enables high-bandwidth vehicle network communication up to 5 Mbps |
| Timer Resources | 96-channel eMIOS + 16 PITs + 3 STM - delivers precise PWM, capture, and time-triggered scheduling for motor control and diagnostics |
| Security & Safety | HSMv2 + FCCU + dual SMPU (12 regions each) - meets ISO 26262 ASIL-B requirements for gateway ECUs |
| Operating Temperature | –40°C to +125°C ambient - qualified for under-hood and transmission control applications |
| Package | 176-pin LQFP-EP (24 × 24 mm, 0.5 mm pitch) - supports standard reflow assembly and thermal dissipation via exposed pad |
Pinout & Package
SPC5747CBK0AMKU6 is housed in a 176-pin LQFP-EP package with 0.5 mm pitch and thermally enhanced exposed pad. Pin functions are defined per multiplexing group (ALT0–ALT3), supporting configurable I/O domains for FlexCAN, LINFlexD, Ethernet, USB, and general-purpose use.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage I/O supply inputs | Independent 3.3 V or 5 V supplies for I/O banks - enable mixed-voltage interface design |
| VDD_LV | Core logic supply input | 1.2–1.32 V regulated supply for CPU and memory subsystems - requires external decoupling per spec |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal - provides primary clock source for FMPLL with ±50 ppm stability |
| SXOSC_IN / SXOSC_OUT | 32 kHz real-time clock oscillator | Enables low-power RTC operation during sleep modes - critical for wake-up timing and battery-backed functions |
| RESET_B | Active-low reset input | Asynchronous reset assertion resets all domains - compatible with external watchdog and power monitor circuits |
| BOOT_MODE[1:0] | Boot configuration pins | Selects boot source (flash, SCI, LIN) at power-on - determines initial execution path and BAF activation |
| ETH0_RXD[3:0] / ETH0_TXD[3:0] | Ethernet MII interface signals | Supports 10/100 Mbps Ethernet with AVB and IEEE 1588 timestamping - used for infotainment and ADAS backbone |
| CAN0_TX / CAN0_RX | FlexCAN3 channel 0 differential pair | Compliant with ISO 11898-1:2015 - supports CAN FD frames up to 64-byte payload at 5 Mbps |
Key Features
| Feature | Design Value |
|---|---|
| Dual e200Z4 Core Architecture | Enables lockstep or split-task execution for ASIL-B safety mechanisms without external redundancy |
| End-to-End ECC Protection | SECDED coverage across flash, SRAM, and interconnect - eliminates silent data corruption in safety-critical code/data |
| Triple-Port Flash Controller | Allows simultaneous CPU fetch, DMA read, and background erase - eliminates flash access contention in real-time OS |
| Configurable I/O Domains | Permits independent voltage scaling and signal routing for FlexCAN, LIN, Ethernet, and USB - simplifies board-level EMI mitigation |
| HSMv2 Security Module | Provides AES-128/256, SHA-256, RSA-2048, and secure key storage - enables OTA firmware authentication and encrypted boot |
| WKPU Wake-Up Controller | Monitors 17 GPIO pins for edge-triggered wake events - reduces system power to <100 µA in standby while retaining CAN/LIN responsiveness |
Applications
| Vehicle Gateway ECU | Body Control Module (BCM) |
|---|---|
Use Scenario: Aggregating CAN FD, LIN, and Ethernet traffic between powertrain, chassis, and infotainment domains. IC Role / Device Role / Timing Role: Central protocol translator and message router with time-synchronized frame forwarding. Use Value: Reduces gateway latency to <50 µs per frame using hardware-accelerated crossbar switching and dual Ethernet queues. |
Use Scenario: Managing lighting, door locks, window lifts, and HVAC actuators in modern vehicle architectures. IC Role / Device Role / Timing Role: Real-time I/O scheduler with deterministic PWM generation and fault-monitoring via eMIOS and ADC. Use Value: Enables 96-channel PWM dimming with 10 ns resolution and synchronized ADC sampling for current sensing. |
| Electric Power Steering (EPS) | Advanced Driver Assistance Systems (ADAS) Sensor Hub |
Use Scenario: Closed-loop motor control with torque feedback, position sensing, and fail-safe torque limiting. IC Role / Device Role / Timing Role: Dual-core safety monitor executing ASIL-B torque calculation while Z2 handles diagnostics and communication. Use Value: Achieves <10 µs loop closure time using dedicated eMIOS channels and hardware CRC for sensor data integrity. |
Use Scenario: Consolidating radar, camera, and ultrasonic sensor data before forwarding to central ADAS processor. IC Role / Device Role / Timing Role: Time-synchronized data aggregator with IEEE 1588 timestamping and packet prioritization. Use Value: Delivers sub-microsecond timestamp accuracy across 8 FlexCAN FD channels and dual Ethernet interfaces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748G | 6 MB flash, 768 KB SRAM, 3x e200Z4 cores, dual Ethernet switch - higher memory and peripheral count | Targeted at premium gateways with multi-gigabit backhaul and full HSMv2 feature set | Select when >4 MB flash or >2 Ethernet ports required; same pinout but larger BGA package |
| SPC5746G | 3 MB flash, 256 KB SRAM, 2x e200Z4 cores, no HSMv2 - reduced memory and security capability | Suitable for cost-sensitive body electronics with basic CAN/LIN connectivity only | Choose for non-safety-critical modules where ASIL-B certification and secure boot are not mandated |
Compared with MPC5748G and SPC5746G, the SPC5747CBK0AMKU6 offers balanced memory (4 MB flash / 512 KB SRAM), full ASIL-B support, and HSMv2 - making it optimal for mid-tier automotive gateways requiring certified safety and moderate security without over-provisioning.
Availability
SPC5747CBK0AMKU6 is available at Aetrix Electronics and suitable for vehicle gateway ECUs, body control modules, electric power steering systems, and ADAS sensor hubs requiring stable component supply across extended automotive lifecycles.
Supply support for SPC5747CBK0AMKU6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The SPC5747CBK0AMKU6 belongs to NXP's SPC57 family of automotive MCUs, designed specifically for ASIL-B compliant vehicle networking, body electronics, and electrification control applications with integrated safety and security engines.
FAQ
What is the maximum operating frequency of each CPU core in the SPC5747CBK0AMKU6?
The SPC5747CBK0AMKU6 features two e200Z4 cores operating at up to 160 MHz and one e200Z2 core running at up to 80 MHz. These frequencies are guaranteed across the full –40°C to +125°C ambient temperature range under specified voltage conditions, enabling deterministic real-time performance for safety-critical automotive software stacks.
Does the SPC5747CBK0AMKU6 support CAN FD, and how many interfaces are available?
Yes, the SPC5747CBK0AMKU6 integrates eight FlexCAN3 modules, all supporting CAN FD protocol with bit rates up to 5 Mbps and payloads up to 64 bytes. Each interface includes dedicated TX/RX pins, message RAM, and hardware filtering - enabling robust multi-bus vehicle network topologies without external transceivers.
What safety certifications apply to the SPC5747CBK0AMKU6?
The SPC5747CBK0AMKU6 is designed to support ISO 26262 ASIL-B compliance through hardware features including end-to-end ECC, dual SMPUs with 12-region granularity, FCCU fault collection, and lockstep-capable dual e200Z4 cores. NXP provides certified safety documentation, FMEDA reports, and diagnostic software libraries for SPC5747CBK0AMKU6-based systems.
What package type and thermal characteristics does the SPC5747CBK0AMKU6 use?
The SPC5747CBK0AMKU6 is supplied in a 176-pin LQFP-EP package (24 × 24 mm, 0.5 mm pitch) with an exposed thermal pad. Its θJA is 29.5°C/W under JEDEC JESD51-7 conditions, supporting continuous operation at 125°C ambient with appropriate PCB copper area and airflow - validated for under-hood deployment.
How does the SPC5747CBK0AMKU6 implement secure boot and cryptographic operations?
The SPC5747CBK0AMKU6 uses its integrated HSMv2 module to perform secure boot via SHA-256 image hashing and AES-128 decryption of signed firmware images. HSMv2 also accelerates RSA-2048 signature verification, AES-GCM encryption, and TRNG-based key generation - all isolated from the main CPU domains to prevent side-channel leakage.
SPC5747CBK0AMKU6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 176-LQFP Exposed Pad
- Series:
- MPC57xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz, 160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 129
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 3.15V ~ 5.5V
- Data Converters:
- A/D 48x10b, 16x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5747CBK0AMKU6 FAQ
1.How can I place an order for SPC5747CBK0AMKU6 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5747CBK0AMKU6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5747CBK0AMKU6 reliable?
The price and inventory of SPC5747CBK0AMKU6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5747CBK0AMKU6 is usually 5 days.
3.What payment methods are accepted for SPC5747CBK0AMKU6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5747CBK0AMKU6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5747CBK0AMKU6?
SPC5747CBK0AMKU6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5747CBK0AMKU6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5747CBK0AMKU6?
For technical support, including SPC5747CBK0AMKU6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5747CBK0AMKU6 requirements.
6.How does Aetrix verify that SPC5747CBK0AMKU6 is sourced from the original manufacturer or authorized distributors?
All SPC5747CBK0AMKU6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5747CBK0AMKU6 meets industry standards.
7.What is the process for return or replacement of SPC5747CBK0AMKU6?
All SPC5747CBK0AMKU6 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5747CBK0AMKU6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5747CBK0AMKU6 part is unused and in its original packaging.
Return procedure for SPC5747CBK0AMKU6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SPC5747CBK0AMKU6 Tags
-
ATTINY4-TSHR
Microchip Technology
-
ATTINY10-TSHR
Microchip Technology
-
ATTINY10-TS8R
Microchip Technology
-
ATTINY202-SSNR
Microchip Technology
-
ATTINY202-SSFR
Microchip Technology
-
ATTINY402-SSNR
Microchip Technology
-
PIC16F15213T-I/MF
Microchip Technology
-
PIC16F15213-E/MF
Microchip Technology
-
PIC10F200T-I/OT
Microchip Technology
-
ATTINY412-SSNR
Microchip Technology
-
PIC10F202T-I/OT
Microchip Technology
-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
