NXP Semiconductors SPC5747CFK0ACKU6
- Part No.:
- SPC5747CFK0ACKU6
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 176-LQFP
- Datasheet:
-
SPC5747CFK0ACKU6.pdf
- Description:
- IC MCU 32BIT 4MB FLASH 176LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:2,699
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SPC5747CFK0ACKU6 from NXP Semiconductors is an automotive-qualified Power Architecture® 32-bit microcontroller featuring dual e200z4 cores (160 MHz) and one e200z2 core (80 MHz), 4 MB on-chip flash, 512 KB SRAM with end-to-end ECC, and integrated FlexCAN3 with FD support. It targets body control modules requiring ASIL-B functional safety compliance, real-time deterministic execution, and multi-protocol connectivity in 176-pin LQFP-EP packaging.
For engineers reviewing the SPC5747CFK0ACKU6 datasheet, SPC5747CFK0ACKU6 pinout, SPC5747CFK0ACKU6 application, or SPC5747CFK0ACKU6 equivalent, this device delivers verified dual-core deterministic control, hardware security module (HSMv2)-enabled secure boot, and production-ready CAN FD/Ethernet/LIN interface integration for automotive ECU designs.
Technical Context
The SPC5747CFK0ACKU6 implements a triple-core architecture with two high-performance e200z4 CPUs (160 MHz, VLE, single-precision FPU, 8 KB I-cache/4 KB D-cache) and one e200z2 CPU (80 MHz, VLE) sharing memory via a multi-port crossbar switch. All bus masters generate SECDED codes for 64-bit data + 29-bit address transactions across flash, SRAM, and peripherals.
It integrates dual SMPUs (12-region each), 16 semaphores, 32-channel eDMA, Boot Assist Flash (BAF), and peripheral clusters including 48+32-channel ADCs (10-/12-bit), 18 LINFlexD modules, eight FlexCAN3 controllers (CAN FD-capable), four DSPI, six SPI, four I²C, three SAI, dual Ethernet (MII/RMII + AVB/1588), uSDHC, and FlexRay 2.1 - all operating under ISO 26262 ASIL-B certified safety mechanisms.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | Two e200z4 @ 160 MHz + one e200z2 @ 80 MHz; enables parallel real-time task partitioning with deterministic latency. |
| Flash Memory | 4 MB on-chip flash with triple-port controller and ECC; supports RWW operation and BAF serial programming. |
| SRAM | 512 KB on-chip SRAM across three ports with full ECC protection; ensures data integrity for safety-critical variables. |
| Functional Safety | ISO 26262 ASIL-B certified; includes FCCU fault collection, HSMv2 security engine, and dual SMPUs for memory isolation. |
| Communication Interfaces | Eight FlexCAN3 (CAN FD), 18 LINFlexD, four DSPI, six SPI, four I²C, dual Ethernet (AVB/1588), uSDHC, FlexRay 2.1; meets gateway and body control protocol diversity requirements. |
| Analog Peripherals | One 10-bit ADC (48 ch), one 12-bit ADC (32 ch), three analog comparators, BCTU; supports sensor fusion and actuator feedback in vehicle subsystems. |
| Package | 176-pin LQFP-EP (24 × 24 mm, 0.5 mm pitch); industrial-grade thermal performance with exposed pad for PCB heat dissipation. |
Pinout & Package
SPC5747CFK0ACKU6 uses a 176-pin LQFP-EP package with exposed thermal pad. Pin functions are defined per multiplexed signal groups (e.g., SIUL0, SIUL1, eMIOS, DSPI, FlexCAN, LINFlexD, ADC, USB, Ethernet) and include dedicated power/ground, clock, reset, debug (JTAG/cJTAG/Nexus), and safety monitoring pins (WKPU, CMU, FCCU).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage I/O supply rails | Independent 3.3 V or 5 V supplies for I/O banks; enable mixed-voltage interfacing with legacy automotive sensors and actuators. |
| VDD_LV | Core logic supply | 1.2–1.32 V regulated supply for e200z4/z2 cores; requires external decoupling per FPREG stability specs. |
| FXOSC / SXOSC / FIRC / SIRC | Clock sources | Supports 8–40 MHz crystal, 32 kHz crystal, 16 MHz RC, and 128 kHz RC oscillators; enables fail-safe clock monitoring and FMPLL frequency synthesis. |
| JTAG_TCK / TMS / TDI / TDO / TRST | IEEE 1149.1 debug interface | Class 3+ Nexus-compliant debug access for both e200z4 and e200z2 cores; supports real-time trace and safety verification. |
| FLEXCAN0_TX / FLEXCAN0_RX | CAN FD physical layer interface | Differential pair supporting up to 5 Mbps CAN FD; integrated transceiver drivers require external CAN PHY for bus connection. |
| ETH0_MDC / ETH0_MDIO / ETH0_TXD[3:0] / ETH0_RXD[3:0] | Ethernet MAC interface | MII/RMII-compliant 10/100 Mbps interface with AVB/1588 timestamping; connects directly to external PHY without glue logic. |
Key Features
| Feature | Design Value |
|---|---|
| End-to-End ECC | SECDED protection across all bus masters, flash, SRAM, and peripheral interfaces - eliminates silent data corruption in safety-critical paths. |
| Triple-Core Determinism | Two e200z4 cores handle time-critical control loops (e.g., motor commutation), while e200z2 manages communication stacks - no OS required for hard real-time scheduling. |
| HSMv2 Security Engine | Hardware-accelerated AES-128/256, SHA-256, RSA-2048, and secure key storage; enables secure boot, firmware authentication, and OTA update integrity. |
| ASIL-B Certification | Includes FCCU fault collector, dual SMPUs, lockstep-capable peripherals, and diagnostic coverage validated per ISO 26262 Part 5 Annex D. |
| Multi-Protocol Connectivity | Simultaneous CAN FD (8 channels), LIN (18), Ethernet (dual), FlexRay, and USB OTG/SPH - consolidates gateway, body, and infotainment domain controllers. |
Applications
| Body Control Module (BCM) | Gateway ECU |
|---|---|
Use Scenario: Centralized management of lighting, door locks, window lifts, and HVAC in modern vehicles. IC Role / Device Role / Timing Role: Primary real-time controller executing ASIL-B compliant diagnostics, PWM-driven actuator control, and LIN cluster arbitration. Use Value: 4 MB flash stores multiple vehicle variants; dual e200z4 cores execute concurrent CAN FD and LIN stacks without jitter; ECC prevents memory corruption during ESD events. |
Use Scenario: Protocol translation between CAN FD, LIN, FlexRay, and Ethernet domains in zonal architectures. IC Role / Device Role / Timing Role: High-throughput message router with time-synchronized packet forwarding using dual Ethernet AVB queues and 1588 PTP. Use Value: Eight FlexCAN3 channels handle chassis/safety CAN traffic; dual Ethernet ports enable OTA updates and diagnostic streaming; HSMv2 secures inter-domain data exchange. |
| Electric Power Steering (EPS) Support | Advanced Driver Assistance Systems (ADAS) Sensor Hub |
Use Scenario: Secondary controller for EPS motor position sensing, torque estimation, and fail-safe torque limiting. IC Role / Device Role / Timing Role: Safety monitor co-processor validating primary MCU outputs via cross-checking ADC readings and eMIOS timer-based watchdogs. Use Value: 12-bit ADC with BCTU synchronization captures high-resolution steering angle encoder signals; FCCU reports faults to main ECU within <10 µs latency. |
Use Scenario: Aggregation and preprocessing of radar, camera, and ultrasonic sensor data before forwarding to central ADAS domain controller. IC Role / Device Role / Timing Role: Real-time sensor fusion node performing timestamp alignment, noise filtering, and CAN FD packetization. Use Value: 32-channel 12-bit ADC digitizes analog radar IF outputs; eMIOS channels trigger synchronized sampling across multiple sensors; FlexCAN FD provides low-latency sensor data transport. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748GFK0ACKU6 | 6 MB flash, 768 KB SRAM, 324-pin BGA; adds third e200z4 core and extra FlexCAN/Ethernet resources. | Targeted at higher-integration gateways requiring >4 MB code space and dual Ethernet switches. | Select when needing larger memory footprint, additional CAN FD channels, or BGA-based thermal/power scalability. |
| SPC5746CFK0ACKU6 | 3 MB flash, 512 KB SRAM, no HSMv2; single e200z4 + e200z2, reduced peripheral count (e.g., 4 FlexCAN, no Ethernet). | Suitable for cost-sensitive body electronics where ASIL-B is not required and protocol count is lower. | Choose for entry-level BCMs without Ethernet/CAN FD or security certification needs - lower BOM cost and smaller footprint. |
Compared with MPC5748GFK0ACKU6, SPC5747CFK0ACKU6 offers optimized memory/peripheral balance for mid-tier automotive ECUs; versus SPC5746CFK0ACKU6, it adds HSMv2, full CAN FD support, and Ethernet - enabling scalable safety and connectivity without over-provisioning.
Availability
SPC5747CFK0ACKU6 is available at Aetrix Electronics and suitable for automotive body control modules, gateway ECUs, and electric power steering support systems requiring stable component supply, long-term lifecycle assurance, and ASIL-B compliance.
Supply support for SPC5747CFK0ACKU6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in functional safety and automotive-grade microcontrollers.
The SPC5747C series belongs to NXP's Power Architecture® automotive MCU family designed specifically for ASIL-B compliant body control, gateway, and domain controller applications - emphasizing deterministic real-time performance, hardware security, and multi-protocol integration.
FAQ
What is the maximum operating frequency of each CPU core in the SPC5747CFK0ACKU6?
The SPC5747CFK0ACKU6 features two e200z4 cores operating at up to 160 MHz and one e200z2 core running at up to 80 MHz. These frequencies are validated across the full automotive temperature range (–40°C to +125°C) and supported by the FMPLL clock generation system with frequency modulation capability. The SPC5747CFK0ACKU6 datasheet specifies these values under recommended operating conditions with proper voltage regulation and thermal management.
Does the SPC5747CFK0ACKU6 support CAN FD, and how many channels are available?
Yes, the SPC5747CFK0ACKU6 supports CAN FD on all eight FlexCAN3 modules, each capable of data rates up to 5 Mbps in FD mode. This is confirmed in the MPC5748G family comparison table and block diagram, where "All FlexCANs optionally support CAN FD" applies to the SPC5747C variant. The SPC5747CFK0ACKU6 implements the full FlexCAN3 peripheral set with FD frame handling, bit rate switching, and CRC enhancements.
What safety certifications apply to the SPC5747CFK0ACKU6?
The SPC5747CFK0ACKU6 is ISO 26262 ASIL-B certified for specific safety-related functions, including memory ECC, SMPU-based memory protection, FCCU fault reporting, and HSMv2 cryptographic operations. Certification documentation covers hardware elements and safety mechanisms - not full-system compliance. The SPC5747CFK0ACKU6 datasheet and NXP's functional safety manual provide detailed FMEDA results and diagnostic coverage metrics for each safety feature.
What package type and pin count does the SPC5747CFK0ACKU6 use?
The SPC5747CFK0ACKU6 uses a 176-pin LQFP-EP (lead-free, exposed pad) package measuring 24 mm × 24 mm with 0.5 mm pitch. This package is explicitly listed in Table 1 of the MPC5748G family comparison document and confirmed in the ordering information section, where "KU" denotes the 176 LQFP-EP option. The exposed pad enhances thermal dissipation for sustained operation in automotive under-hood environments.
Is the SPC5747CFK0ACKU6 pin-compatible with other members of the MPC5748G family?
No, the SPC5747CFK0ACKU6 is not pin-compatible with higher-pin-count variants like the 256- or 324-ball BGA packages (e.g., MPC5748G). However, it shares identical pinout and signal mapping with other 176-pin LQFP-EP variants in the family (e.g., SPC5746C, SPC5748G in KU package), enabling PCB reuse across derivatives with different flash/SRAM configurations or peripheral enablement. Pin compatibility is limited to the same package code (KU) and validated in NXP's package migration guides.
SPC5747CFK0ACKU6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 176-LQFP
- Series:
- MPC57xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz, 160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 129
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 48x10b, 16x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5747CFK0ACKU6 FAQ
1.How can I place an order for SPC5747CFK0ACKU6 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5747CFK0ACKU6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5747CFK0ACKU6 reliable?
The price and inventory of SPC5747CFK0ACKU6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5747CFK0ACKU6 is usually 5 days.
3.What payment methods are accepted for SPC5747CFK0ACKU6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5747CFK0ACKU6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5747CFK0ACKU6?
SPC5747CFK0ACKU6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5747CFK0ACKU6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5747CFK0ACKU6?
For technical support, including SPC5747CFK0ACKU6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5747CFK0ACKU6 requirements.
6.How does Aetrix verify that SPC5747CFK0ACKU6 is sourced from the original manufacturer or authorized distributors?
All SPC5747CFK0ACKU6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5747CFK0ACKU6 meets industry standards.
7.What is the process for return or replacement of SPC5747CFK0ACKU6?
All SPC5747CFK0ACKU6 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5747CFK0ACKU6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5747CFK0ACKU6 part is unused and in its original packaging.
Return procedure for SPC5747CFK0ACKU6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SPC5747CFK0ACKU6 Tags

-
ATTINY4-TSHR
Microchip Technology

-
ATTINY10-TSHR
Microchip Technology

-
ATTINY10-TS8R
Microchip Technology

-
ATTINY202-SSNR
Microchip Technology

-
ATTINY202-SSFR
Microchip Technology

-
ATTINY402-SSNR
Microchip Technology

-
PIC16F15213T-I/MF
Microchip Technology

-
PIC16F15213-E/MF
Microchip Technology

-
PIC10F200T-I/OT
Microchip Technology

-
ATTINY412-SSNR
Microchip Technology

-
PIC10F202T-I/OT
Microchip Technology

-
ATTINY404-SSNR
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

