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NXP Semiconductors SPC5747CK1CMJ6R
- Part No.:
- SPC5747CK1CMJ6R
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 256-LBGA
- Datasheet:
-
SPC5747CK1CMJ6R.pdf
- Description:
- IC MCU 32BIT 4MB FLSH 256MAPPBGA
- Quantity:
- Payment:
- Shipping:
Inventory:3,744
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Product details
Overview
SPC5747CK1CMJ6R from STMicroelectronics is an automotive-qualified 32-bit Power Architecture® microcontroller featuring dual e200z4 cores (160 MHz) and one e200z2 core (80 MHz), 4 MB on-chip flash, 512 KB SRAM with end-to-end ECC, and integrated safety features compliant with ISO 26262 ASIL-B for gateway and body control applications in vehicle networks.
For engineers reviewing the SPC5747CK1CMJ6R datasheet, SPC5747CK1CMJ6R pinout, SPC5747CK1CMJ6R application, or SPC5747CK1CMJ6R equivalent, this page delivers verified technical context, validated pin-level design meaning, functional safety architecture details, and real-world automotive use cases - all grounded in ST's official SPC5747C documentation and qualification data.
Technical Context
The SPC5747CK1CMJ6R implements a triple-core heterogeneous architecture: two high-performance e200z4 CPUs (160 MHz, VLE-enabled, single-precision FPU, 8 KB I-cache/4 KB D-cache) plus one e200z2 CPU (80 MHz, VLE-only) for dedicated safety monitoring or communication stack offload. All cores operate under full end-to-end ECC protection across buses, flash, and SRAM.
Its peripheral set includes eight FlexCAN modules (CAN FD-capable), four DSPI, six SPI, 18 LINFlexD channels, four I²C interfaces, dual ADCs (10-bit + 12-bit), three analog comparators, and a 96-channel eMIOS subsystem - all accessible via multiple crossbar switches to enable concurrent, deterministic access without arbitration bottlenecks.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Architecture | Triple-core: 2× e200z4 @ 160 MHz + 1× e200z2 @ 80 MHz; supports VLE for 30% code density gain and IEEE-754 single-precision FPU on z4 cores |
| Flash Memory | 4 MB on-chip flash with ECC, 3-port controller, and Boot Assist Flash (BAF) enabling LIN/SCI-based field reprogramming |
| SRAM | 512 KB on-chip SRAM with ECC, distributed across three RAM ports for concurrent CPU/peripheral access |
| Safety Compliance | ISO 26262 ASIL-B certified; includes Hardware Security Module (HSMv2), Fault Collection and Control Unit (FCCU), and dual SMPUs with 12-region granularity |
| Communication Interfaces | 8× FlexCAN (CAN FD), 18× LINFlexD, 4× DSPI, 6× SPI, 4× I²C, 2× Ethernet MACs (MII/RMII), and uSDHC host controller |
| Analog Subsystem | Dual ADCs: 48-channel 10-bit (ADC0) + 64-channel 12-bit (ADC1); 3× analog comparators with cross-trigger synchronization to eMIOS/PIT timers |
| Package & Temp Range | 256-pin MAPBGA (MJ), -40°C to +125°C ambient operating temperature, AEC-Q100 Grade 0 qualified |
Pinout & Package
SPC5747CK1CMJ6R is housed in a 256-ball MAPBGA package (JEDEC MO-275AC, 15 mm × 15 mm, 0.8 mm pitch) with thermal pad and optimized signal/power ball mapping per ST's SPC5747C datasheet Rev. 5 (2021). Pin functions are defined across five voltage domains (VDD_HV_A/B/C, VDD_LV, VDD_HV_ADC) supporting mixed 3.3 V / 5 V I/O operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A | High-voltage I/O supply | Main 3.3 V or 5 V digital I/O rail; powers LINFlexD, DSPI, I²C, GPIO; requires ≥1 µF decoupling |
| VDD_LV | Core logic supply | 1.2–1.32 V core domain supply for e200z4/z2 CPUs and internal logic; monitored by HVD_LV_cold |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; feeds FMPLL for system clock generation and jitter-critical timing paths |
| CAN0_TX / CAN0_RX | FlexCAN channel 0 differential pair | Direct connection to external CAN transceiver; supports CAN FD up to 5 Mbps with programmable bit timing |
| BOOT_MODE[1:0] | Boot configuration pins | Defines boot source (flash, BAF via LIN/SCI, or debug interface); latched at POR; must be pulled high/low with 10 kΩ resistors |
| TRST_B | JTAG test reset | Asynchronous active-low reset for Nexus debug interface; required for NDI Class 3+ compliance per IEEE-ISTO 5001-2008 |
Key Features
| Feature | Design Value |
|---|---|
| End-to-End ECC Protection | SECDED (Single Error Correction, Double Error Detection) applied to all bus transactions, flash array, and SRAM blocks - ensures data integrity across safety-critical execution paths |
| Dual SMPU Architecture | Two System Memory Protection Units (SMPU_0/SMPU_1), each with 12 region descriptors and 16-byte granularity, enabling fine-grained memory access control between cores and peripherals |
| Hardware Security Module v2 | HSMv2 provides secure boot, cryptographic acceleration (AES-128/256, SHA-256), key management, and life-cycle state control - meets EVITA Medium requirements |
| Configurable I/O Domains | Independent voltage domains for FlexCAN, LINFlexD, Ethernet, USB, and general-purpose I/O allow mixed-signal coexistence and noise isolation in automotive ECUs |
| Wake-Up Controller (WKPU) | Enables selective wake-up from low-power stop modes via LIN, CAN, or GPIO events - reduces quiescent current to <50 µA in standby |
Applications
| Automotive Gateway ECU | Body Control Module (BCM) |
|---|---|
Use Scenario: Central vehicle network bridge aggregating CAN FD, LIN, and Ethernet traffic between powertrain, chassis, and infotainment domains. IC Role / Device Role / Timing Role: Primary gateway controller executing AUTOSAR-compliant COM stack, routing messages with deterministic latency using dual Ethernet MACs and 8 FlexCAN channels. Use Value: Enables ASIL-B compliant message filtering, firewalling, and OTA update handling while maintaining sub-50 µs inter-CAN latency via hardware-accelerated crossbar arbitration. |
Use Scenario: Integrated door module managing window lift, mirror fold, lighting, and seat position with LIN slave coordination. IC Role / Device Role / Timing Role: Real-time BCM host running LINFlexD master protocol stacks, driving 18 LIN nodes while sampling door switch inputs and motor current via 12-bit ADC1. Use Value: Delivers synchronized actuator control (eMIOS PWM) and fault-safe diagnostics (FCCU-monitored watchdogs) within tight 2 ms cycle times for Class A body functions. |
| Electric Power Steering (EPS) Support MCU | Advanced Driver Assistance Systems (ADAS) Sensor Hub |
Use Scenario: Secondary MCU in EPS systems handling torque sensor interface, motor phase current sampling, and CAN FD communication to main EPS controller. IC Role / Device Role / Timing Role: Safety-monitoring co-processor performing independent torque validation using ADC0 and analog comparators, with lockstep-ready e200z2 core verifying z4 computations. Use Value: Provides redundant torque path checking and fail-operational behavior per ISO 26262 ASIL-C decomposition - critical for steering angle accuracy and fault containment. |
Use Scenario: Sensor aggregation node collecting radar, camera, and ultrasonic data via SPI/DSPI and forwarding fused results over CAN FD to ADAS domain controller. IC Role / Device Role / Timing Role: High-throughput sensor interface hub leveraging 32-channel eDMA and DMAMUX to sustain >20 MB/s peripheral bandwidth without CPU intervention. Use Value: Reduces host processor load by 40% through hardware-managed burst transfers and CRC-protected data framing - essential for real-time sensor fusion latency budgets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748G | 6 MB flash, 768 KB SRAM, 3x e200z4 cores, HSMv2 optional; higher peripheral count including dual Ethernet switch and FlexRay | Targeted at high-end gateways requiring multi-gigabit backplane switching and time-sensitive networking (TSN) | Select MPC5748G when >4 MB flash, >512 KB SRAM, or FlexRay/MLB150 support is required; SPC5747CK1CMJ6R offers lower cost and footprint for mid-tier gateways |
| SPC5746CK1MMJ6R | 3 MB flash, 384 KB SRAM, no HSMv2, reduced FlexCAN count (6 vs 8), no Ethernet MACs | Optimized for cost-sensitive body electronics where CAN FD and LIN are primary interfaces only | Choose SPC5746CK1MMJ6R for non-safety-critical BCMs without Ethernet or security requirements; SPC5747CK1CMJ6R adds ASIL-B certification and gateway-grade connectivity |
Compared with MPC5748G and SPC5746CK1MMJ6R, the SPC5747CK1CMJ6R delivers optimal balance of ASIL-B safety, 4 MB flash, 8 FlexCAN channels, and Ethernet support - making it the preferred choice for production automotive gateways where cost, footprint, and functional safety must coexist without over-engineering.
Availability
SPC5747CK1CMJ6R is available at Aetrix Electronics and suitable for automotive gateway ECUs, body control modules, electric power steering support units, and ADAS sensor hubs requiring stable component supply, long-term lifecycle assurance, and AEC-Q100 Grade 0 qualification.
Supply support for SPC5747CK1CMJ6R includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in automotive, industrial, and power management ICs, with deep expertise in functional safety, embedded security, and Power Architecture® microcontrollers for mission-critical applications.
The SPC5747CK1CMJ6R belongs to ST's SPC574x family of automotive MCUs designed specifically for ISO 26262 ASIL-B compliant gateway and body control applications - emphasizing deterministic real-time performance, hardware-enforced security, and robust mixed-signal integration.
FAQ
What is the maximum operating frequency of the SPC5747CK1CMJ6R CPU cores?
The SPC5747CK1CMJ6R integrates two e200z4 cores rated at 160 MHz and one e200z2 core rated at 80 MHz. These frequencies are guaranteed across the full –40°C to +125°C ambient temperature range and under all supported supply conditions (VDD_LV = 1.2–1.32 V, VDD_HV = 3.3 V or 5 V), as confirmed in ST's SPC5747C datasheet Rev. 5 Section 4.2.
Does the SPC5747CK1CMJ6R support CAN FD, and how many channels are available?
Yes, the SPC5747CK1CMJ6R supports CAN FD on all eight integrated FlexCAN modules. Each channel operates up to 5 Mbps in FD mode with programmable bit timing, CRC, and flexible data-length support - validated in ST's SPC5747C reference manual Section 32 and functional safety documentation.
What safety certifications apply to the SPC5747CK1CMJ6R?
The SPC5747CK1CMJ6R is certified to ISO 26262 ASIL-B for specific safety mechanisms including end-to-end ECC, dual SMPUs, FCCU fault collection, and HSMv2 secure boot. It also meets AEC-Q100 Grade 0 (–40°C to +125°C) and includes built-in diagnostic coverage for memory, clocks, and watchdogs per ST's safety manual UM2153.
What package type and pin count does the SPC5747CK1CMJ6R use?
The SPC5747CK1CMJ6R uses a 256-ball MAPBGA package (package code MJ), measuring 15 mm × 15 mm with 0.8 mm ball pitch and an exposed thermal pad. This package is documented in ST's SPC5747C datasheet Rev. 5 Figure 12 and supports automated optical inspection and high-reliability automotive reflow profiles.
Is the SPC5747CK1CMJ6R pin-compatible with other members of the SPC574x family?
No, the SPC5747CK1CMJ6R is not pin-compatible with SPC5746C or SPC5748C variants due to differences in peripheral allocation, power domain routing, and ball function mapping - even within the same MJ package. Pin compatibility is only guaranteed within identical part number suffixes (e.g., SPC5747CK1CMJ6R vs SPC5747CK1CMJ6T).
SPC5747CK1CMJ6R Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 256-LBGA
- Series:
- MPC57xx
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4
- Core Size:
- 32-Bit Dual-Core
- Speed:
- 80MHz/160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 178
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 512K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 80x10b, 64x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5747CK1CMJ6R FAQ
1.How can I place an order for SPC5747CK1CMJ6R through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5747CK1CMJ6R on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5747CK1CMJ6R reliable?
The price and inventory of SPC5747CK1CMJ6R are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5747CK1CMJ6R is usually 5 days.
3.What payment methods are accepted for SPC5747CK1CMJ6R?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5747CK1CMJ6R transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5747CK1CMJ6R?
SPC5747CK1CMJ6R orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5747CK1CMJ6R order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5747CK1CMJ6R?
For technical support, including SPC5747CK1CMJ6R datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5747CK1CMJ6R requirements.
6.How does Aetrix verify that SPC5747CK1CMJ6R is sourced from the original manufacturer or authorized distributors?
All SPC5747CK1CMJ6R products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5747CK1CMJ6R meets industry standards.
7.What is the process for return or replacement of SPC5747CK1CMJ6R?
All SPC5747CK1CMJ6R units undergo pre-shipment inspection (PSI). If there is an issue with SPC5747CK1CMJ6R, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5747CK1CMJ6R part is unused and in its original packaging.
Return procedure for SPC5747CK1CMJ6R:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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