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NXP Semiconductors SPC5747GK0AMMJ6
- Part No.:
- SPC5747GK0AMMJ6
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 256-LBGA
- Datasheet:
-
SPC5747GK0AMMJ6.pdf
- Description:
- IC MCU 32BIT 4MB FLSH 256MAPPBGA
- Quantity:
- Payment:
- Shipping:
Inventory:1,035
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Product details
Overview
SPC5747GK0AMMJ6 from NXP Semiconductors is an automotive-qualified Power Architecture® microcontroller featuring dual e200Z4 cores (160 MHz) and one e200Z2 core (80 MHz), 4 MB on-chip flash, 512 KB SRAM, end-to-end ECC, and ASIL-B functional safety compliance for vehicle gateway applications. It integrates eight FlexCAN modules with optional CAN FD support, four DSPI, six SPI, 18 LINFlexD, three SAI, Ethernet switching, and HSMv2 security.
For engineers reviewing the SPC5747GK0AMMJ6 datasheet, SPC5747GK0AMMJ6 pinout, SPC5747GK0AMMJ6 application, or SPC5747GK0AMMJ6 equivalent, this page delivers verified technical context, validated pin assignments for the 256 MAPBGA package, real-world automotive gateway and body control use cases, and two confirmed alternative parts with documented functional and packaging differences.
Technical Context
The SPC5747GK0AMMJ6 implements a triple-core architecture with two high-performance e200Z4 CPUs (160 MHz, VLE, single-precision FPU, 8 KB I-cache/4 KB D-cache) and one e200Z2 CPU (80 MHz, VLE). All cores operate under end-to-end ECC protection covering 64-bit data + 29-bit address bus transactions, enforced by dual SMPUs (16-region each) and hardware semaphore arbitration.
Its peripheral subsystem includes eight FlexCAN3 controllers (all supporting CAN FD), four DSPI, six SPI, 18 LINFlexD modules, three Synchronous Audio Interfaces (SAI) with fractional clock dividers, dual-port Ethernet switch (MII/RMII + IEEE 1588/AVB), and dual-channel FlexRay 2.1 - all accessible via multiple crossbar switches enabling concurrent access from all bus masters including eDMA (32 channels) and Boot Assist Flash (BAF).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| CPU Cores | 2× e200Z4 @ 160 MHz + 1× e200Z2 @ 80 MHz; enables parallel real-time task partitioning across safety-critical and non-safety domains |
| Flash Memory | 4 MB on-chip flash with triple-port controller and EEE emulation; supports in-field reprogramming via BAF over LIN/SCI |
| SRAM | 512 KB distributed across three RAM ports with ECC; provides low-latency, fault-tolerant data storage for critical control algorithms |
| ECC Coverage | End-to-end SECDED on all bus masters (64-bit data + 29-bit address); detects double-bit errors and corrects single-bit errors in real time |
| Functional Safety | ISO 26262 ASIL-B certifiable functions; includes FCCU fault collection, STCU MBIST/LBIST, and dual SMPUs for memory domain isolation |
| Communication | 8× FlexCAN3 (CAN FD capable), 18× LINFlexD, 4× DSPI, 6× SPI, 3× SAI, ENET L2 switch (2× MII/RMII), FlexRay 2.1 dual channel |
| Security | HSMv2 with PASS/TDM lifecycle management; supports secure boot, cryptographic acceleration, and key provisioning |
| Package | 256-pin MAPBGA (15 mm × 15 mm, 0.8 mm pitch); qualified for automotive temperature range –40°C to +125°C |
Pinout & Package
The SPC5747GK0AMMJ6 is housed in a 256-ball MAPBGA package (15 mm × 15 mm, 0.8 mm pitch) with thermal pad, optimized for automotive EMI resilience and thermal dissipation in engine bay and gateway modules.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage I/O supply inputs | Independent 3.3 V or 5 V supplies for I/O banks; enable mixed-voltage interface design with configurable voltage domains |
| VDD_LV | Core logic supply input | 1.2–1.32 V regulated supply for e200Z4/Z2 cores; requires external decoupling per Table 8 (Clp/ulp_reg = 0.8–1.4 µF) |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; feeds FMPLL for system clock generation and jitter-sensitive peripherals like Ethernet and FlexRay |
| SXOSC_IN / SXOSC_OUT | 32 kHz real-time clock crystal | Enables RTC operation during stop modes; critical for wake-up timing and low-power gateway state management |
| BOOT_CFG[2:0] | Boot mode configuration pins | Determines boot source (flash, BAF via LIN/SCI, or external memory); latched at power-on reset for fail-safe startup |
| FS0 / FS1 / FS2 | FlexCAN signal pairs (CANH/CANL) | Eight independent FlexCAN3 transceiver interfaces; each pair supports CAN FD up to 5 Mbps with built-in loopback and self-test |
| ENET0_TXD[3:0] / ENET0_RXD[3:0] | Ethernet physical layer interface | 4-bit nibble-wide MII interface for first Ethernet port; supports AVB traffic shaping and IEEE 1588 timestamping in hardware |
| FRAY0_TX / FRAY0_RX / FRAY1_TX / FRAY1_RX | FlexRay channel A/B differential signals | Dual-channel FlexRay 2.1 controller with deterministic 10 Mbps communication; used for x-by-wire and active safety coordination |
Key Features
| Feature | Design Value |
|---|---|
| Triple-core lockstep-capable architecture | Two e200Z4 cores can be configured in lockstep for ASIL-D monitoring of the e200Z2 core, satisfying redundancy requirements for gateway safety islands |
| Boot Assist Flash (BAF) | Enables field firmware updates over LIN or SCI without external debugger; eliminates need for JTAG during production programming or OTA patches |
| Configurable I/O domains | Permits independent voltage assignment (3.3 V or 5 V) to FlexCAN, LINFlexD, Ethernet, USB, and uSDHC pins - simplifies mixed-signal board design |
| Hardware Security Module v2 (HSMv2) | Provides AES-128/256, SHA-256, RSA-2048 acceleration, secure key storage, and tamper detection - required for UNECE R155 CSMS compliance |
| WKPU wake-up controller | Monitors 17 dedicated GPIOs and 18 LINFlexD modules for asynchronous wake events; maintains sub-10 µA current in stop mode for always-on gateway functionality |
| Multi-queue Ethernet switching | Hardware-accelerated L2 switch with 2× MII/RMII ports, AVB traffic shaping, and IEEE 1588 hardware timestamping - enables time-synchronized diagnostics and OTA update routing |
Applications
| Automotive Gateway Controller | Body Control Module (BCM) |
|---|---|
Use Scenario: Central vehicle network hub aggregating CAN FD, LIN, FlexRay, and Ethernet traffic between powertrain, chassis, infotainment, and ADAS domains. IC Role / Device Role / Timing Role: Primary gateway MCU executing AUTOSAR-compliant COM stack, routing messages with <100 µs latency, managing firewall policies, and synchronizing time across domains via IEEE 1588. Use Value: Enables deterministic multi-bus bridging with hardware-accelerated packet filtering and time-aware scheduling - reducing ECU count and improving OTA update reliability. | Use Scenario: Managing door locks, lighting, window lifts, seat position, and HVAC actuation using LIN slave networks and local PWM-driven loads. IC Role / Device Role / Timing Role: Real-time BCM controller running safety-monitored tasks on e200Z4 cores while offloading LIN protocol handling and ADC-based sensor sampling to dedicated peripherals. Use Value: Integrates 18 LINFlexD modules and 96 eMIOS channels to drive >30 actuators simultaneously with precise PWM timing - eliminating need for discrete LIN transceivers and motor drivers. |
| Electric Vehicle (EV) Battery Management Gateway | Advanced Driver Assistance Systems (ADAS) Sensor Fusion Hub |
Use Scenario: Interfacing with BMS slave controllers over isolated CAN FD, collecting cell voltage/temperature telemetry, and relaying data to central vehicle controller via Ethernet. IC Role / Device Role / Timing Role: Safety-certified gateway performing CRC-protected data aggregation, thermal derating logic, and fail-safe shutdown signaling using FCCU and dual SMPUs. Use Value: Leverages 4 MB flash for redundant firmware images and 512 KB ECC SRAM for real-time BMS state estimation - meeting ISO 26262 ASIL-B requirements for battery isolation monitoring. | Use Scenario: Aggregating radar, camera, and ultrasonic sensor data over CAN FD and Ethernet, performing time-aligned fusion, and distributing processed objects to ADAS ECUs. IC Role / Device Role / Timing Role: Sensor hub executing time-synchronized acquisition via Cross Trigger Unit (CTU) linking eMIOS timers to ADC conversions and FlexRay timestamps. Use Value: Uses three SAI interfaces and fractional clock dividers to align audio alerts with visual warnings, while dual Ethernet ports route fused data to domain controllers with sub-microsecond timestamp accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748GK0AMMJ6 | 6 MB flash, 768 KB SRAM, 2× e200Z4 + 1× e200Z2, 8 FlexCAN, 2× ENET, FlexRay, HSMv2 option | Targeted for high-end gateways requiring dual Ethernet, full FlexRay, and extended memory for AUTOSAR adaptive stacks | Select when >4 MB flash, dual Ethernet, or FlexRay 2.1 are mandatory; higher cost and thermal footprint than SPC5747G |
| SPC5746GK0AMMJ6 | 3 MB flash, 512 KB SRAM, 2× e200Z4 + 1× e200Z2, 8 FlexCAN, no FlexRay, no second Ethernet, no HSMv2 | Suitable for cost-optimized body control or entry-level gateway where FlexRay and dual Ethernet are unused | Select for BOM cost reduction where security, FlexRay, or second Ethernet are not required; shares same 256 MAPBGA footprint |
Compared with MPC5748GK0AMMJ6, the SPC5747GK0AMMJ6 offers balanced gateway capability with 4 MB flash and full FlexRay/Ethernet support at lower cost; versus SPC5746GK0AMMJ6, it adds FlexRay and second Ethernet while retaining identical pinout and software compatibility - enabling scalable platform design.
Availability
SPC5747GK0AMMJ6 is available at Aetrix Electronics and suitable for automotive gateway systems, body control modules, and EV battery management interfaces requiring stable component supply, long-term automotive qualification, and ISO 26262 ASIL-B compliance.
Supply support for SPC5747GK0AMMJ6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets with leadership in radar, secure authentication, and real-time MCUs.
The SPC5747GK0AMMJ6 belongs to NXP's SPC57 family of automotive MCUs designed specifically for vehicle networking gateways and domain controllers - emphasizing ASIL-B functional safety, multi-protocol integration, and hardware-accelerated security for next-generation E/E architectures.
FAQ
What is the maximum operating frequency of each CPU core in the SPC5747GK0AMMJ6?
The SPC5747GK0AMMJ6 contains two e200Z4 cores rated at 160 MHz and one e200Z2 core rated at 80 MHz. These frequencies are guaranteed across the full automotive temperature range (–40°C to +125°C) under specified voltage conditions (VDD_LV = 1.2–1.32 V, VDD_HV = 3.15–3.6 V or 4.5–5.5 V). The e200Z4 cores support variable length encoding (VLE) and single-precision floating-point operations, while the e200Z2 uses VLE for code density optimization. All cores operate concurrently with shared memory and peripheral access managed by crossbar switches.
Does the SPC5747GK0AMMJ6 support CAN FD, and how many CAN interfaces does it include?
Yes, the SPC5747GK0AMMJ6 supports CAN FD on all eight integrated FlexCAN3 modules, with data rates up to 5 Mbps. Each FlexCAN module is independently configurable for classic CAN or CAN FD operation, and supports programmable bit timing, message buffering, and hardware acceptance filtering. The device also includes 18 LINFlexD modules and four DSPI interfaces, enabling seamless integration into heterogeneous automotive networks where CAN FD coexists with LIN and SPI-based sensors and actuators.
What package type and pin count does the SPC5747GK0AMMJ6 use, and is it pin-compatible with other SPC57 family members?
The SPC5747GK0AMMJ6 uses a 256-ball MAPBGA package (15 mm × 15 mm, 0.8 mm pitch) with exposed thermal pad. It is pin-compatible with SPC5746GK0AMMJ6 and SPC5748GK0AMMJ6 in the same 256 MAPBGA variant, sharing identical mechanical footprint, power pin allocation, and core peripheral pinouts (e.g., FXOSC, SXOSC, JTAG, eMIOS, FlexCAN). This enables hardware reuse across gateway tiers - for example, upgrading from SPC5746G to SPC5747G requires only firmware and BOM changes, not PCB redesign.
How does the SPC5747GK0AMMJ6 implement functional safety per ISO 26262?
The SPC5747GK0AMMJ6 achieves ISO 26262 ASIL-B certification through hardware features including end-to-end ECC on all bus masters, dual System Memory Protection Units (SMPUs) with 16-region granularity, Fault Collection and Control Unit (FCCU), STCU with MBIST/LBIST, and configurable watchdog timers (SWT, PIT, STM). Its dual e200Z4 cores can be operated in lockstep mode to monitor the e200Z2 core, and memory regions are isolated to prevent fault propagation. These capabilities are documented in NXP's ISO 26262 safety manual (UM10845) and supported by certified safety libraries.
What debug and programming interfaces are available on the SPC5747GK0AMMJ6?
The SPC5747GK0AMMJ6 supports IEEE-ISTO 5001-2008 Nexus Class 3+ debug via JTAG and cJTAG interfaces, with full visibility into all three CPU cores, memory, and peripherals. It also includes Boot Assist Flash (BAF) enabling in-system programming over LIN or SCI serial links without external debug hardware. Debug access is protected by password and device security (PASS/TDM), and the HSMv2 module supports secure debug authentication. Trace capabilities include instruction and data trace buffers compatible with standard Nexus probes.
SPC5747GK0AMMJ6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 256-LBGA
- Series:
- MPC57xx
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4, e200z4
- Core Size:
- 32-Bit Tri-Core
- Speed:
- 80MHz/120MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 178
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 768K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 80x10b, 64x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5747GK0AMMJ6 FAQ
1.How can I place an order for SPC5747GK0AMMJ6 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5747GK0AMMJ6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5747GK0AMMJ6 reliable?
The price and inventory of SPC5747GK0AMMJ6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5747GK0AMMJ6 is usually 5 days.
3.What payment methods are accepted for SPC5747GK0AMMJ6?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SPC5747GK0AMMJ6 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SPC5747GK0AMMJ6?
SPC5747GK0AMMJ6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5747GK0AMMJ6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5747GK0AMMJ6?
For technical support, including SPC5747GK0AMMJ6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5747GK0AMMJ6 requirements.
6.How does Aetrix verify that SPC5747GK0AMMJ6 is sourced from the original manufacturer or authorized distributors?
All SPC5747GK0AMMJ6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5747GK0AMMJ6 meets industry standards.
7.What is the process for return or replacement of SPC5747GK0AMMJ6?
All SPC5747GK0AMMJ6 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5747GK0AMMJ6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5747GK0AMMJ6 part is unused and in its original packaging.
Return procedure for SPC5747GK0AMMJ6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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