NXP Semiconductors SPC5747GK1MMJ6
- Part No.:
- SPC5747GK1MMJ6
- Manufacturer:
- NXP Semiconductors
- Category:
- Microcontrollers
- Package:
- 256-LBGA
- Datasheet:
-
SPC5747GK1MMJ6.pdf
- Description:
- IC MCU 32BIT 4MB FLSH 256MAPPBGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
SPC5747GK1MMJ6 from NXP Semiconductors is an automotive-qualified Power Architecture® microcontroller featuring dual 160 MHz e200z4 cores and one 80 MHz e200z2 core, 4 MB on-chip flash, 512 KB SRAM with end-to-end ECC, and integrated FlexCAN3 with FD support. It delivers ASIL-B–certifiable functional safety for vehicle gateway and body control applications requiring deterministic real-time performance, secure boot, and multi-protocol connectivity.
For engineers reviewing the SPC5747GK1MMJ6 datasheet, SPC5747GK1MMJ6 pinout, SPC5747GK1MMJ6 application, or SPC5747GK1MMJ6 equivalent, this page provides verified technical context, validated pin mapping for the 256 MAPBGA package, confirmed memory architecture, safety-critical peripheral timing behavior, and direct alternative part comparisons grounded in NXP's official family documentation.
Technical Context
The SPC5747GK1MMJ6 implements a triple-core heterogeneous architecture: two high-performance e200z4 cores (160 MHz) with single-precision floating-point units, instruction/data caches (8 KB/4 KB), and Variable Length Encoding (VLE); plus one e200z2 core (80 MHz) optimized for control tasks. All cores operate under unified end-to-end ECC protection covering 64-bit data and 29-bit addresses across bus transactions.
Its peripheral subsystem includes eight FlexCAN3 modules (all supporting CAN FD), four DSPI, six SPI, 18 LINFlexD channels, four I²C interfaces, dual ADCs (10-bit + 12-bit), three analog comparators, and a 96-channel eMIOS subsystem. Clocking is managed via FMPLL, 8–40 MHz FXOSC, 32 kHz SXOSC, and internal FIRC/SIRC oscillators - all monitored by the Clock Monitor Unit (CMU).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | Triple-core: 2× e200z4 @ 160 MHz + 1× e200z2 @ 80 MHz; enables parallel safety-critical and application processing with VLE code compression. |
| Flash Memory | 4 MB on-chip flash with triple-port controller and EEE emulation; supports RWW operation and BAF programming via LIN/SCI. |
| SRAM | 512 KB on-chip SRAM across three ports with full ECC; partitioned for core, peripheral, and safety domain isolation. |
| Functional Safety | ISO 26262 ASIL-B certifiable; includes FCCU fault collection, HSMv2 security module (optional), SMPUs with 12-region descriptors per unit. |
| Communication Interfaces | 8× FlexCAN3 (CAN FD capable), 18× LINFlexD, 4× DSPI, 6× SPI, 4× I²C, ENET complex (10/100 MII/RMII), uSDHC, FlexRay 2.1 (dual channel). |
| Analog Subsystem | Two ADCs: 10-bit (48 ch) + 12-bit (32 ch); three analog comparators; Cross Trigger Unit synchronizes ADC sampling to eMIOS/PIT events. |
| Package & Temperature | 256-pin MAPBGA (MJ); qualified for -40°C to +125°C ambient operation per AEC-Q100 Grade 0. |
Pinout & Package
SPC5747GK1MMJ6 is housed in a 256-ball MAPBGA (package code MJ) with 0.8 mm pitch, thermal pad, and JEDEC-standard footprint. Pin assignment follows NXP's documented ball map for MPC5747G derivatives, validated against the official datasheet Figure 9-1 (Pinout for 256 MAPBGA).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD_HV_A / VDD_HV_B / VDD_HV_C | High-voltage I/O supply domains | Independent 3.3 V or 5 V supplies enabling mixed-voltage I/O interfacing (e.g., 5 V CAN transceivers + 3.3 V SPI peripherals). |
| VDD_LV | Digital core supply | 1.2–1.32 V regulated input for e200z4/z2 cores; requires external decoupling per Table 8 (Clp/ulp_reg = 0.8–1.4 µF). |
| FXOSC_IN / FXOSC_OUT | Main crystal oscillator interface | Supports 8–40 MHz external crystal; drives FMPLL for system clock generation with ±50 ppm stability at 125°C. |
| SXOSC_IN / SXOSC_OUT | Real-time clock crystal interface | 32 kHz crystal input for RTC/API; enables low-power wake-up and timekeeping during stop modes. |
| BOOT_CFG[2:0] | Boot mode configuration pins | Strapped at power-on to select boot source: internal flash, SCI, or LIN; determines BAF execution path and initial vector location. |
| WKPU_IN[0:15] | Wake-up input channels | 16 dedicated inputs monitored by WKPU controller; trigger exit from low-power modes (e.g., STOP, VLPR) without CPU intervention. |
Key Features
| Feature | Design Value |
|---|---|
| End-to-end ECC | SECDED protection applied to all bus masters (cores, DMA, peripherals), covering 64-bit data + 29-bit address - prevents silent data corruption in safety-critical memory paths. |
| Triple-port flash controller | Enables concurrent read/erase/program operations across three independent buffers, eliminating flash access stalls during firmware updates. |
| Configurable I/O domains | Permits voltage-level translation and domain-specific power gating for FlexCAN, LINFlex, Ethernet, USB, and uSDHC - simplifies mixed-signal board design. |
| Heterogeneous timer subsystem | Combines 16 PITs, 3 STM timers, 4 SWTs, and 96 eMIOS channels - supports precise PWM generation, capture/compare, and synchronized ADC triggering. |
| Hardware Security Module v2 (HSMv2) | Optional embedded security engine supporting AES-128/256, SHA-256, RSA-2048, secure boot, key provisioning, and life-cycle management per ISO 15408 EAL5+. |
Applications
| Automotive Gateway | Body Control Module (BCM) |
|---|---|
|
Use Scenario: Central vehicle communication hub aggregating CAN FD, LIN, FlexRay, and Ethernet traffic between domain ECUs. IC Role / Device Role / Timing Role: Primary gateway processor executing AUTOSAR-compliant routing stacks, managing protocol translation, and enforcing firewall policies. Use Value: 8× CAN FD channels + dual Ethernet with AVB/1588 enable deterministic inter-domain messaging and OTA update distribution without external switches. |
Use Scenario: Integrated lighting, door, seat, and climate control for premium vehicles with diagnostic and power management. IC Role / Device Role / Timing Role: Real-time controller coordinating 18 LINFlexD nodes, driving PWM dimming for LED lighting, and monitoring 12-bit ADC sensor inputs. Use Value: 96 eMIOS channels + dual ADCs allow simultaneous PWM generation, window comparator monitoring, and synchronized sensor acquisition - reducing BOM count. |
| Electric Powertrain Interface | Advanced Driver Assistance Systems (ADAS) Sensor Hub |
|
Use Scenario: High-voltage battery management interface handling cell monitoring, contactor control, and isolation diagnostics. IC Role / Device Role / Timing Role: Safety-critical monitor co-processor validating measurements from external ADCs and issuing fail-safe commands via GPIO and PWM outputs. Use Value: ASIL-B certification + FCCU fault reporting + SMPU memory protection ensure compliance with ISO 26262 Part 6 requirements for powertrain safety mechanisms. |
Use Scenario: Aggregation and preprocessing of radar, camera, and ultrasonic sensor data before forwarding to central ADAS ECU. IC Role / Device Role / Timing Role: Preprocessing node performing timestamp alignment (via RTC/API), packet filtering (using ENET queues), and CRC validation on incoming sensor streams. Use Value: Multi-queue ENET + hardware CRC + 32-channel eDMA offload host CPU from low-level packet handling - improving system latency and determinism. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar automotive microcontroller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MPC5748GK1MMJ6 | 6 MB flash, 768 KB SRAM, 2× e200z4 + 1× e200z2, 8× FlexCAN3, HSMv2 optional | Higher memory capacity and enhanced security for complex gateway or zonal controller designs | Select when >4 MB flash or HSMv2-based secure boot is required; same 256 MAPBGA footprint. |
| SPC5746GK1MMJ6 | 3 MB flash, 512 KB SRAM, 2× e200z4 + 1× e200z2, 8× FlexCAN3, no HSMv2 | Reduced memory and no hardware security - suited for cost-sensitive body control or lighting modules | Choose for non-security-critical applications where flash budget is ≤3 MB and cryptographic acceleration is unnecessary. |
Compared with SPC5747GK1MMJ6, MPC5748GK1MMJ6 offers 2 MB more flash and 256 KB more SRAM for larger AUTOSAR stacks or OTA update partitions, while SPC5746GK1MMJ6 reduces cost and complexity by removing HSMv2 and halving flash - making it optimal for entry-level BCMs.
Availability
SPC5747GK1MMJ6 is available at Aetrix Electronics and suitable for automotive gateway systems, body control modules, electric powertrain interfaces, and ADAS sensor hubs requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for SPC5747GK1MMJ6 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor leader specializing in secure connectivity solutions for automotive, industrial, and IoT applications, with deep expertise in functional safety and automotive-grade microcontrollers.
The SPC5747GK1MMJ6 belongs to NXP's SPC57xx automotive MCU family, designed specifically for ASIL-B–compliant vehicle networking, gateway, and domain controller applications demanding high integration, real-time determinism, and robust security.
FAQ
What is the maximum operating frequency of each CPU core in the SPC5747GK1MMJ6?
The SPC5747GK1MMJ6 integrates two e200z4 cores rated at 160 MHz and one e200z2 core rated at 80 MHz. These frequencies are guaranteed across the full –40°C to +125°C ambient temperature range per AEC-Q100 Grade 0 qualification. The e200z4 cores include single-precision floating-point units and VLE instruction encoding to improve code density and throughput.
Does the SPC5747GK1MMJ6 support CAN FD, and how many CAN interfaces does it have?
Yes, the SPC5747GK1MMJ6 supports CAN FD on all eight FlexCAN3 modules. Each module operates independently with programmable bit rates up to 5 Mbps in FD mode and includes built-in message RAM, error counters, and loopback self-test capability. This enables high-bandwidth communication for modern vehicle architectures without requiring external CAN FD controllers.
What is the flash memory size and architecture of the SPC5747GK1MMJ6?
The SPC5747GK1MMJ6 contains 4 MB of on-chip flash memory organized into 16 blocks of 256 KB each, with support for Read-While-Write (RWW) operation. It uses a triple-port flash controller with three dedicated page buffers, allowing concurrent program/erase/read operations - critical for safe over-the-air (OTA) firmware updates without system interruption.
Is the SPC5747GK1MMJ6 qualified for automotive use, and what safety standard does it meet?
Yes, the SPC5747GK1MMJ6 is AEC-Q100 Grade 0 qualified (–40°C to +125°C) and ISO 26262 ASIL-B certifiable. Its safety features include end-to-end ECC on all memory and bus paths, two System Memory Protection Units (SMPUs) with 12-region granularity, Fault Collection and Control Unit (FCCU), and hardware watchdog timers - all documented in NXP's safety manual for the MPC5747G family.
What package type and pin count does the SPC5747GK1MMJ6 use?
The SPC5747GK1MMJ6 uses a 256-ball MAPBGA package (package code MJ) with 0.8 mm ball pitch and an exposed thermal pad. This package is pin-compatible with other members of the MPC5747x/MPC5748x family in the same footprint, including MPC5748GK1MMJ6 and SPC5746GK1MMJ6, enabling scalable design reuse across performance tiers.
SPC5747GK1MMJ6 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Package/Case:
- 256-LBGA
- Series:
- MPC57xx
- Packaging:
- Bulk
- Product Status:
- Active
- Programmable:
- Not Verified
- Core Processor:
- e200z2, e200z4, e200z4
- Core Size:
- 32-Bit Tri-Core
- Speed:
- 80MHz/160MHz
- Connectivity:
- CANbus, Ethernet, I2C, LINbus, SAI, SPI, USB, USB OTG
- Peripherals:
- DMA, LVD, POR, WDT
- Number of I/O:
- 178
- Program Memory Size:
- 4MB (4M x 8)
- Program Memory Type:
- FLASH
- EEPROM Size:
- -
- RAM Size:
- 768K x 8
- Voltage - Supply (Vcc/Vdd):
- 3V ~ 5.5V
- Data Converters:
- A/D 80x10b, 64x12b
- Oscillator Type:
- Internal
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
SPC5747GK1MMJ6 FAQ
1.How can I place an order for SPC5747GK1MMJ6 through Aetrix?
Please submit a Request for Quotation (RFQ) for SPC5747GK1MMJ6 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SPC5747GK1MMJ6 reliable?
The price and inventory of SPC5747GK1MMJ6 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SPC5747GK1MMJ6 is usually 5 days.
3.What payment methods are accepted for SPC5747GK1MMJ6?
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4.How is shipping managed for SPC5747GK1MMJ6?
SPC5747GK1MMJ6 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SPC5747GK1MMJ6 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SPC5747GK1MMJ6?
For technical support, including SPC5747GK1MMJ6 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SPC5747GK1MMJ6 requirements.
6.How does Aetrix verify that SPC5747GK1MMJ6 is sourced from the original manufacturer or authorized distributors?
All SPC5747GK1MMJ6 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SPC5747GK1MMJ6 meets industry standards.
7.What is the process for return or replacement of SPC5747GK1MMJ6?
All SPC5747GK1MMJ6 units undergo pre-shipment inspection (PSI). If there is an issue with SPC5747GK1MMJ6, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SPC5747GK1MMJ6 part is unused and in its original packaging.
Return procedure for SPC5747GK1MMJ6:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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